KR100993124B1 - 플라즈마 질화된 게이트 유전체의 두 단계 포스트 질화어닐링을 위한 개선된 제조 방법 - Google Patents
플라즈마 질화된 게이트 유전체의 두 단계 포스트 질화어닐링을 위한 개선된 제조 방법 Download PDFInfo
- Publication number
- KR100993124B1 KR100993124B1 KR1020077031042A KR20077031042A KR100993124B1 KR 100993124 B1 KR100993124 B1 KR 100993124B1 KR 1020077031042 A KR1020077031042 A KR 1020077031042A KR 20077031042 A KR20077031042 A KR 20077031042A KR 100993124 B1 KR100993124 B1 KR 100993124B1
- Authority
- KR
- South Korea
- Prior art keywords
- silicon oxynitride
- film
- gate dielectric
- oxygen
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
- H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
- H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/167,526 | 2005-06-27 | ||
| US11/167,526 US7429538B2 (en) | 2005-06-27 | 2005-06-27 | Manufacturing method for two-step post nitridation annealing of plasma nitrided gate dielectric |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20080047322A KR20080047322A (ko) | 2008-05-28 |
| KR100993124B1 true KR100993124B1 (ko) | 2010-11-08 |
Family
ID=37568096
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020077031042A Active KR100993124B1 (ko) | 2005-06-27 | 2006-05-26 | 플라즈마 질화된 게이트 유전체의 두 단계 포스트 질화어닐링을 위한 개선된 제조 방법 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7429538B2 (enExample) |
| JP (1) | JP5072837B2 (enExample) |
| KR (1) | KR100993124B1 (enExample) |
| CN (1) | CN101208782B (enExample) |
| TW (1) | TWI343604B (enExample) |
| WO (1) | WO2007001709A2 (enExample) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007281181A (ja) * | 2006-04-06 | 2007-10-25 | Elpida Memory Inc | 半導体装置の製造方法 |
| US20080274626A1 (en) * | 2007-05-04 | 2008-11-06 | Frederique Glowacki | Method for depositing a high quality silicon dielectric film on a germanium substrate with high quality interface |
| US7910446B2 (en) * | 2007-07-16 | 2011-03-22 | Applied Materials, Inc. | Integrated scheme for forming inter-poly dielectrics for non-volatile memory devices |
| US7638442B2 (en) * | 2008-05-09 | 2009-12-29 | Promos Technologies, Inc. | Method of forming a silicon nitride layer on a gate oxide film of a semiconductor device and annealing the nitride layer |
| JP2010021378A (ja) * | 2008-07-11 | 2010-01-28 | Tokyo Electron Ltd | シリコン酸窒化膜の形成方法および形成装置 |
| CN101685766B (zh) * | 2008-09-23 | 2011-09-07 | 中芯国际集成电路制造(上海)有限公司 | 增加热处理反应室利用率的方法 |
| KR101008994B1 (ko) | 2009-05-13 | 2011-01-17 | 주식회사 하이닉스반도체 | 듀얼 폴리 게이트의 산화막 형성 방법 |
| WO2011097178A2 (en) * | 2010-02-02 | 2011-08-11 | Applied Materials, Inc. | Methods for nitridation and oxidation |
| US8450221B2 (en) * | 2010-08-04 | 2013-05-28 | Texas Instruments Incorporated | Method of forming MOS transistors including SiON gate dielectric with enhanced nitrogen concentration at its sidewalls |
| JP2012079785A (ja) * | 2010-09-30 | 2012-04-19 | Tokyo Electron Ltd | 絶縁膜の改質方法 |
| US20120270411A1 (en) * | 2011-04-25 | 2012-10-25 | Nanya Technology Corporation | Manufacturing method of gate dielectric layer |
| KR101858524B1 (ko) | 2011-05-26 | 2018-05-18 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
| US8394688B2 (en) | 2011-06-27 | 2013-03-12 | United Microelectronics Corp. | Process for forming repair layer and MOS transistor having repair layer |
| US8741784B2 (en) | 2011-09-20 | 2014-06-03 | United Microelectronics Corp. | Process for fabricating semiconductor device and method of fabricating metal oxide semiconductor device |
| US9634083B2 (en) | 2012-12-10 | 2017-04-25 | United Microelectronics Corp. | Semiconductor structure and process thereof |
| CN103887337A (zh) * | 2012-12-21 | 2014-06-25 | 联华电子股份有限公司 | 半导体结构及其制作工艺 |
| US9824881B2 (en) | 2013-03-14 | 2017-11-21 | Asm Ip Holding B.V. | Si precursors for deposition of SiN at low temperatures |
| US9564309B2 (en) | 2013-03-14 | 2017-02-07 | Asm Ip Holding B.V. | Si precursors for deposition of SiN at low temperatures |
| JP2015142034A (ja) * | 2014-01-29 | 2015-08-03 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| CN103943475A (zh) * | 2014-02-21 | 2014-07-23 | 上海华力微电子有限公司 | 一种提高栅氧化物介电常数的方法 |
| CN103855035A (zh) * | 2014-03-27 | 2014-06-11 | 上海华力微电子有限公司 | 一种制备栅介质层的设备 |
| US9576792B2 (en) | 2014-09-17 | 2017-02-21 | Asm Ip Holding B.V. | Deposition of SiN |
| US9761687B2 (en) | 2015-01-04 | 2017-09-12 | United Microelectronics Corp. | Method of forming gate dielectric layer for MOS transistor |
| US10410857B2 (en) * | 2015-08-24 | 2019-09-10 | Asm Ip Holding B.V. | Formation of SiN thin films |
| TWI679703B (zh) * | 2016-04-25 | 2019-12-11 | 聯華電子股份有限公司 | 閘介電層的製造方法 |
| US10103027B2 (en) | 2016-06-20 | 2018-10-16 | Applied Materials, Inc. | Hydrogenation and nitridization processes for modifying effective oxide thickness of a film |
| US10510545B2 (en) | 2016-06-20 | 2019-12-17 | Applied Materials, Inc. | Hydrogenation and nitridization processes for modifying effective oxide thickness of a film |
| CN109003879B (zh) * | 2017-06-06 | 2021-03-19 | 中芯国际集成电路制造(上海)有限公司 | 栅介质层的形成方法 |
| WO2019032457A1 (en) * | 2017-08-08 | 2019-02-14 | Applied Materials, Inc. | METHODS AND APPARATUSES FOR DEPOSITING LOW DIELECTRIC CONSTANT FILMS |
| WO2021150625A1 (en) | 2020-01-23 | 2021-07-29 | Applied Materials, Inc. | Method of cleaning a structure and method of depositiing a capping layer in a structure |
| KR20220081905A (ko) | 2020-12-09 | 2022-06-16 | 에이에스엠 아이피 홀딩 비.브이. | 실리콘 질화물 증착용 실리콘 전구체 |
| CN116197739B (zh) * | 2023-05-05 | 2023-07-14 | 松诺盟科技有限公司 | 氢压力传感器芯体弹性体的表面处理工艺、弹性体及应用 |
| US20240405096A1 (en) * | 2023-06-02 | 2024-12-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and method of manufacture |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6365518B1 (en) | 2001-03-26 | 2002-04-02 | Applied Materials, Inc. | Method of processing a substrate in a processing chamber |
| US20050181626A1 (en) | 2003-04-30 | 2005-08-18 | Fujitsu Limited | Manufacture of semiconductor device having nitridized insulating film |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2641385B2 (ja) * | 1993-09-24 | 1997-08-13 | アプライド マテリアルズ インコーポレイテッド | 膜形成方法 |
| KR100207467B1 (ko) * | 1996-02-29 | 1999-07-15 | 윤종용 | 반도체 장치의 커패시터 제조 방법 |
| KR100207485B1 (ko) * | 1996-07-23 | 1999-07-15 | 윤종용 | 반도체장치의 커패시터 제조방법 |
| US6268267B1 (en) * | 2000-01-24 | 2001-07-31 | Taiwan Semiconductor Manufacturing Company | Silicon-oxynitride-oxide (SXO) continuity film pad to recessed bird's beak of LOCOS |
| US6509604B1 (en) * | 2000-01-26 | 2003-01-21 | Advanced Micro Devices, Inc. | Nitridation barriers for nitridated tunnel oxide for circuitry for flash technology and for LOCOS/STI isolation |
| US6548368B1 (en) * | 2000-08-23 | 2003-04-15 | Applied Materials, Inc. | Method of forming a MIS capacitor |
| US6632747B2 (en) * | 2001-06-20 | 2003-10-14 | Texas Instruments Incorporated | Method of ammonia annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile |
| US6610614B2 (en) * | 2001-06-20 | 2003-08-26 | Texas Instruments Incorporated | Method for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates |
| US6503846B1 (en) * | 2001-06-20 | 2003-01-07 | Texas Instruments Incorporated | Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates |
| US6548366B2 (en) * | 2001-06-20 | 2003-04-15 | Texas Instruments Incorporated | Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile |
| KR100532409B1 (ko) * | 2001-08-14 | 2005-11-30 | 삼성전자주식회사 | 유전체막과 상부 전극 계면에서의 누설 전류 특성이개선된 반도체 소자의 커패시터 형성 방법 |
| US20030082884A1 (en) * | 2001-10-26 | 2003-05-01 | International Business Machine Corporation And Kabushiki Kaisha Toshiba | Method of forming low-leakage dielectric layer |
| US20030109146A1 (en) * | 2001-12-12 | 2003-06-12 | Luigi Colombo | Oxynitride device and method using non-stoichiometric silicon oxide |
| US20030111678A1 (en) * | 2001-12-14 | 2003-06-19 | Luigi Colombo | CVD deposition of M-SION gate dielectrics |
| WO2003107399A2 (en) * | 2002-06-12 | 2003-12-24 | Applied Materials, Inc. | Method for improving nitrogen profile in plasma nitrided gate dielectric layers |
| US20080090425A9 (en) * | 2002-06-12 | 2008-04-17 | Christopher Olsen | Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics |
| US6831021B2 (en) * | 2002-06-12 | 2004-12-14 | Applied Materials, Inc. | Plasma method and apparatus for processing a substrate |
| US6858547B2 (en) * | 2002-06-14 | 2005-02-22 | Applied Materials, Inc. | System and method for forming a gate dielectric |
| US6780720B2 (en) * | 2002-07-01 | 2004-08-24 | International Business Machines Corporation | Method for fabricating a nitrided silicon-oxide gate dielectric |
| JP2004247528A (ja) * | 2003-02-14 | 2004-09-02 | Sony Corp | 半導体装置の製造方法 |
| US7179754B2 (en) * | 2003-05-28 | 2007-02-20 | Applied Materials, Inc. | Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy |
| JPWO2005004224A1 (ja) * | 2003-07-01 | 2007-09-20 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| JP4261276B2 (ja) * | 2003-08-15 | 2009-04-30 | パナソニック株式会社 | 半導体装置の製造方法 |
| US7291568B2 (en) * | 2003-08-26 | 2007-11-06 | International Business Machines Corporation | Method for fabricating a nitrided silicon-oxide gate dielectric |
| US20050130448A1 (en) * | 2003-12-15 | 2005-06-16 | Applied Materials, Inc. | Method of forming a silicon oxynitride layer |
| TW200620471A (en) * | 2004-08-31 | 2006-06-16 | Tokyo Electron Ltd | Silicon oxide film forming method, semiconductor device manufacturing method and computer storage medium |
| JP4965849B2 (ja) * | 2004-11-04 | 2012-07-04 | 東京エレクトロン株式会社 | 絶縁膜形成方法およびコンピュータ記録媒体 |
| KR101005953B1 (ko) * | 2004-11-04 | 2011-01-05 | 도쿄엘렉트론가부시키가이샤 | 절연막 형성 방법 |
-
2005
- 2005-06-27 US US11/167,526 patent/US7429538B2/en active Active
-
2006
- 2006-05-26 WO PCT/US2006/020508 patent/WO2007001709A2/en not_active Ceased
- 2006-05-26 KR KR1020077031042A patent/KR100993124B1/ko active Active
- 2006-05-26 CN CN2006800229813A patent/CN101208782B/zh active Active
- 2006-05-26 JP JP2008518181A patent/JP5072837B2/ja active Active
- 2006-05-30 TW TW095119255A patent/TWI343604B/zh active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6365518B1 (en) | 2001-03-26 | 2002-04-02 | Applied Materials, Inc. | Method of processing a substrate in a processing chamber |
| US20050181626A1 (en) | 2003-04-30 | 2005-08-18 | Fujitsu Limited | Manufacture of semiconductor device having nitridized insulating film |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2007001709A3 (en) | 2007-11-29 |
| TWI343604B (en) | 2011-06-11 |
| KR20080047322A (ko) | 2008-05-28 |
| JP2008547220A (ja) | 2008-12-25 |
| US7429538B2 (en) | 2008-09-30 |
| WO2007001709A2 (en) | 2007-01-04 |
| JP5072837B2 (ja) | 2012-11-14 |
| CN101208782B (zh) | 2010-05-19 |
| TW200703514A (en) | 2007-01-16 |
| US20060292844A1 (en) | 2006-12-28 |
| CN101208782A (zh) | 2008-06-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100993124B1 (ko) | 플라즈마 질화된 게이트 유전체의 두 단계 포스트 질화어닐링을 위한 개선된 제조 방법 | |
| US20070169696A1 (en) | Two-step post nitridation annealing for lower eot plasma nitrided gate dielectrics | |
| US7429540B2 (en) | Silicon oxynitride gate dielectric formation using multiple annealing steps | |
| CN1757098B (zh) | 利用具有氨的超低压快速热退火调节氧氮化硅的氮分布曲线 | |
| US7964514B2 (en) | Multiple nitrogen plasma treatments for thin SiON dielectrics | |
| US7569502B2 (en) | Method of forming a silicon oxynitride layer | |
| US20070093013A1 (en) | Method for fabricating a gate dielectric of a field effect transistor | |
| WO2012018975A2 (en) | Mos transistors including sion gate dielectric with enhanced nitrogen concentration at its sidewalls | |
| US7476916B2 (en) | Semiconductor device having a mis-type fet, and methods for manufacturing the same and forming a metal oxide film | |
| CN1762045A (zh) | 用于较低eot等离子体氮化的栅电介质的两步后氮化退火 | |
| US20070010103A1 (en) | Nitric oxide reoxidation for improved gate leakage reduction of sion gate dielectrics | |
| KR100680970B1 (ko) | 반도체 소자의 게이트 형성방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0105 | International application |
Patent event date: 20071231 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PA0201 | Request for examination | ||
| PG1501 | Laying open of application | ||
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20090914 Patent event code: PE09021S01D |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20100315 Patent event code: PE09021S01D |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 20100810 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 20101102 Patent event code: PR07011E01D |
|
| PR1002 | Payment of registration fee |
Payment date: 20101102 End annual number: 3 Start annual number: 1 |
|
| PG1601 | Publication of registration | ||
| FPAY | Annual fee payment |
Payment date: 20131030 Year of fee payment: 4 |
|
| PR1001 | Payment of annual fee |
Payment date: 20131030 Start annual number: 4 End annual number: 4 |
|
| FPAY | Annual fee payment |
Payment date: 20141030 Year of fee payment: 5 |
|
| PR1001 | Payment of annual fee |
Payment date: 20141030 Start annual number: 5 End annual number: 5 |
|
| FPAY | Annual fee payment |
Payment date: 20161028 Year of fee payment: 7 |
|
| PR1001 | Payment of annual fee |
Payment date: 20161028 Start annual number: 7 End annual number: 7 |
|
| FPAY | Annual fee payment |
Payment date: 20170929 Year of fee payment: 8 |
|
| PR1001 | Payment of annual fee |
Payment date: 20170929 Start annual number: 8 End annual number: 8 |
|
| FPAY | Annual fee payment |
Payment date: 20181031 Year of fee payment: 9 |
|
| PR1001 | Payment of annual fee |
Payment date: 20181031 Start annual number: 9 End annual number: 9 |
|
| PR1001 | Payment of annual fee |
Payment date: 20211026 Start annual number: 12 End annual number: 12 |
|
| PR1001 | Payment of annual fee |
Payment date: 20221025 Start annual number: 13 End annual number: 13 |
|
| PR1001 | Payment of annual fee |
Payment date: 20231023 Start annual number: 14 End annual number: 14 |
|
| PR1001 | Payment of annual fee |
Payment date: 20241029 Start annual number: 15 End annual number: 15 |