JP2008508719A5 - - Google Patents
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- Publication number
- JP2008508719A5 JP2008508719A5 JP2007523561A JP2007523561A JP2008508719A5 JP 2008508719 A5 JP2008508719 A5 JP 2008508719A5 JP 2007523561 A JP2007523561 A JP 2007523561A JP 2007523561 A JP2007523561 A JP 2007523561A JP 2008508719 A5 JP2008508719 A5 JP 2008508719A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- exposed surface
- germanium
- depositing
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052732 germanium Inorganic materials 0.000 claims 15
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims 15
- 239000000758 substrate Substances 0.000 claims 10
- 238000000151 deposition Methods 0.000 claims 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 5
- 238000000034 method Methods 0.000 claims 5
- 229910052710 silicon Inorganic materials 0.000 claims 5
- 239000010703 silicon Substances 0.000 claims 5
- 238000004140 cleaning Methods 0.000 claims 4
- 230000015572 biosynthetic process Effects 0.000 claims 2
- 239000000463 material Substances 0.000 claims 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims 1
- 229910052799 carbon Inorganic materials 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/903,841 US7320931B2 (en) | 2004-07-30 | 2004-07-30 | Interfacial layer for use with high k dielectric materials |
| PCT/US2005/021498 WO2006023027A1 (en) | 2004-07-30 | 2005-06-16 | Interfacial layer for use with high k dielectric materials |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008508719A JP2008508719A (ja) | 2008-03-21 |
| JP2008508719A5 true JP2008508719A5 (enExample) | 2008-08-07 |
Family
ID=35731164
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007523561A Pending JP2008508719A (ja) | 2004-07-30 | 2005-06-16 | 高ｋ誘電材料と一緒に使用するための界面層 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7320931B2 (enExample) |
| JP (1) | JP2008508719A (enExample) |
| KR (1) | KR20070044441A (enExample) |
| CN (1) | CN100481319C (enExample) |
| TW (1) | TW200625657A (enExample) |
| WO (1) | WO2006023027A1 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7399666B2 (en) * | 2005-02-15 | 2008-07-15 | Micron Technology, Inc. | Atomic layer deposition of Zr3N4/ZrO2 films as gate dielectrics |
| US7498247B2 (en) | 2005-02-23 | 2009-03-03 | Micron Technology, Inc. | Atomic layer deposition of Hf3N4/HfO2 films as gate dielectrics |
| US8110469B2 (en) * | 2005-08-30 | 2012-02-07 | Micron Technology, Inc. | Graded dielectric layers |
| US20070161214A1 (en) * | 2006-01-06 | 2007-07-12 | International Business Machines Corporation | High k gate stack on III-V compound semiconductors |
| US8692310B2 (en) | 2009-02-09 | 2014-04-08 | Spansion Llc | Gate fringing effect based channel formation for semiconductor device |
| US8330381B2 (en) * | 2009-05-14 | 2012-12-11 | Ilumisys, Inc. | Electronic circuit for DC conversion of fluorescent lighting ballast |
| US8268683B2 (en) * | 2009-06-12 | 2012-09-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for reducing interfacial layer thickness for high-K and metal gate stack |
| EP2270840B1 (en) * | 2009-06-29 | 2020-06-03 | IMEC vzw | Method for manufacturing an III-V material substrate and the substrate thereof |
| CN102509734A (zh) * | 2011-11-08 | 2012-06-20 | 复旦大学 | 一种利用ald制备锗基mos电容的方法 |
| CN113823555B (zh) * | 2021-09-03 | 2024-06-07 | 合肥安德科铭半导体科技有限公司 | 一种在绝缘体上制备锗薄膜的方法 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5326721A (en) * | 1992-05-01 | 1994-07-05 | Texas Instruments Incorporated | Method of fabricating high-dielectric constant oxides on semiconductors using a GE buffer layer |
| DE19533313A1 (de) * | 1995-09-08 | 1997-03-13 | Max Planck Gesellschaft | Halbleiterstruktur für einen Transistor |
| CN1042775C (zh) * | 1996-06-21 | 1999-03-31 | 河北工业大学 | 用锗进行硅/硅键合的方法及其制备的硅器件衬底片 |
| US6800881B2 (en) * | 1996-12-09 | 2004-10-05 | Ihp Gmbh-Innovations For High Performance Microelectronics/Institut Fur Innovative Mikroelektronik | Silicon-germanium hetero bipolar transistor with T-shaped implantation layer between emitter and emitter contact area |
| US6723621B1 (en) * | 1997-06-30 | 2004-04-20 | International Business Machines Corporation | Abrupt delta-like doping in Si and SiGe films by UHV-CVD |
| EP0926739A1 (en) * | 1997-12-24 | 1999-06-30 | Texas Instruments Incorporated | A structure of and method for forming a mis field effect transistor |
| FR2783254B1 (fr) * | 1998-09-10 | 2000-11-10 | France Telecom | Procede d'obtention d'une couche de germanium monocristallin sur un substrat de silicium monocristallin,et produits obtenus |
| US6184072B1 (en) | 2000-05-17 | 2001-02-06 | Motorola, Inc. | Process for forming a high-K gate dielectric |
| US6593625B2 (en) * | 2001-06-12 | 2003-07-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
| JP3748218B2 (ja) * | 2001-09-10 | 2006-02-22 | 日本電信電話株式会社 | Ｍｉｓ型半導体装置の製造方法 |
| US20030111678A1 (en) | 2001-12-14 | 2003-06-19 | Luigi Colombo | CVD deposition of M-SION gate dielectrics |
| US6696332B2 (en) | 2001-12-26 | 2004-02-24 | Texas Instruments Incorporated | Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing |
| US6620713B2 (en) | 2002-01-02 | 2003-09-16 | Intel Corporation | Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication |
| JP2004006819A (ja) * | 2002-04-26 | 2004-01-08 | Nec Electronics Corp | 半導体装置の製造方法 |
| US6621114B1 (en) | 2002-05-20 | 2003-09-16 | Advanced Micro Devices, Inc. | MOS transistors with high-k dielectric gate insulator for reducing remote scattering |
| US6995430B2 (en) | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
| US6617639B1 (en) | 2002-06-21 | 2003-09-09 | Advanced Micro Devices, Inc. | Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling |
-
2004
- 2004-07-30 US US10/903,841 patent/US7320931B2/en not_active Expired - Fee Related
-
2005
- 2005-06-16 JP JP2007523561A patent/JP2008508719A/ja active Pending
- 2005-06-16 CN CNB2005800238837A patent/CN100481319C/zh not_active Expired - Fee Related
- 2005-06-16 WO PCT/US2005/021498 patent/WO2006023027A1/en not_active Ceased
- 2005-06-16 KR KR1020077002256A patent/KR20070044441A/ko not_active Withdrawn
- 2005-07-13 TW TW094123665A patent/TW200625657A/zh unknown