JP2008503885A - セラミック導体路板の形成方法 - Google Patents
セラミック導体路板の形成方法 Download PDFInfo
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- JP2008503885A JP2008503885A JP2007517119A JP2007517119A JP2008503885A JP 2008503885 A JP2008503885 A JP 2008503885A JP 2007517119 A JP2007517119 A JP 2007517119A JP 2007517119 A JP2007517119 A JP 2007517119A JP 2008503885 A JP2008503885 A JP 2008503885A
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- 239000000919 ceramic Substances 0.000 title claims abstract description 42
- 238000000034 method Methods 0.000 title claims description 42
- 239000004020 conductor Substances 0.000 title claims description 12
- 239000000758 substrate Substances 0.000 claims abstract description 59
- 238000001465 metallisation Methods 0.000 claims description 73
- 229910052751 metal Inorganic materials 0.000 claims description 19
- 239000002184 metal Substances 0.000 claims description 19
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 16
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 239000010949 copper Substances 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 12
- 239000000243 solution Substances 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 10
- 229910052763 palladium Inorganic materials 0.000 claims description 7
- 238000000206 photolithography Methods 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 230000003014 reinforcing effect Effects 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 239000004576 sand Substances 0.000 claims description 3
- 239000007864 aqueous solution Substances 0.000 claims description 2
- -1 iron (III) ions Chemical class 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 48
- 230000004913 activation Effects 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 7
- 238000004140 cleaning Methods 0.000 description 3
- 230000003628 erosive effect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000002787 reinforcement Effects 0.000 description 2
- SWPMTVXRLXPNDP-UHFFFAOYSA-N 4-hydroxy-2,6,6-trimethylcyclohexene-1-carbaldehyde Chemical compound CC1=C(C=O)C(C)(C)CC(O)C1 SWPMTVXRLXPNDP-UHFFFAOYSA-N 0.000 description 1
- VTLYFUHAOXGGBS-UHFFFAOYSA-N Fe3+ Chemical compound [Fe+3] VTLYFUHAOXGGBS-UHFFFAOYSA-N 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- PIBWKRNGBLPSSY-UHFFFAOYSA-L palladium(II) chloride Chemical compound Cl[Pd]Cl PIBWKRNGBLPSSY-UHFFFAOYSA-L 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15182—Fan-in arrangement of the internal vias
- H01L2924/15184—Fan-in arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
図6から図9は形成の第2の変形形態の種々のステップを示し、
図10はセラミック基板とこの基板上にボンディングされている構成素子を示す。
Claims (12)
- セラミック基板(S)と、構成素子(BE)用に前記セラミック基板(S)の上面に取り付けられているはんだ付け可能な端子面(LA)と、前記セラミック基板(S)の下面におけるはんだ付け可能なコンタクト(LK)とを有するセラミック導体路板の形成方法において、
前記はんだ付け可能な端子面のための金属化部を、溶液から前記セラミック基板上に金属を析出することにより形成することを特徴とする、セラミック導体路板の形成方法。 - セラミック基板(S)としてLTCCパネルを使用する、請求項1記載の方法。
- 前記金属化部をフォトリソグラフィを用いて前記はんだ付け可能な端子面(LA)へと構造化する、請求項1または2記載の方法。
- −先ず平坦に基礎金属化部(GM)を前記基板(S)上に被着させ、
−前記基礎金属化部(GM)を構造化し、
−構造化された前記基礎金属化部(GM)に補強層(VS)を析出し、
−続いてボンディング可能な層(BS)を析出する、
請求項1から3までのいずれか1項記載の方法。 - 基礎金属化部(GM)として銅層を析出する、請求項1から4までのいずれか1項記載の方法。
- 前記基礎金属化部(GM)のために前記基板(S)の前記上面に先ず平坦に銅を無電流で析出し、続いて銅の電気的な析出により補強する、請求項5記載の方法。
- 補強層(VS)としてニッケル層を前記基礎金属化部(GM)上に析出し、該ニッケル層の上にパラジウム層を化学的に析出する、請求項4から6までのいずれか1項記載の方法。
- ボンディング可能な層(BS)として薄い金層を析出する、請求項4から7までのいずれか1項記載の方法。
- −先ず平坦に、銅からなる基礎金属化部(GM)を前記基板(S)の前記上面に析出し、
−前記基礎金属化部にフォトラック層を被着させ、イメージ通りに露光して、フォトラックマスク(PM)になるまで現像し、
−基礎金属化部において前記フォトラックマスク(PM)によっては覆われていない領域をエッチングにより除去する、
請求項1から8までのいずれか1項記載の方法。 - 前記基礎金属化部(GM)を構造化するために鉄(III)イオンを含有する水溶液またはHNO3を用いてエッチングする、請求項9記載の方法。
- 前記基板(S)を前記金属化の前に洗浄する、請求項1から10までのいずれか1項記載の方法。
- 前記基板(S)をサンドビームにより洗浄する、請求項11記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004030800.4A DE102004030800B4 (de) | 2004-06-25 | 2004-06-25 | Verfahren zur Herstellung einer keramischen Leiterplatte |
DE102004030800.4 | 2004-06-25 | ||
PCT/EP2005/005997 WO2006000291A1 (de) | 2004-06-25 | 2005-06-03 | Verfahren zur herstellung einer keramischen leiterplatte |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008503885A true JP2008503885A (ja) | 2008-02-07 |
JP5145036B2 JP5145036B2 (ja) | 2013-02-13 |
Family
ID=34969578
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007517119A Expired - Fee Related JP5145036B2 (ja) | 2004-06-25 | 2005-06-03 | セラミック導体路板の形成方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7951301B2 (ja) |
JP (1) | JP5145036B2 (ja) |
CN (1) | CN1973369A (ja) |
DE (1) | DE102004030800B4 (ja) |
WO (1) | WO2006000291A1 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102009051374A1 (de) * | 2009-10-30 | 2011-06-16 | Robert Bosch Gmbh | Vorrichtung zum Refelektieren beschleunigter Elektronen |
DE102011109338B3 (de) * | 2011-08-03 | 2013-01-31 | Dietrich Reichwein | Vorrichtung zur Speicherung elektromagnetischer Energie |
CN103249256A (zh) * | 2012-02-14 | 2013-08-14 | 景硕科技股份有限公司 | 线路图案的表面处理结构 |
DE102014112365A1 (de) | 2014-08-28 | 2016-03-03 | Epcos Ag | Verfahren zur Herstellung eines Mehrschichtsubstrats und Mehrschichtsubstrat |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08153949A (ja) * | 1994-11-28 | 1996-06-11 | Matsushita Electric Works Ltd | セラミック配線板の製造方法 |
JP2002050715A (ja) * | 2000-08-03 | 2002-02-15 | Shinko Electric Ind Co Ltd | 半導体パッケージの製造方法 |
JP2002208775A (ja) * | 1998-07-08 | 2002-07-26 | Ibiden Co Ltd | プリント配線板 |
JP2004055624A (ja) * | 2002-07-16 | 2004-02-19 | Murata Mfg Co Ltd | 基板の製造方法 |
JP2004518299A (ja) * | 2001-02-01 | 2004-06-17 | エプコス アクチエンゲゼルシャフト | 電気的構成素子用の基板およびその製造方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1485569A (en) | 1974-09-10 | 1977-09-14 | Siemens Ag | Multi-layer wired substrates for multi-chip circuits |
DE3523957A1 (de) * | 1985-07-04 | 1987-01-08 | Licentia Gmbh | Verfahren zur metallisierung von keramik |
JP2508848B2 (ja) | 1989-07-28 | 1996-06-19 | 日立電線株式会社 | 銅配線セラミック基板の製造方法 |
US5206055A (en) * | 1991-09-03 | 1993-04-27 | General Electric Company | Method for enhancing the uniform electroless deposition of gold onto a palladium substrate |
DE4431847C5 (de) * | 1994-09-07 | 2011-01-27 | Atotech Deutschland Gmbh | Substrat mit bondfähiger Beschichtung |
US6281090B1 (en) * | 1996-10-16 | 2001-08-28 | Macdermid, Incorporated | Method for the manufacture of printed circuit boards with plated resistors |
US5910644A (en) * | 1997-06-11 | 1999-06-08 | International Business Machines Corporation | Universal surface finish for DCA, SMT and pad on pad interconnections |
EP1940209B1 (en) * | 1998-07-08 | 2010-06-02 | Ibiden Co., Ltd. | Printed wiring board and method of producing the same |
DE19833593C2 (de) * | 1998-07-25 | 2002-03-14 | Daimler Chrysler Ag | Verfahren zur selektiven Metallisierung |
DE19922553A1 (de) * | 1999-05-17 | 2000-12-07 | Siemens Ag | Verfahren zum Herstellen eines automaten-bondbaren kermamischen Schaltungsträgers und automaten-bondbarer keramischer Schaltungsträger |
JP3910363B2 (ja) * | 2000-12-28 | 2007-04-25 | 富士通株式会社 | 外部接続端子 |
CN1203737C (zh) | 2001-03-15 | 2005-05-25 | 张成邦 | 一种陶瓷金属化基板的制造方法 |
US7148566B2 (en) * | 2001-03-26 | 2006-12-12 | International Business Machines Corporation | Method and structure for an organic package with improved BGA life |
JP3648189B2 (ja) * | 2001-09-28 | 2005-05-18 | 同和鉱業株式会社 | 金属−セラミックス回路基板 |
US6911230B2 (en) * | 2001-12-14 | 2005-06-28 | Shipley Company, L.L.C. | Plating method |
US20040057485A1 (en) * | 2002-07-16 | 2004-03-25 | The Furukawa Electric Co., Ltd. | Semiconductor laser device, semiconductor laser module, and optical fiber amplifier |
DE10243814B4 (de) | 2002-09-20 | 2018-05-30 | Robert Bosch Gmbh | Verfahren zur Herstellung einer leitenden Beschichtung auf einem isolierenden Substrat |
JP4357901B2 (ja) | 2003-08-25 | 2009-11-04 | 日本エレクトロプレイテイング・エンジニヤース株式会社 | 無電解めっき用パラジウム触媒液及び触媒化処理方法 |
-
2004
- 2004-06-25 DE DE102004030800.4A patent/DE102004030800B4/de not_active Expired - Fee Related
-
2005
- 2005-06-03 US US11/630,565 patent/US7951301B2/en not_active Expired - Fee Related
- 2005-06-03 CN CNA2005800211143A patent/CN1973369A/zh active Pending
- 2005-06-03 JP JP2007517119A patent/JP5145036B2/ja not_active Expired - Fee Related
- 2005-06-03 WO PCT/EP2005/005997 patent/WO2006000291A1/de active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08153949A (ja) * | 1994-11-28 | 1996-06-11 | Matsushita Electric Works Ltd | セラミック配線板の製造方法 |
JP2002208775A (ja) * | 1998-07-08 | 2002-07-26 | Ibiden Co Ltd | プリント配線板 |
JP2002050715A (ja) * | 2000-08-03 | 2002-02-15 | Shinko Electric Ind Co Ltd | 半導体パッケージの製造方法 |
JP2004518299A (ja) * | 2001-02-01 | 2004-06-17 | エプコス アクチエンゲゼルシャフト | 電気的構成素子用の基板およびその製造方法 |
JP2004055624A (ja) * | 2002-07-16 | 2004-02-19 | Murata Mfg Co Ltd | 基板の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US7951301B2 (en) | 2011-05-31 |
WO2006000291A1 (de) | 2006-01-05 |
DE102004030800B4 (de) | 2017-05-18 |
DE102004030800A1 (de) | 2006-01-26 |
US20080283488A1 (en) | 2008-11-20 |
CN1973369A (zh) | 2007-05-30 |
JP5145036B2 (ja) | 2013-02-13 |
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