JP2008277530A - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置 Download PDF

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Publication number
JP2008277530A
JP2008277530A JP2007119122A JP2007119122A JP2008277530A JP 2008277530 A JP2008277530 A JP 2008277530A JP 2007119122 A JP2007119122 A JP 2007119122A JP 2007119122 A JP2007119122 A JP 2007119122A JP 2008277530 A JP2008277530 A JP 2008277530A
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JP
Japan
Prior art keywords
nitride film
memory device
semiconductor memory
nonvolatile semiconductor
silicon nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007119122A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008277530A5 (enExample
Inventor
Tetsuya Ishimaru
哲也 石丸
Yasuhiro Shimamoto
泰洋 嶋本
Toshiyuki Mine
利之 峰
Yasunobu Aoki
康伸 青木
Koichi Toba
功一 鳥羽
Kan Yasui
感 安井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2007119122A priority Critical patent/JP2008277530A/ja
Priority to TW097109686A priority patent/TW200908342A/zh
Priority to KR1020080033183A priority patent/KR100998106B1/ko
Priority to US12/109,340 priority patent/US8063433B2/en
Priority to CN2008100953115A priority patent/CN101295735B/zh
Publication of JP2008277530A publication Critical patent/JP2008277530A/ja
Publication of JP2008277530A5 publication Critical patent/JP2008277530A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/696—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having at least one additional gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0156—Manufacturing their doped wells

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2007119122A 2007-04-27 2007-04-27 不揮発性半導体記憶装置 Pending JP2008277530A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2007119122A JP2008277530A (ja) 2007-04-27 2007-04-27 不揮発性半導体記憶装置
TW097109686A TW200908342A (en) 2007-04-27 2008-03-19 Nonvolatile semiconductor memory device
KR1020080033183A KR100998106B1 (ko) 2007-04-27 2008-04-10 불휘발성 반도체 기억 장치
US12/109,340 US8063433B2 (en) 2007-04-27 2008-04-24 Nonvolatile semiconductor memory device
CN2008100953115A CN101295735B (zh) 2007-04-27 2008-04-25 非易失性半导体存储器件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007119122A JP2008277530A (ja) 2007-04-27 2007-04-27 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2008277530A true JP2008277530A (ja) 2008-11-13
JP2008277530A5 JP2008277530A5 (enExample) 2010-04-22

Family

ID=39885897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007119122A Pending JP2008277530A (ja) 2007-04-27 2007-04-27 不揮発性半導体記憶装置

Country Status (5)

Country Link
US (1) US8063433B2 (enExample)
JP (1) JP2008277530A (enExample)
KR (1) KR100998106B1 (enExample)
CN (1) CN101295735B (enExample)
TW (1) TW200908342A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010050204A1 (ja) 2008-10-29 2010-05-06 株式会社岡村製作所 椅子の背凭れ
WO2011040396A1 (ja) * 2009-09-30 2011-04-07 東京エレクトロン株式会社 窒化珪素膜の成膜方法および半導体メモリ装置の製造方法
JP2018087906A (ja) * 2016-11-29 2018-06-07 株式会社ジャパンディスプレイ 表示装置

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4659527B2 (ja) * 2005-06-20 2011-03-30 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5230274B2 (ja) 2008-06-02 2013-07-10 株式会社東芝 不揮発性半導体記憶装置
US8692310B2 (en) 2009-02-09 2014-04-08 Spansion Llc Gate fringing effect based channel formation for semiconductor device
WO2011102233A1 (en) * 2010-02-19 2011-08-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8951864B2 (en) * 2012-02-13 2015-02-10 Taiwan Semiconductor Manufacturing Company, Ltd. Split-gate device and method of fabricating the same
US9466496B2 (en) * 2013-10-11 2016-10-11 Cypress Semiconductor Corporation Spacer formation with straight sidewall
CN104404476A (zh) * 2014-12-10 2015-03-11 中国电子科技集团公司第四十七研究所 低压气相淀积Si3N4薄膜的制备方法
TWI548000B (zh) * 2014-12-22 2016-09-01 力晶科技股份有限公司 半導體元件及其製作方法
US10304848B2 (en) 2017-09-01 2019-05-28 Taiwan Semiconductor Manufacturing Co., Ltd. Flash memory structure with reduced dimension of gate structure
JP2021034650A (ja) * 2019-08-28 2021-03-01 キオクシア株式会社 半導体記憶装置
JP2021044426A (ja) * 2019-09-12 2021-03-18 キオクシア株式会社 半導体記憶装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03159166A (ja) * 1989-11-08 1991-07-09 Samsung Electron Co Ltd 半導体装置及びその製造方法
JP2004356562A (ja) * 2003-05-30 2004-12-16 Renesas Technology Corp 半導体装置の製造方法および半導体装置
JP2006319082A (ja) * 2005-05-12 2006-11-24 Sony Corp 不揮発性半導体メモリデバイス
JP2007504668A (ja) * 2003-09-04 2007-03-01 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 電荷損失が減少された窒化物層を備えるメモリセル構造及びその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0773685A (ja) 1993-09-06 1995-03-17 Hitachi Ltd 半導体不揮発性記憶装置
JP4151229B2 (ja) * 2000-10-26 2008-09-17 ソニー株式会社 不揮発性半導体記憶装置およびその製造方法
US6794764B1 (en) * 2003-03-05 2004-09-21 Advanced Micro Devices, Inc. Charge-trapping memory arrays resistant to damage from contact hole information
KR100539158B1 (ko) 2004-04-20 2005-12-26 주식회사 하이닉스반도체 플래쉬 메모리 소자의 게이트간 유전막 형성 방법
JP4951861B2 (ja) * 2004-09-29 2012-06-13 ソニー株式会社 不揮発性メモリデバイスおよびその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03159166A (ja) * 1989-11-08 1991-07-09 Samsung Electron Co Ltd 半導体装置及びその製造方法
JP2004356562A (ja) * 2003-05-30 2004-12-16 Renesas Technology Corp 半導体装置の製造方法および半導体装置
JP2007504668A (ja) * 2003-09-04 2007-03-01 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 電荷損失が減少された窒化物層を備えるメモリセル構造及びその製造方法
JP2006319082A (ja) * 2005-05-12 2006-11-24 Sony Corp 不揮発性半導体メモリデバイス

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010050204A1 (ja) 2008-10-29 2010-05-06 株式会社岡村製作所 椅子の背凭れ
WO2011040396A1 (ja) * 2009-09-30 2011-04-07 東京エレクトロン株式会社 窒化珪素膜の成膜方法および半導体メモリ装置の製造方法
JP2018087906A (ja) * 2016-11-29 2018-06-07 株式会社ジャパンディスプレイ 表示装置

Also Published As

Publication number Publication date
US8063433B2 (en) 2011-11-22
CN101295735A (zh) 2008-10-29
KR100998106B1 (ko) 2010-12-02
TW200908342A (en) 2009-02-16
KR20080096388A (ko) 2008-10-30
US20080265286A1 (en) 2008-10-30
CN101295735B (zh) 2010-09-08

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