JP2008147669A5 - - Google Patents

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Publication number
JP2008147669A5
JP2008147669A5 JP2007317306A JP2007317306A JP2008147669A5 JP 2008147669 A5 JP2008147669 A5 JP 2008147669A5 JP 2007317306 A JP2007317306 A JP 2007317306A JP 2007317306 A JP2007317306 A JP 2007317306A JP 2008147669 A5 JP2008147669 A5 JP 2008147669A5
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JP
Japan
Prior art keywords
equipment
internal interconnect
recess
opening
oite
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2007317306A
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English (en)
Japanese (ja)
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JP2008147669A (ja
JP4947656B2 (ja
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Publication date
Priority claimed from US11/608,827 external-priority patent/US7772683B2/en
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Publication of JP2008147669A publication Critical patent/JP2008147669A/ja
Publication of JP2008147669A5 publication Critical patent/JP2008147669A5/ja
Application granted granted Critical
Publication of JP4947656B2 publication Critical patent/JP4947656B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2007317306A 2006-12-09 2007-12-07 積重ねられた集積回路パッケージインパッケージシステムおよびその製造方法 Active JP4947656B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/608,827 US7772683B2 (en) 2006-12-09 2006-12-09 Stacked integrated circuit package-in-package system
US11/608,827 2006-12-09

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011285712A Division JP5397964B2 (ja) 2006-12-09 2011-12-27 積み重ねられた集積回路パッケージインパッケージシステムおよびその製造方法

Publications (3)

Publication Number Publication Date
JP2008147669A JP2008147669A (ja) 2008-06-26
JP2008147669A5 true JP2008147669A5 (enExample) 2011-01-27
JP4947656B2 JP4947656B2 (ja) 2012-06-06

Family

ID=39497000

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2007317306A Active JP4947656B2 (ja) 2006-12-09 2007-12-07 積重ねられた集積回路パッケージインパッケージシステムおよびその製造方法
JP2011285712A Active JP5397964B2 (ja) 2006-12-09 2011-12-27 積み重ねられた集積回路パッケージインパッケージシステムおよびその製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2011285712A Active JP5397964B2 (ja) 2006-12-09 2011-12-27 積み重ねられた集積回路パッケージインパッケージシステムおよびその製造方法

Country Status (4)

Country Link
US (1) US7772683B2 (enExample)
JP (2) JP4947656B2 (enExample)
KR (1) KR101454883B1 (enExample)
TW (1) TWI345298B (enExample)

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US7746656B2 (en) * 2005-05-16 2010-06-29 Stats Chippac Ltd. Offset integrated circuit package-on-package stacking system
US8432026B2 (en) * 2006-08-04 2013-04-30 Stats Chippac Ltd. Stackable multi-chip package system
US7645638B2 (en) * 2006-08-04 2010-01-12 Stats Chippac Ltd. Stackable multi-chip package system with support structure
US7622333B2 (en) * 2006-08-04 2009-11-24 Stats Chippac Ltd. Integrated circuit package system for package stacking and manufacturing method thereof
US8642383B2 (en) * 2006-09-28 2014-02-04 Stats Chippac Ltd. Dual-die package structure having dies externally and simultaneously connected via bump electrodes and bond wires
US7759783B2 (en) * 2006-12-07 2010-07-20 Stats Chippac Ltd. Integrated circuit package system employing thin profile techniques
US8304874B2 (en) * 2006-12-09 2012-11-06 Stats Chippac Ltd. Stackable integrated circuit package system
US7635913B2 (en) * 2006-12-09 2009-12-22 Stats Chippac Ltd. Stacked integrated circuit package-in-package system
US7772683B2 (en) * 2006-12-09 2010-08-10 Stats Chippac Ltd. Stacked integrated circuit package-in-package system
US8163600B2 (en) * 2006-12-28 2012-04-24 Stats Chippac Ltd. Bridge stack integrated circuit package-on-package system
US9466545B1 (en) * 2007-02-21 2016-10-11 Amkor Technology, Inc. Semiconductor package in package
US7683469B2 (en) * 2008-05-30 2010-03-23 Stats Chippac Ltd. Package-on-package system with heat spreader
US8310061B2 (en) * 2008-12-17 2012-11-13 Qualcomm Incorporated Stacked die parallel plate capacitor
US7785925B2 (en) * 2008-12-19 2010-08-31 Stats Chippac Ltd. Integrated circuit packaging system with package stacking and method of manufacture thereof
KR101686553B1 (ko) 2010-07-12 2016-12-14 삼성전자 주식회사 반도체 패키지 및 패키지 온 패키지
US8553420B2 (en) 2010-10-19 2013-10-08 Tessera, Inc. Enhanced stacked microelectronic assemblies with central contacts and improved thermal characteristics
KR101118711B1 (ko) * 2010-12-17 2012-03-12 테세라, 인코포레이티드 중앙 콘택을 구비한 적층형 마이크로전자 조립체
US8970028B2 (en) 2011-12-29 2015-03-03 Invensas Corporation Embedded heat spreader for package with multiple microelectronic elements and face-down connection
US8952516B2 (en) 2011-04-21 2015-02-10 Tessera, Inc. Multiple die stacking for two or more die
US8338963B2 (en) 2011-04-21 2012-12-25 Tessera, Inc. Multiple die face-down stacking for two or more die
US9013033B2 (en) 2011-04-21 2015-04-21 Tessera, Inc. Multiple die face-down stacking for two or more die
US8304881B1 (en) 2011-04-21 2012-11-06 Tessera, Inc. Flip-chip, face-up and face-down wirebond combination package
US8633576B2 (en) 2011-04-21 2014-01-21 Tessera, Inc. Stacked chip-on-board module with edge connector
US8928153B2 (en) 2011-04-21 2015-01-06 Tessera, Inc. Flip-chip, face-up and face-down centerbond memory wirebond assemblies
DE112013004122T5 (de) * 2012-08-23 2015-05-07 Ps4 Luxco S.A.R.L. Bauelement und Verfahren zu dessen Herstellung
WO2014167871A1 (ja) * 2013-04-10 2014-10-16 株式会社村田製作所 半導体装置
US9123555B2 (en) 2013-10-25 2015-09-01 Invensas Corporation Co-support for XFD packaging
US9871007B2 (en) * 2015-09-25 2018-01-16 Intel Corporation Packaged integrated circuit device with cantilever structure
US10083920B1 (en) * 2018-02-01 2018-09-25 Google Llc Package stiffener for protecting semiconductor die
KR102556518B1 (ko) * 2018-10-18 2023-07-18 에스케이하이닉스 주식회사 상부 칩 스택을 지지하는 서포팅 블록을 포함하는 반도체 패키지
US11398455B2 (en) * 2019-06-03 2022-07-26 Amkor Technology Singapore Holding Pte. Ltd. Semiconductor devices and related methods
KR102767617B1 (ko) * 2019-08-12 2025-02-17 에스케이하이닉스 주식회사 적층 반도체 칩을 포함하는 반도체 패키지

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JP3842272B2 (ja) * 2004-06-02 2006-11-08 株式会社Ｇｅｎｕｓｉｏｎ インターポーザー、半導体チップマウントサブ基板および半導体パッケージ
JP4494240B2 (ja) * 2005-02-03 2010-06-30 富士通マイクロエレクトロニクス株式会社 樹脂封止型半導体装置
US7271496B2 (en) 2005-02-04 2007-09-18 Stats Chippac Ltd. Integrated circuit package-in-package system
EP1863087A4 (en) * 2005-03-17 2010-12-22 Panasonic Corp MODULE CARD
JP2006310649A (ja) * 2005-04-28 2006-11-09 Sharp Corp 半導体装置パッケージおよびその製造方法、ならびに半導体装置パッケージ用一括回路基板
US7288835B2 (en) 2006-03-17 2007-10-30 Stats Chippac Ltd. Integrated circuit package-in-package system
US9202776B2 (en) 2006-06-01 2015-12-01 Stats Chippac Ltd. Stackable multi-chip package system
US7622333B2 (en) 2006-08-04 2009-11-24 Stats Chippac Ltd. Integrated circuit package system for package stacking and manufacturing method thereof
US7645638B2 (en) 2006-08-04 2010-01-12 Stats Chippac Ltd. Stackable multi-chip package system with support structure
US7772683B2 (en) * 2006-12-09 2010-08-10 Stats Chippac Ltd. Stacked integrated circuit package-in-package system

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