JP2007500949A5 - - Google Patents
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- Publication number
- JP2007500949A5 JP2007500949A5 JP2006532423A JP2006532423A JP2007500949A5 JP 2007500949 A5 JP2007500949 A5 JP 2007500949A5 JP 2006532423 A JP2006532423 A JP 2006532423A JP 2006532423 A JP2006532423 A JP 2006532423A JP 2007500949 A5 JP2007500949 A5 JP 2007500949A5
- Authority
- JP
- Japan
- Prior art keywords
- gate structure
- region
- sidewall
- coupled
- row
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 8
- 239000000758 substrate Substances 0.000 claims 4
- 238000000034 method Methods 0.000 claims 1
- 239000011232 storage material Substances 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/443,908 | 2003-05-22 | ||
| US10/443,908 US6903967B2 (en) | 2003-05-22 | 2003-05-22 | Memory with charge storage locations and adjacent gate structures |
| PCT/US2004/011868 WO2004107351A1 (en) | 2003-05-22 | 2004-04-16 | Memory with charge storage locations |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007500949A JP2007500949A (ja) | 2007-01-18 |
| JP2007500949A5 true JP2007500949A5 (enExample) | 2007-06-07 |
| JP4909737B2 JP4909737B2 (ja) | 2012-04-04 |
Family
ID=33489340
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006532423A Expired - Lifetime JP4909737B2 (ja) | 2003-05-22 | 2004-04-16 | 電荷蓄積場所を有するメモリ |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6903967B2 (enExample) |
| JP (1) | JP4909737B2 (enExample) |
| KR (1) | KR20060009955A (enExample) |
| CN (1) | CN100587838C (enExample) |
| TW (1) | TWI257171B (enExample) |
| WO (1) | WO2004107351A1 (enExample) |
Families Citing this family (47)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10131276B4 (de) * | 2001-06-28 | 2007-08-02 | Infineon Technologies Ag | Feldeffekttransistor und Verfahren zu seiner Herstellung |
| DE10220923B4 (de) * | 2002-05-10 | 2006-10-26 | Infineon Technologies Ag | Verfahren zur Herstellung eines nicht-flüchtigen Flash-Halbleiterspeichers |
| KR100517559B1 (ko) * | 2003-06-27 | 2005-09-28 | 삼성전자주식회사 | 핀 전계효과 트랜지스터 및 그의 핀 형성방법 |
| US7196372B1 (en) | 2003-07-08 | 2007-03-27 | Spansion Llc | Flash memory device |
| JP2005064500A (ja) * | 2003-08-14 | 2005-03-10 | Samsung Electronics Co Ltd | マルチ構造のシリコンフィンおよび製造方法 |
| KR100496891B1 (ko) * | 2003-08-14 | 2005-06-23 | 삼성전자주식회사 | 핀 전계효과 트랜지스터를 위한 실리콘 핀 및 그 제조 방법 |
| US6946377B2 (en) * | 2003-10-29 | 2005-09-20 | Texas Instruments Incorporated | Multiple-gate MOSFET device with lithography independent silicon body thickness and methods for fabricating the same |
| US7029958B2 (en) * | 2003-11-04 | 2006-04-18 | Advanced Micro Devices, Inc. | Self aligned damascene gate |
| US7091566B2 (en) * | 2003-11-20 | 2006-08-15 | International Business Machines Corp. | Dual gate FinFet |
| WO2005055326A1 (ja) * | 2003-12-05 | 2005-06-16 | National Institute Of Advanced Industrial Science And Technology | 二重ゲート電界効果トランジスタ |
| KR100598109B1 (ko) * | 2004-10-08 | 2006-07-07 | 삼성전자주식회사 | 비휘발성 기억 소자 및 그 형성 방법 |
| US7397081B2 (en) * | 2004-12-13 | 2008-07-08 | International Business Machines Corporation | Sidewall semiconductor transistors |
| KR100680291B1 (ko) * | 2005-04-22 | 2007-02-07 | 한국과학기술원 | H자형 이중 게이트 구조를 갖는 다중비트 비휘발성 메모리소자와 이의 제조 방법 및 다중비트 동작을 위한 동작방법 |
| KR101172853B1 (ko) * | 2005-07-22 | 2012-08-10 | 삼성전자주식회사 | 반도체 소자의 형성 방법 |
| US7381649B2 (en) * | 2005-07-29 | 2008-06-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure for a multiple-gate FET device and a method for its fabrication |
| US7446372B2 (en) * | 2005-09-01 | 2008-11-04 | Micron Technology, Inc. | DRAM tunneling access transistor |
| KR100652433B1 (ko) * | 2005-09-08 | 2006-12-01 | 삼성전자주식회사 | 다중 비트 저장이 가능한 비휘발성 메모리 소자 및 그 제조방법 |
| WO2007036874A1 (en) * | 2005-09-28 | 2007-04-05 | Nxp B.V. | Finfet-based non-volatile memory device |
| US7968394B2 (en) | 2005-12-16 | 2011-06-28 | Freescale Semiconductor, Inc. | Transistor with immersed contacts and methods of forming thereof |
| US7432122B2 (en) | 2006-01-06 | 2008-10-07 | Freescale Semiconductor, Inc. | Electronic device and a process for forming the electronic device |
| US20070166903A1 (en) * | 2006-01-17 | 2007-07-19 | Bohumil Lojek | Semiconductor structures formed by stepperless manufacturing |
| US20070166971A1 (en) * | 2006-01-17 | 2007-07-19 | Atmel Corporation | Manufacturing of silicon structures smaller than optical resolution limits |
| US7563681B2 (en) * | 2006-01-27 | 2009-07-21 | Freescale Semiconductor, Inc. | Double-gated non-volatile memory and methods for forming thereof |
| US7535060B2 (en) * | 2006-03-08 | 2009-05-19 | Freescale Semiconductor, Inc. | Charge storage structure formation in transistor with vertical channel region |
| US7583542B2 (en) * | 2006-03-28 | 2009-09-01 | Freescale Semiconductor Inc. | Memory with charge storage locations |
| KR100743655B1 (ko) | 2006-06-29 | 2007-07-30 | 주식회사 하이닉스반도체 | 새들 돌기형 트랜지스터의 제조방법 |
| US7432158B1 (en) | 2006-07-25 | 2008-10-07 | Freescale Semiconductor, Inc. | Method for retaining nanocluster size and electrical characteristics during processing |
| US7445984B2 (en) | 2006-07-25 | 2008-11-04 | Freescale Semiconductor, Inc. | Method for removing nanoclusters from selected regions |
| JP2008130645A (ja) * | 2006-11-17 | 2008-06-05 | Oki Electric Ind Co Ltd | 半導体記憶装置 |
| US8223548B2 (en) | 2007-05-24 | 2012-07-17 | National Institute Of Advanced Industrial Science And Technology | Memory device with reduced programming voltage method of reduction of programming voltage and method of reading such memory device |
| TW200847292A (en) * | 2007-05-29 | 2008-12-01 | Nanya Technology Corp | Method of manufacturing a self-aligned FinFET device |
| US7898021B2 (en) * | 2007-10-26 | 2011-03-01 | International Business Machines Corporation | Semiconductor fin based nonvolatile memory device and method for fabrication thereof |
| KR100975912B1 (ko) * | 2008-02-15 | 2010-08-13 | 한양대학교 산학협력단 | 다중 비트 비휘발성 메모리 소자 및 상기 소자의 동작 방법 |
| US7898857B2 (en) * | 2008-03-20 | 2011-03-01 | Micron Technology, Inc. | Memory structure having volatile and non-volatile memory portions |
| US20090309139A1 (en) * | 2008-06-13 | 2009-12-17 | International Business Machines Corporation | Asymmetric gate electrode and method of manufacture |
| US7999332B2 (en) * | 2009-05-14 | 2011-08-16 | International Business Machines Corporation | Asymmetric semiconductor devices and method of fabricating |
| JP2011023637A (ja) * | 2009-07-17 | 2011-02-03 | Toshiba Corp | 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の製造方法 |
| US8021949B2 (en) * | 2009-12-01 | 2011-09-20 | International Business Machines Corporation | Method and structure for forming finFETs with multiple doping regions on a same chip |
| KR101140010B1 (ko) * | 2011-02-28 | 2012-06-14 | 에스케이하이닉스 주식회사 | 반도체 소자 및 그 형성방법 |
| JP2013021277A (ja) * | 2011-07-14 | 2013-01-31 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
| JP5624567B2 (ja) * | 2012-02-03 | 2014-11-12 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
| US8785273B2 (en) | 2012-04-11 | 2014-07-22 | International Business Machines Corporation | FinFET non-volatile memory and method of fabrication |
| US8699273B2 (en) * | 2012-07-31 | 2014-04-15 | Spansion Llc | Bitline voltage regulation in non-volatile memory |
| US9397112B1 (en) * | 2015-02-06 | 2016-07-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | L-shaped capacitor in thin film storage technology |
| WO2019089762A1 (en) * | 2017-11-01 | 2019-05-09 | The Charles Stark Draper Laboratory, Inc. | Vesflash non-volatile memory |
| FR3089343B1 (fr) * | 2018-11-29 | 2021-10-08 | Commissariat Energie Atomique | Procede de realisation d’un transistor fet |
| US20250234516A1 (en) * | 2024-01-16 | 2025-07-17 | Nanya Technology Corporation | Semiconductor structure including polysilicon as bottom layer of bit line structure and method of manufacturing the same |
Family Cites Families (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4859623A (en) * | 1988-02-04 | 1989-08-22 | Amoco Corporation | Method of forming vertical gate thin film transistors in liquid crystal array |
| JPH08204191A (ja) * | 1995-01-20 | 1996-08-09 | Sony Corp | 電界効果トランジスタ及びその製造方法 |
| JP3429941B2 (ja) * | 1996-02-05 | 2003-07-28 | 株式会社日立製作所 | 半導体記憶装置とその製造方法 |
| US5689127A (en) * | 1996-03-05 | 1997-11-18 | International Business Machines Corporation | Vertical double-gate field effect transistor |
| US6150687A (en) * | 1997-07-08 | 2000-11-21 | Micron Technology, Inc. | Memory cell having a vertical transistor with buried source/drain and dual gates |
| US6768165B1 (en) * | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
| US6097065A (en) * | 1998-03-30 | 2000-08-01 | Micron Technology, Inc. | Circuits and methods for dual-gated transistors |
| US6104068A (en) * | 1998-09-01 | 2000-08-15 | Micron Technology, Inc. | Structure and method for improved signal processing |
| DE19846063A1 (de) | 1998-10-07 | 2000-04-20 | Forschungszentrum Juelich Gmbh | Verfahren zur Herstellung eines Double-Gate MOSFETs |
| WO2001017030A1 (en) * | 1999-08-27 | 2001-03-08 | Macronix America, Inc. | Non-volatile memory structure for twin-bit storage and methods of making same |
| JP4923318B2 (ja) * | 1999-12-17 | 2012-04-25 | ソニー株式会社 | 不揮発性半導体記憶装置およびその動作方法 |
| US6172905B1 (en) * | 2000-02-01 | 2001-01-09 | Motorola, Inc. | Method of operating a semiconductor device |
| US6413802B1 (en) * | 2000-10-23 | 2002-07-02 | The Regents Of The University Of California | Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture |
| US6372559B1 (en) * | 2000-11-09 | 2002-04-16 | International Business Machines Corporation | Method for self-aligned vertical double-gate MOSFET |
| US6472258B1 (en) * | 2000-11-13 | 2002-10-29 | International Business Machines Corporation | Double gate trench transistor |
| US6396108B1 (en) * | 2000-11-13 | 2002-05-28 | Advanced Micro Devices, Inc. | Self-aligned double gate silicon-on-insulator (SOI) device |
| US6300182B1 (en) * | 2000-12-11 | 2001-10-09 | Advanced Micro Devices, Inc. | Field effect transistor having dual gates with asymmetrical doping for reduced threshold voltage |
| US6424001B1 (en) * | 2001-02-09 | 2002-07-23 | Micron Technology, Inc. | Flash memory with ultra thin vertical body transistors |
| US6566682B2 (en) * | 2001-02-09 | 2003-05-20 | Micron Technology, Inc. | Programmable memory address and decode circuits with ultra thin vertical body transistors |
| US6531350B2 (en) * | 2001-02-22 | 2003-03-11 | Halo, Inc. | Twin MONOS cell fabrication method and array organization |
| US6458662B1 (en) * | 2001-04-04 | 2002-10-01 | Advanced Micro Devices, Inc. | Method of fabricating a semiconductor device having an asymmetrical dual-gate silicon-germanium (SiGe) channel MOSFET and a device thereby formed |
| DE10125967C1 (de) | 2001-05-29 | 2002-07-11 | Infineon Technologies Ag | DRAM-Zellanordnung mit vertikalen MOS-Transistoren und Verfahren zu deren Herstellung |
| KR100431489B1 (ko) * | 2001-09-04 | 2004-05-12 | 한국과학기술원 | 플래쉬 메모리 소자 및 제조방법 |
| US6689650B2 (en) * | 2001-09-27 | 2004-02-10 | International Business Machines Corporation | Fin field effect transistor with self-aligned gate |
| EP1300888B1 (en) * | 2001-10-08 | 2013-03-13 | STMicroelectronics Srl | Process for manufacturing a dual charge storage location memory cell |
| US6433609B1 (en) * | 2001-11-19 | 2002-08-13 | International Business Machines Corporation | Double-gate low power SOI active clamp network for single power supply and multiple power supply applications |
| US6800905B2 (en) * | 2001-12-14 | 2004-10-05 | International Business Machines Corporation | Implanted asymmetric doped polysilicon gate FinFET |
| US6583469B1 (en) * | 2002-01-28 | 2003-06-24 | International Business Machines Corporation | Self-aligned dog-bone structure for FinFET applications and methods to fabricate the same |
| US6657252B2 (en) * | 2002-03-19 | 2003-12-02 | International Business Machines Corporation | FinFET CMOS with NVRAM capability |
| US6846734B2 (en) * | 2002-11-20 | 2005-01-25 | International Business Machines Corporation | Method and process to make multiple-threshold metal gates CMOS technology |
-
2003
- 2003-05-22 US US10/443,908 patent/US6903967B2/en not_active Expired - Lifetime
-
2004
- 2004-04-16 JP JP2006532423A patent/JP4909737B2/ja not_active Expired - Lifetime
- 2004-04-16 WO PCT/US2004/011868 patent/WO2004107351A1/en not_active Ceased
- 2004-04-16 CN CN200480014053A patent/CN100587838C/zh not_active Expired - Lifetime
- 2004-04-16 KR KR1020057022358A patent/KR20060009955A/ko not_active Ceased
- 2004-04-27 TW TW093111766A patent/TWI257171B/zh not_active IP Right Cessation
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