JP2006516174A - 半導体プロセスにシリサイドコンタクトを使用する方法 - Google Patents
半導体プロセスにシリサイドコンタクトを使用する方法 Download PDFInfo
- Publication number
- JP2006516174A JP2006516174A JP2004515734A JP2004515734A JP2006516174A JP 2006516174 A JP2006516174 A JP 2006516174A JP 2004515734 A JP2004515734 A JP 2004515734A JP 2004515734 A JP2004515734 A JP 2004515734A JP 2006516174 A JP2006516174 A JP 2006516174A
- Authority
- JP
- Japan
- Prior art keywords
- silicide
- metal
- nisi
- layer
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/50—Alloying conductive materials with semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
- H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
- H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
Landscapes
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/180,858 US6689688B2 (en) | 2002-06-25 | 2002-06-25 | Method and device using silicide contacts for semiconductor processing |
| PCT/US2003/017599 WO2004001826A1 (en) | 2002-06-25 | 2003-06-04 | Method using silicide contacts for semiconductor processing |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006516174A true JP2006516174A (ja) | 2006-06-22 |
| JP2006516174A5 JP2006516174A5 (https=) | 2006-08-03 |
Family
ID=29735101
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004515734A Ceased JP2006516174A (ja) | 2002-06-25 | 2003-06-04 | 半導体プロセスにシリサイドコンタクトを使用する方法 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6689688B2 (https=) |
| EP (1) | EP1522093A1 (https=) |
| JP (1) | JP2006516174A (https=) |
| KR (1) | KR20050009761A (https=) |
| CN (1) | CN1663027B (https=) |
| AU (1) | AU2003278824A1 (https=) |
| TW (1) | TWI298521B (https=) |
| WO (1) | WO2004001826A1 (https=) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007067225A (ja) * | 2005-08-31 | 2007-03-15 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP2007165796A (ja) * | 2005-12-16 | 2007-06-28 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP2009094395A (ja) * | 2007-10-11 | 2009-04-30 | Renesas Technology Corp | 半導体装置およびその製造方法 |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2003272444A1 (en) * | 2002-09-30 | 2004-04-23 | Advanced Micro Devices, Inc. | Circuit element having a metal silicide region thermally stabilized by a barrier diffusion material |
| DE10245607B4 (de) | 2002-09-30 | 2009-07-16 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Bilden von Schaltungselementen mit Nickelsilizidgebieten, die durch ein Barrierendiffusionsmaterial thermisch stabilisiert sind sowie Verfahren zur Herstellung einer Nickelmonosilizidschicht |
| JP3840198B2 (ja) * | 2003-04-28 | 2006-11-01 | 株式会社東芝 | 半導体装置およびその製造方法 |
| JP4349131B2 (ja) * | 2004-01-09 | 2009-10-21 | ソニー株式会社 | バイポーラトランジスタの製造方法及び半導体装置の製造方法 |
| US20050212015A1 (en) * | 2004-03-25 | 2005-09-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Metal gate semiconductor device and manufacturing method |
| JP2005294360A (ja) * | 2004-03-31 | 2005-10-20 | Nec Electronics Corp | 半導体装置の製造方法 |
| US20050221612A1 (en) * | 2004-04-05 | 2005-10-06 | International Business Machines Corporation | A low thermal budget (mol) liner, a semiconductor device comprising said liner and method of forming said semiconductor device |
| US7241674B2 (en) * | 2004-05-13 | 2007-07-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming silicided gate structure |
| US7015126B2 (en) * | 2004-06-03 | 2006-03-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming silicided gate structure |
| JP2006013270A (ja) * | 2004-06-29 | 2006-01-12 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7396767B2 (en) * | 2004-07-16 | 2008-07-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure including silicide regions and method of making same |
| US7135372B2 (en) * | 2004-09-09 | 2006-11-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained silicon device manufacturing method |
| KR100618877B1 (ko) * | 2004-11-19 | 2006-09-08 | 삼성전자주식회사 | 멀티비트 비휘발성 메모리 소자, 그 동작 방법 및 그 제조방법 |
| JP2006147897A (ja) * | 2004-11-22 | 2006-06-08 | Samsung Electronics Co Ltd | 半導体装置の製造方法 |
| JP4146859B2 (ja) * | 2004-11-30 | 2008-09-10 | 松下電器産業株式会社 | 半導体装置の製造方法 |
| JP2006261635A (ja) * | 2005-02-21 | 2006-09-28 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US20060246720A1 (en) * | 2005-04-28 | 2006-11-02 | Chii-Ming Wu | Method to improve thermal stability of silicides with additives |
| CN100434569C (zh) * | 2005-10-14 | 2008-11-19 | 首都师范大学 | 一种环保的活塞环表面改性方法 |
| JP2007142347A (ja) | 2005-10-19 | 2007-06-07 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US20070221993A1 (en) * | 2006-03-27 | 2007-09-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for making a thermally stable silicide |
| TW200910526A (en) * | 2007-07-03 | 2009-03-01 | Renesas Tech Corp | Method of manufacturing semiconductor device |
| US7981749B2 (en) * | 2007-08-20 | 2011-07-19 | GlobalFoundries, Inc. | MOS structures that exhibit lower contact resistance and methods for fabricating the same |
| US8435862B2 (en) * | 2010-03-29 | 2013-05-07 | Renesas Electronics Corporation | Method of manufacturing semiconductor device |
| CN102290325A (zh) * | 2010-06-21 | 2011-12-21 | 无锡华润上华半导体有限公司 | 金属硅化物的清洗方法 |
| CN102543701B (zh) * | 2010-12-24 | 2014-05-14 | 中芯国际集成电路制造(上海)有限公司 | 制作金属硅化物的方法 |
| CN102569054A (zh) * | 2012-02-27 | 2012-07-11 | 中国科学院微电子研究所 | 一种t型栅的制备方法 |
| US8927422B2 (en) | 2012-06-18 | 2015-01-06 | International Business Machines Corporation | Raised silicide contact |
| US9240454B1 (en) * | 2014-10-22 | 2016-01-19 | Stmicroelectronics, Inc. | Integrated circuit including a liner silicide with low contact resistance |
| US20240072125A1 (en) * | 2022-08-23 | 2024-02-29 | Wolfspeed, Inc. | Electronic devices with reduced ohmic to ohmic dimensions |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH098297A (ja) * | 1995-06-26 | 1997-01-10 | Mitsubishi Electric Corp | 半導体装置、その製造方法及び電界効果トランジスタ |
| JPH10163130A (ja) * | 1996-11-27 | 1998-06-19 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| JPH1187711A (ja) * | 1997-07-03 | 1999-03-30 | Texas Instr Inc <Ti> | トランジスタ製造方法 |
| US6165903A (en) * | 1998-11-04 | 2000-12-26 | Advanced Micro Devices, Inc. | Method of forming ultra-shallow junctions in a semiconductor wafer with deposited silicon layer to reduce silicon consumption during salicidation |
| US6180469B1 (en) * | 1998-11-06 | 2001-01-30 | Advanced Micro Devices, Inc. | Low resistance salicide technology with reduced silicon consumption |
| JP2001077050A (ja) * | 1999-08-31 | 2001-03-23 | Toshiba Corp | 半導体装置の製造方法 |
| JP2002367929A (ja) * | 2001-05-02 | 2002-12-20 | Sharp Corp | 超浅接合形成部において用いられるイリジウムを含む熱安定性の高いニッケルシリサイドおよびその製造方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3149937B2 (ja) * | 1997-12-08 | 2001-03-26 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| US6440851B1 (en) * | 1999-10-12 | 2002-08-27 | International Business Machines Corporation | Method and structure for controlling the interface roughness of cobalt disilicide |
| US6413859B1 (en) * | 2000-03-06 | 2002-07-02 | International Business Machines Corporation | Method and structure for retarding high temperature agglomeration of silicides using alloys |
| US6890854B2 (en) * | 2000-11-29 | 2005-05-10 | Chartered Semiconductor Manufacturing, Inc. | Method and apparatus for performing nickel salicidation |
| US6380057B1 (en) | 2001-02-13 | 2002-04-30 | Advanced Micro Devices, Inc. | Enhancement of nickel silicide formation by use of nickel pre-amorphizing implant |
| US6444578B1 (en) * | 2001-02-21 | 2002-09-03 | International Business Machines Corporation | Self-aligned silicide process for reduction of Si consumption in shallow junction and thin SOI electronic devices |
-
2002
- 2002-06-25 US US10/180,858 patent/US6689688B2/en not_active Expired - Fee Related
-
2003
- 2003-06-04 WO PCT/US2003/017599 patent/WO2004001826A1/en not_active Ceased
- 2003-06-04 EP EP03741873A patent/EP1522093A1/en not_active Withdrawn
- 2003-06-04 KR KR10-2004-7021193A patent/KR20050009761A/ko not_active Ceased
- 2003-06-04 JP JP2004515734A patent/JP2006516174A/ja not_active Ceased
- 2003-06-04 AU AU2003278824A patent/AU2003278824A1/en not_active Abandoned
- 2003-06-04 CN CN038149540A patent/CN1663027B/zh not_active Expired - Fee Related
- 2003-06-18 TW TW092116497A patent/TWI298521B/zh not_active IP Right Cessation
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH098297A (ja) * | 1995-06-26 | 1997-01-10 | Mitsubishi Electric Corp | 半導体装置、その製造方法及び電界効果トランジスタ |
| JPH10163130A (ja) * | 1996-11-27 | 1998-06-19 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| JPH1187711A (ja) * | 1997-07-03 | 1999-03-30 | Texas Instr Inc <Ti> | トランジスタ製造方法 |
| US6165903A (en) * | 1998-11-04 | 2000-12-26 | Advanced Micro Devices, Inc. | Method of forming ultra-shallow junctions in a semiconductor wafer with deposited silicon layer to reduce silicon consumption during salicidation |
| US6180469B1 (en) * | 1998-11-06 | 2001-01-30 | Advanced Micro Devices, Inc. | Low resistance salicide technology with reduced silicon consumption |
| JP2001077050A (ja) * | 1999-08-31 | 2001-03-23 | Toshiba Corp | 半導体装置の製造方法 |
| JP2002367929A (ja) * | 2001-05-02 | 2002-12-20 | Sharp Corp | 超浅接合形成部において用いられるイリジウムを含む熱安定性の高いニッケルシリサイドおよびその製造方法 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007067225A (ja) * | 2005-08-31 | 2007-03-15 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP2007165796A (ja) * | 2005-12-16 | 2007-06-28 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP2009094395A (ja) * | 2007-10-11 | 2009-04-30 | Renesas Technology Corp | 半導体装置およびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI298521B (en) | 2008-07-01 |
| AU2003278824A1 (en) | 2004-01-06 |
| CN1663027B (zh) | 2010-12-08 |
| US6689688B2 (en) | 2004-02-10 |
| US20030235984A1 (en) | 2003-12-25 |
| CN1663027A (zh) | 2005-08-31 |
| EP1522093A1 (en) | 2005-04-13 |
| TW200400571A (en) | 2004-01-01 |
| WO2004001826A1 (en) | 2003-12-31 |
| KR20050009761A (ko) | 2005-01-25 |
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