JP2006511964A - フリップチップ及びフリップチップアセンブリのための選択的アンダーフィル - Google Patents
フリップチップ及びフリップチップアセンブリのための選択的アンダーフィル Download PDFInfo
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- JP2006511964A JP2006511964A JP2004565383A JP2004565383A JP2006511964A JP 2006511964 A JP2006511964 A JP 2006511964A JP 2004565383 A JP2004565383 A JP 2004565383A JP 2004565383 A JP2004565383 A JP 2004565383A JP 2006511964 A JP2006511964 A JP 2006511964A
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- Prior art keywords
- flip chip
- underfill
- electromechanical
- bump
- underfill material
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- 239000000463 material Substances 0.000 claims abstract description 212
- 230000005693 optoelectronics Effects 0.000 claims abstract description 84
- 238000000034 method Methods 0.000 claims abstract description 56
- 238000010438 heat treatment Methods 0.000 claims abstract description 8
- 230000003287 optical effect Effects 0.000 claims description 74
- 239000004065 semiconductor Substances 0.000 claims description 57
- 229910000679 solder Inorganic materials 0.000 claims description 53
- 239000000758 substrate Substances 0.000 claims description 43
- 230000008569 process Effects 0.000 claims description 27
- 239000010409 thin film Substances 0.000 claims description 24
- 239000004642 Polyimide Substances 0.000 claims description 22
- 229920001721 polyimide Polymers 0.000 claims description 22
- 239000004593 Epoxy Substances 0.000 claims description 20
- 239000010408 film Substances 0.000 claims description 18
- 239000004814 polyurethane Substances 0.000 claims description 18
- 229920002635 polyurethane Polymers 0.000 claims description 18
- 239000012815 thermoplastic material Substances 0.000 claims description 18
- 229920001187 thermosetting polymer Polymers 0.000 claims description 18
- 239000002861 polymer material Substances 0.000 claims description 11
- 150000001875 compounds Chemical class 0.000 claims description 10
- 238000010897 surface acoustic wave method Methods 0.000 claims description 8
- 238000003825 pressing Methods 0.000 claims description 5
- 239000000919 ceramic Substances 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 12
- 230000005540 biological transmission Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 239000000945 filler Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000012780 transparent material Substances 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 238000000429 assembly Methods 0.000 description 2
- 230000000712 assembly Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000002452 interceptive effect Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 239000004005 microsphere Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- QTBSBXVTEAMEQO-UHFFFAOYSA-M Acetate Chemical compound CC([O-])=O QTBSBXVTEAMEQO-UHFFFAOYSA-M 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229920002799 BoPET Polymers 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000013036 cure process Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000010494 dissociation reaction Methods 0.000 description 1
- 230000005593 dissociations Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 230000009969 flowable effect Effects 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000000499 gel Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 210000003097 mucus Anatomy 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00333—Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H—ELECTRICITY
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
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- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
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- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
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- H01L2224/29001—Core members of the layer connector
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- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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Abstract
Description
分散が発生し得る。圧電デバイス、又は表面微小化機械リレー(surface micromachine relay)等の機械的、又は音声的動作構造を有する電気機械デバイスでは、そのデバイスの
作動を妨害しないように電気機械素子を覆うアンダーフィル材を設けることが不可能である。
2の開示においては、導光管のクラッドの屈折率よりも小さい屈折率を有する透明なアンダーフィル樹脂が、フリップチップ上、及びプリント配線板上の光デバイス間のアンダーフィル材として使用されている。他の製造業者は、アンダーフィルに付随する利点は損失されるが、アンダーフィル材が全く塗布されていないはんだバンプを用いることによって、フリップチップ上の光電子デバイスと、プリント配線板上のマイクロレンズ、導光管、又は他の光学素子との間の光の伝達を妨害させない。
電子デバイス、又は電気機械デバイスと、少なくとも一つのはんだバンプとを有するバンプ形成半導体ウエハを、パターン化されたマスクに整合する。パターン化マスクは少なくとも一つの光電子、又は電気機械デバイスに対応する少なくとも一つのバリア状部分を有し得る。パターン化マスクを介してアンダーフィル材をバンプ形成半導体ウエハ上に分配して、光電子、及び電気機械デバイスをアンダーフィル材が存在しない状態に保つ。アンダーフィルを加熱して、はんだバンプ周囲のアンダーフィル材を流動させるとともに、光電子、又は電気機械デバイスをアンダーフィル材が存在しない状態に維持する。
な接合強度を付与し、また、電気接続されたフリップチップの緊張を緩和する。
4を有し得る。フリップチップ210は一つ以上の発光ダイオード、半導体レーザ、垂直共振器型面発光レーザ、端面発光レーザ、フォトエミッタ、光エミッタ、又は光ディテクタを有し得る。フリップチップ210は、導光管、マイクロレンズ又はマイクロレンズ・アレイ等の屈折素子、鏡等の反射素子、又は光学素子等、一つ以上の受動光デバイスを有し得る。フリップチップ210はこれら能動素子及び受動素子の任意の組み合わせを有し得る。
プチップ210の光学、及び電気機械部分260の全部が選択的アンダーフィル材240を有さない必要はない。
チップ上の光デバイスが、プリント配線板上の対応する光デバイスに整合するように、フリップチップをプリント配線板上に配置し得る。プリント配線板は、単層、又は複層からなるFR4基板、有機回路基板、マザーボード、光電子モジュール、電気機械モジュール、セラミック基板、ハイブリッド回路基板、パッケージ基板、半導体基板、ポリイミドテープ、フレックス回路、高密度相互接続基板、電気機械回路基板、又は光電子回路基板であり得る。
ジェット・ノズルを用いた書き込み等、他の工程によりアンダーフィル材を堆積させてもよい。
材のステージ温度は、通常80〜150℃である。乾燥時間は2〜20分間以上であり得る。アンダーフィル材は本ステップ中に半硬化され得る。
Claims (31)
- フリップチップをプリント配線板に装着する方法であって、
バンプが形成されたフリップチップを提供する工程と、
前記フリップチップの第一の部分にアンダーフィル材を適用する工程と、フリップチップの第二の部分はアンダーフィル材を有さないことと、
前記フリップチップをプリント配線板上に配置する工程と、
前記フリップチップのバンプ形成部分を加熱して、同フリップチップをプリント配線板に対して電気接続する工程と、前記フリップチップがプリント配線板に対して電気接続される際に、フリップチップの第二の部分はアンダーフィル材を有さない状態に維持されることとを含む方法。 - 前記バンプ形成フリップチップは、同フリップチップの活性表面上において少なくとも一つのはんだバンプ、及びはんだボールのいずれか一方を備える請求項1に記載の方法。
- 前記フリップチップの第二の部分は、少なくとも一つの光デバイスを備える請求項1に記載の方法。
- 前記光デバイスは、フォトダイオード、フォトディテクタ、フォトダイオード・アレイ、フォトディテクタ・アレイ、発光ダイオード、半導体レーザ、垂直共振器型面発光レーザ、端面発光レーザ、フォトエミッタ、光エミッタ、光ディテクタ、導光管、屈折素子、反射素子、光学素子、及びこれらの組み合わせから選択される請求項3に記載の方法。
- 前記フリップチップの第二の部分は、少なくとも一つの電気機械デバイスを有する請求項1に記載の方法。
- 前記電気機械デバイスは、電気機械フィルタ、電気機械リレー、音声エミッタ、音声ディテクタ、弾性表面波デバイス、バルク弾性波デバイス、薄膜機械素子、マイクロ流体デバイス、及び微小電気機械デバイスから選択される請求項5に記載の方法。
- 前記アンダーフィル材を適用する工程は、
パターン化されたマスクを前記フリップチップのバンプ形成面に配置する工程と、
前記パターン化マスクの全体にアンダーフィル材を分配する工程とを含む請求項1に記載の方法。 - 前記アンダーフィル材は、少なくとも一つのバンプの高さより厚く分配される請求項7に記載の方法。
- 前記アンダーフィル材を適用する工程は、
パターン化されたアンダーフィルの薄膜を、フリップチップのバンプ形成面に対向して配置する工程と、
前記パターン化アンダーフィル薄膜をフリップチップ上に加圧する工程とを含む請求項1に記載の方法。 - 前記アンダーフィル材は不透明である請求項1に記載の方法。
- 前記アンダーフィル材は、電気接続されたフリップチップの緊張を緩和する請求項1に記載の方法。
- 前記アンダーフィル材は、エポキシ、熱可塑性材料、熱硬化性材料、ポリイミド、ポリ
ウレタン、高分子材料、充填エポキシ、充填熱可塑性材料、充填熱硬化性材料、充填ポリイミド、充填ポリウレタン、充填高分子材料、及び適切なアンダーフィル化合物から選択された材料を含む請求項1に記載の方法。 - 前記プリント配線板は、FR4基板、有機回路基板、マザーボード、光電子モジュール、電気機械モジュール、セラミック基板、ハイブリッド回路基板、パッケージ基板、半導体基板、ポリイミドテープ、フレックス回路、高密度相互接続基板、電気機械回路基板、及び光電子回路基板から選択される請求項1に記載の方法。
- 前記バンプ形成フリップチップのバンプ形成部分は、同フリップチップのリフロー温度に加熱される請求項1に記載の方法。
- 第一の部分と第二の部分とを有するバンプ形成フリップチップと、
前記フリップチップの第一の部分上に配置されたアンダーフィル材とを備え、
前記フリップチップの第二の部分は、フリップチップがプリント配線板上に配置されて、フリップチップをプリント配線板に対して電気接続するために加熱される際に、アンダーフィル材を有さない状態に維持されるフリップチップアセンブリ。 - 前記フリップチップは、同フリップチップの活性表面上に少なくとも一つのはんだバンプ、及びはんだボールのいずれか一方を有する請求項15に記載のアセンブリ。
- 前記フリップチップの第二の部分は、少なくとも一つの光デバイスを備える請求項15に記載のアセンブリ。
- 前記光デバイスは、フォトダイオード、フォトディテクタ、フォトダイオード・アレイ、フォトディテクタ・アレイ、発光ダイオード、半導体レーザ、垂直共振器型面発光レーザ、端面発光レーザ、フォトエミッタ、光エミッタ、光ディテクタ、導光管、屈折素子、反射素子、光学素子、及びこれらの組み合わせから選択される請求項17に記載のアセンブリ。
- 前記フリップチップの第二の部分は、少なくとも一つの電気機械デバイスを有する請求項15に記載のアセンブリ。
- 前記電気機械デバイスは、電気機械フィルタ、電気機械リレー、音声エミッタ、音声ディテクタ、弾性表面波デバイス、バルク弾性波デバイス、薄膜機械素子、マイクロ流体デバイス、及び微小電気機械デバイスから選択される請求項19に記載のアセンブリ。
- 前記アンダーフィル材は、エポキシ、熱可塑性材料、熱硬化性材料、ポリイミド、ポリウレタン、高分子材料、充填エポキシ、充填熱可塑性材料、充填熱硬化性材料、充填ポリイミド、充填ポリウレタン、充填高分子材料、及び適切なアンダーフィル化合物から選択された材料を含む請求項15に記載のアセンブリ。
- 更にプリント配線板を備え、前記フリップチップの活性表面が同プリント配線板上に配置され、かつ固定されており、フリップチップの第二の部分内の少なくとも一つの光電子デバイスが、プリント配線板上の関連するデバイスに対して光学的に接続されている請求項15に記載のアセンブリ。
- 前記プリント配線板は、FR4基板、有機回路基板、マザーボード、光電子モジュール、電気機械モジュール、セラミック基板、ハイブリッド回路基板、パッケージ基板、半導体基板、ポリイミドテープ、フレックス回路、高密度相互接続基板、電気機械回路基板、
及び光電子回路基板から選択される請求項22に記載のアセンブリ。 - バンプが形成された半導体ウエハを提供する工程と、同バンプ形成半導体ウエハは少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方と、少なくとも一つのはんだバンプとを備えていることと、
前記バンプ形成半導体ウエハに、パターン化されたマスクを整合する工程と、同パターン化マスクは、少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方に対応する少なくとも一つのバリア状部分を備えていることと、
前記パターン化マスクを介してアンダーフィル材をバンプ形成半導体ウエハ上に分配する工程と、前記少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方はアンダーフィル材を有さないことと、
前記アンダーフィル材を加熱する工程と、前記少なくとも一つのはんだバンプの周囲においてアンダーフィル材を流動させる一方で、少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方は、アンダーフィルを有さない状態に維持されることとを含むプロセス。 - 前記バンプ形成半導体ウエハは、少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方を有するシリコンウエハからなる請求項24に記載のプロセス。
- 前記アンダーフィル材は、エポキシ、熱可塑性材料、熱硬化性材料、ポリイミド、ポリウレタン、高分子材料、充填エポキシ、充填熱可塑性材料、充填熱硬化性材料、充填ポリイミド、充填ポリウレタン、充填高分子材料、及び適切なアンダーフィル化合物から選択される請求項24に記載のプロセス。
- 前記アンダーフィル材は、同アンダーフィル材のステージ温度に加熱される請求項24に記載のプロセス。
- バンプが形成された半導体ウエハを提供する工程と、同バンプ形成半導体ウエハは、少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方と、少なくとも一つのはんだバンプとを備えていることと、
パターン化されたアンダーフィルの薄膜を前記バンプ形成半導体ウエハに整合する工程と、同パターン化アンダーフィル薄膜は、後部支持層と、同支持層上に配置されたアンダーフィル材と、前記少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方に対応する少なくとも一つの開口部とを備えていることと、
前記パターン化アンダーフィル薄膜をバンプ形成半導体ウエハに貼付する工程と、
前記パターン化アンダーフィル薄膜から後部支持層を除去する工程と、アンダーフィル材の層はバンプ形成半導体ウエハに貼付された状態に維持され、前記少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方はアンダーフィル材を有さないことと、
前記アンダーフィル材を加熱する工程と、前記少なくとも一つのはんだバンプの周囲においてアンダーフィル材を流動させる一方で、少なくとも一つの光電子デバイス、及び電気機械デバイスのいずれか一方は、アンダーフィル材を有さない状態に維持されることとを含む選択的アンダーフィルプロセス。 - 前記アンダーフィル材は、エポキシ、熱可塑性材料、熱硬化性材料、ポリイミド、ポリウレタン、高分子材料、充填エポキシ、充填熱可塑性材料、充填熱硬化性材料、充填ポリイミド、充填ポリウレタン、充填高分子材料、及び適切なアンダーフィル化合物から選択される請求項28に記載のプロセス。
- 前記パターン化アンダーフィル薄膜を貼付する工程は、パターン化アンダーフィル薄膜
とバンプ形成半導体ウエハとが貼付温度にあるときに、パターン化アンダーフィル薄膜をバンプ形成半導体ウエハに対して加圧する工程を含む請求項28に記載のプロセス。 - 前記パターン化アンダーフィル薄膜を貼付する工程は、パターン化アンダーフィル薄膜とバンプ形成半導体ウエハとの間の領域を揚出する工程と、パターン化アンダーフィル薄膜とバンプ形成半導体ウエハとを貼付温度に加熱する工程とを含む請求項28に記載のプロセス。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US10/328,326 US6800946B2 (en) | 2002-12-23 | 2002-12-23 | Selective underfill for flip chips and flip-chip assemblies |
PCT/US2003/039425 WO2004061934A1 (en) | 2002-12-23 | 2003-12-11 | Selective underfill for flip chips and flip-chip assemblies |
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JP2006511964A true JP2006511964A (ja) | 2006-04-06 |
JP2006511964A5 JP2006511964A5 (ja) | 2007-02-08 |
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JP2004565383A Pending JP2006511964A (ja) | 2002-12-23 | 2003-12-11 | フリップチップ及びフリップチップアセンブリのための選択的アンダーフィル |
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US (1) | US6800946B2 (ja) |
JP (1) | JP2006511964A (ja) |
KR (1) | KR20050084487A (ja) |
AU (1) | AU2003296497A1 (ja) |
WO (1) | WO2004061934A1 (ja) |
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Also Published As
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KR20050084487A (ko) | 2005-08-26 |
US6800946B2 (en) | 2004-10-05 |
AU2003296497A1 (en) | 2004-07-29 |
US20040118599A1 (en) | 2004-06-24 |
WO2004061934A1 (en) | 2004-07-22 |
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