JP2006503442A5 - - Google Patents

Download PDF

Info

Publication number
JP2006503442A5
JP2006503442A5 JP2004548388A JP2004548388A JP2006503442A5 JP 2006503442 A5 JP2006503442 A5 JP 2006503442A5 JP 2004548388 A JP2004548388 A JP 2004548388A JP 2004548388 A JP2004548388 A JP 2004548388A JP 2006503442 A5 JP2006503442 A5 JP 2006503442A5
Authority
JP
Japan
Prior art keywords
layer
semiconductor device
compressible material
insulating layer
material layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004548388A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006503442A (ja
Filing date
Publication date
Priority claimed from US10/272,979 external-priority patent/US6707106B1/en
Application filed filed Critical
Publication of JP2006503442A publication Critical patent/JP2006503442A/ja
Publication of JP2006503442A5 publication Critical patent/JP2006503442A5/ja
Pending legal-status Critical Current

Links

JP2004548388A 2002-10-18 2003-10-14 埋め込み酸化物層の圧縮材料に導入される伸張性のストレインシリコンを備えた半導体デバイス Pending JP2006503442A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/272,979 US6707106B1 (en) 2002-10-18 2002-10-18 Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer
PCT/US2003/032770 WO2004040619A2 (en) 2002-10-18 2003-10-14 Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer

Publications (2)

Publication Number Publication Date
JP2006503442A JP2006503442A (ja) 2006-01-26
JP2006503442A5 true JP2006503442A5 (enExample) 2006-12-14

Family

ID=31946532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004548388A Pending JP2006503442A (ja) 2002-10-18 2003-10-14 埋め込み酸化物層の圧縮材料に導入される伸張性のストレインシリコンを備えた半導体デバイス

Country Status (8)

Country Link
US (1) US6707106B1 (enExample)
EP (1) EP1552554A2 (enExample)
JP (1) JP2006503442A (enExample)
KR (1) KR101018835B1 (enExample)
CN (1) CN1320628C (enExample)
AU (1) AU2003299550A1 (enExample)
TW (1) TWI324787B (enExample)
WO (1) WO2004040619A2 (enExample)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7227176B2 (en) 1998-04-10 2007-06-05 Massachusetts Institute Of Technology Etch stop layer system
US6573126B2 (en) * 2000-08-16 2003-06-03 Massachusetts Institute Of Technology Process for producing semiconductor article using graded epitaxial growth
US6940089B2 (en) * 2001-04-04 2005-09-06 Massachusetts Institute Of Technology Semiconductor device structure
WO2003079415A2 (en) * 2002-03-14 2003-09-25 Amberwave Systems Corporation Methods for fabricating strained layers on semiconductor substrates
US7307273B2 (en) * 2002-06-07 2007-12-11 Amberwave Systems Corporation Control of strain in device layers by selective relaxation
US7335545B2 (en) * 2002-06-07 2008-02-26 Amberwave Systems Corporation Control of strain in device layers by prevention of relaxation
US6995430B2 (en) * 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US20030227057A1 (en) * 2002-06-07 2003-12-11 Lochtefeld Anthony J. Strained-semiconductor-on-insulator device structures
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
JP3664704B2 (ja) * 2002-10-03 2005-06-29 沖電気工業株式会社 半導体装置
KR100498475B1 (ko) * 2003-01-07 2005-07-01 삼성전자주식회사 모스 전계 효과 트랜지스터 구조 및 그 제조 방법
US6916694B2 (en) * 2003-08-28 2005-07-12 International Business Machines Corporation Strained silicon-channel MOSFET using a damascene gate process
US7144818B2 (en) * 2003-12-05 2006-12-05 Advanced Micro Devices, Inc. Semiconductor substrate and processes therefor
JP2006041135A (ja) * 2004-07-26 2006-02-09 Sumitomo Bakelite Co Ltd 電子デバイスおよびその製造方法
EP1782472B1 (en) * 2004-08-18 2011-10-05 Corning Incorporated Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures
US7112848B2 (en) * 2004-09-13 2006-09-26 Taiwan Semiconductor Manufacturing Company, Ltd. Thin channel MOSFET with source/drain stressors
US7078722B2 (en) * 2004-09-20 2006-07-18 International Business Machines Corporation NFET and PFET devices and methods of fabricating same
US7204162B2 (en) * 2004-11-23 2007-04-17 Delphi Technologies, Inc. Capacitive strain gauge
US7393733B2 (en) * 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
US20060113603A1 (en) * 2004-12-01 2006-06-01 Amberwave Systems Corporation Hybrid semiconductor-on-insulator structures and related methods
US7585711B2 (en) * 2006-08-02 2009-09-08 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor-on-insulator (SOI) strained active area transistor
US7528056B2 (en) * 2007-01-12 2009-05-05 International Business Machines Corporation Low-cost strained SOI substrate for high-performance CMOS technology
US7737498B2 (en) * 2008-05-07 2010-06-15 International Business Machines Corporation Enhanced stress-retention silicon-on-insulator devices and methods of fabricating enhanced stress retention silicon-on-insulator devices
US8084822B2 (en) * 2009-09-30 2011-12-27 International Business Machines Corporation Enhanced stress-retention fin-FET devices and methods of fabricating enhanced stress retention fin-FET devices
US8361867B2 (en) 2010-03-19 2013-01-29 Acorn Technologies, Inc. Biaxial strained field effect transistor devices
US9059201B2 (en) 2010-04-28 2015-06-16 Acorn Technologies, Inc. Transistor with longitudinal strain in channel induced by buried stressor relaxed by implantation
US8361868B2 (en) 2010-04-28 2013-01-29 Acorn Technologies, Inc. Transistor with longitudinal strain in channel induced by buried stressor relaxed by implantation
US9406798B2 (en) * 2010-08-27 2016-08-02 Acorn Technologies, Inc. Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
US10833194B2 (en) 2010-08-27 2020-11-10 Acorn Semi, Llc SOI wafers and devices with buried stressor
US8395213B2 (en) 2010-08-27 2013-03-12 Acorn Technologies, Inc. Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
US8536032B2 (en) 2011-06-08 2013-09-17 International Business Machines Corporation Formation of embedded stressor through ion implantation
US8981523B2 (en) * 2012-03-14 2015-03-17 International Business Machines Corporation Programmable fuse structure and methods of forming
US9362400B1 (en) 2015-03-06 2016-06-07 International Business Machines Corporation Semiconductor device including dielectrically isolated finFETs and buried stressor
US9524969B1 (en) 2015-07-29 2016-12-20 International Business Machines Corporation Integrated circuit having strained fins on bulk substrate
CN113035716B (zh) * 2021-02-08 2022-07-22 西安电子科技大学 基于22nm工艺的SONOS结构抗辐照FDSOI场效应管及其制备方法
EP4406008A1 (en) 2021-09-22 2024-07-31 Acorn Semi, Llc Multi-finger rf nfet having buried stressor layer and isolation trenches between gates

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5362667A (en) 1992-07-28 1994-11-08 Harris Corporation Bonded wafer processing
CA2062134C (en) * 1991-05-31 1997-03-25 Ibm Low Defect Densiry/Arbitrary Lattice Constant Heteroepitaxial Layers
US5146298A (en) * 1991-08-16 1992-09-08 Eklund Klas H Device which functions as a lateral double-diffused insulated gate field effect transistor or as a bipolar transistor
US5461243A (en) * 1993-10-29 1995-10-24 International Business Machines Corporation Substrate for tensilely strained semiconductor
JP3427114B2 (ja) 1994-06-03 2003-07-14 コマツ電子金属株式会社 半導体デバイス製造方法
US6043166A (en) 1996-12-03 2000-03-28 International Business Machines Corporation Silicon-on-insulator substrates using low dose implantation
JP3645390B2 (ja) * 1997-01-17 2005-05-11 株式会社東芝 半導体装置およびその製造方法
US5897362A (en) 1998-04-17 1999-04-27 Lucent Technologies Inc. Bonding silicon wafers
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR100532367B1 (ko) 1998-09-16 2006-01-27 페어차일드코리아반도체 주식회사 보호 다이오드를 내재한 수평형 확산 모스 트랜지스터 및 그 제조방법
US6174820B1 (en) 1999-02-16 2001-01-16 Sandia Corporation Use of silicon oxynitride as a sacrificial material for microelectromechanical devices
US20020089032A1 (en) * 1999-08-23 2002-07-11 Feng-Yi Huang Processing method for forming dislocation-free silicon-on-insulator substrate prepared by implantation of oxygen
US6339232B1 (en) 1999-09-20 2002-01-15 Kabushika Kaisha Toshiba Semiconductor device
US6319775B1 (en) * 1999-10-25 2001-11-20 Advanced Micro Devices, Inc. Nitridation process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device
JP3607194B2 (ja) * 1999-11-26 2005-01-05 株式会社東芝 半導体装置、半導体装置の製造方法、及び半導体基板
JP4406995B2 (ja) * 2000-03-27 2010-02-03 パナソニック株式会社 半導体基板および半導体基板の製造方法
JP2001338988A (ja) * 2000-05-25 2001-12-07 Hitachi Ltd 半導体装置及びその製造方法
US6890835B1 (en) * 2000-10-19 2005-05-10 International Business Machines Corporation Layer transfer of low defect SiGe using an etch-back process
JP2002164520A (ja) * 2000-11-27 2002-06-07 Shin Etsu Handotai Co Ltd 半導体ウェーハの製造方法
US6723661B2 (en) * 2001-03-02 2004-04-20 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
JP3995428B2 (ja) * 2001-03-29 2007-10-24 株式会社東芝 半導体基板の製造方法及び半導体装置の製造方法
US6603156B2 (en) * 2001-03-31 2003-08-05 International Business Machines Corporation Strained silicon on insulator structures
US6838728B2 (en) * 2001-08-09 2005-01-04 Amberwave Systems Corporation Buried-channel devices and substrates for fabrication of semiconductor-based devices
DE10231964A1 (de) * 2002-07-15 2004-02-19 Infineon Technologies Ag Halbleiterbauelement mit stressaufnehmender Halbleiterschicht sowie zugehöriges Herstellungsverfahren

Similar Documents

Publication Publication Date Title
JP2006503442A5 (enExample)
US6707106B1 (en) Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer
JP5039901B2 (ja) 歪みシリコンオンインシュレータ構造を製造する方法およびそれによって形成された歪みシリコンオンインシュレータ構造
JP2006501672A5 (enExample)
TW200717796A (en) Diamond transistor and method of manufacture thereof
JP2009532875A5 (enExample)
WO2011160477A1 (zh) 一种应变沟道场效应晶体管及其制备方法
JP2008520097A5 (enExample)
TW200620489A (en) Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor
TW200603216A (en) Semiconductor substrate, semiconductor device, and manufacturing methods for them
JP2009027002A5 (enExample)
JP2017011262A (ja) 高抵抗率半導体オンインシュレータ基板の製造方法
JP2004214673A5 (enExample)
TW200636873A (en) Semiconductor fabrication process including recessed source/drain regions in an SOI wafer
CN103839822B (zh) 鳍式场效应晶体管及其形成方法
CN101859771B (zh) 一种具有应变沟道的cmos器件结构及其形成方法
CN1193432C (zh) 降低绝缘体上的硅晶体管源漏串联电阻的结构及实现方法
US8802528B2 (en) Vertical PMOS field effect transistor and manufacturing method thereof
TW200746420A (en) Multi-fin field effect transistor and fabricating method thereof
CN202839584U (zh) 一种半导体器件
WO2003075345A3 (en) Raised extension structure for high performance cmos
WO2012006890A1 (zh) 一种利用应力集中效应增强沟道应力的mos晶体管
CN103794500B (zh) 晶体管及其形成方法
JPH10189888A5 (enExample)
TWI257174B (en) Etching process and fabricating method of thin film transistor using the same