JP2006041337A - 窒化珪素膜の製造方法及び半導体装置の製造方法 - Google Patents
窒化珪素膜の製造方法及び半導体装置の製造方法 Download PDFInfo
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- JP2006041337A JP2006041337A JP2004221490A JP2004221490A JP2006041337A JP 2006041337 A JP2006041337 A JP 2006041337A JP 2004221490 A JP2004221490 A JP 2004221490A JP 2004221490 A JP2004221490 A JP 2004221490A JP 2006041337 A JP2006041337 A JP 2006041337A
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- Prior art keywords
- silicon nitride
- nitride film
- manufacturing
- film
- interlayer insulating
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Abstract
【解決手段】 基体の表面に窒化珪素膜を形成する窒化珪素膜の製造方法であって、珪素と塩素とを含む第1のガスを前記基体の表面に供給する第1の工程と、窒素を含む第2のガスを前記基体の表面に供給する第2の工程と、水素を含む第3のガスを前記基体の表面に供給する第3の工程と、をこの順に繰り返すことを特徴とする窒化珪素膜の製造方法を提供する。
【選択図】 図1
Description
すなわち、この方法の場合、第1の工程110として、反応室内のシリコンウェーハ上に、SiH2Cl2,Si2Cl6等の塩素を含むシリコン原料のガスを導入する。
次に、第2の工程120として、窒素ガスを導入し反応室内の未反応ガスを置換する。 次に、第3の工程130として、活性化した窒素原料のガスを反応室内に導入する。
次に、第4の工程140として、窒素ガスを導入し反応室内の未反応ガスを置換する。
珪素と塩素とを含む第1のガスを前記基体の表面に供給する第1の工程と、
窒素を含む第2のガスを前記基体の表面に供給する第2の工程と、
水素を含む第3のガスを前記基体の表面に供給する第3の工程と、
をこの順に繰り返すことを特徴とする窒化珪素膜の製造方法が提供される。
また、前記水素は、原子状及びラジカルの少なくともいずれかに活性化してなることを特徴とする。
また、前記窒素は、活性化してなることを特徴とする。
またここで、前記活性化は、プラズマにより生じてなることを特徴とする。
または、前記活性化は、触媒及び紫外線の少なくともいずれかにより生じてなることを特徴とする。
前記第2の工程と前記第3の工程との間に、前記基体の表面から前記第2のガスを除去する工程を実施することを特徴とする。
前記窒化珪素膜を上記のいずれかの窒化珪素膜の製造方法により製造することを特徴とする半導体装置の製造方法が提供される
または、本発明のさらに他の一態様によれば、半導体層と、前記半導体層の主面上に選択的に設けられたゲート絶縁膜と、前記ゲート絶縁膜の上に設けられたゲート電極と、を有する基体を形成する工程と、
前記基体の上に、上記のいずれかの窒化珪素膜の製造方法により窒化珪素膜を製造する工程と、
前記半導体層の前記主面に対して略垂直方向に前記窒化珪素膜をエッチングすることにより、前記半導体層及び前記ゲート電極の上の前記窒化珪素膜を除去し、前記ゲート絶縁膜及びゲート電極の側面に前記窒化珪素膜からなる側壁を残留させる工程と、
を備えたことを特徴とする半導体装置の製造方法が提供される。
前記窒化珪素膜の上に層間絶縁層を形成する工程と、
前記層間絶縁層の上に開口を有する層を形成する工程と、
前記窒化珪素膜に対するエッチング速度よりも前記層間絶縁層に対するエッチング速度のほうが大なる条件で、前記開口を介して前記層間絶縁層をエッチングする工程と、
を備えたことを特徴とする半導体装置の製造方法が提供される。
すなわち、本発明によれば、窒化珪素膜の塩素不純物量の低減を実現し、ウェットエッチ耐性を向上することが可能となり、産業上のメリットは多大である。
図1は、本発明の実施の形態にかかる窒化珪素膜の製造方法を表すフローチャートである。すなわち、本具体例は、LPCVD法により窒化珪素膜を成膜する方法を例示する。
次に、第3の工程13として、窒素を含む原料ガスを反応室内に導入する。以後、窒素を含む原料ガスを「第2のガス」とする。
次に、第4の工程14として、窒素ガスを導入し反応室内の未反応ガスを置換する。
次に、第5の工程15として、活性化した水素を含む原料ガスを反応室内に導入する。以後、活性化した水素を含む原料ガスを「第3のガス」とする。
最後に、第6の工程16として、窒素ガスを導入し反応室内の未反応ガスを置換する。
図2(a)は、図1に関して前述した第1の工程11におけるシリコンウェーハの断面構造を例示する模式図である。すなわち、第1のガス(SiH2Cl2,Si2Cl6等の塩素を含むシリコン原料のガス)を反応室に導入することによって、シリコンウェーハ21上に、シリコンと塩素25とを含む層22が形成される。
反応室31内において、ウェーハステージ36上にシリコンウェーハ35が載置可能とされている。反応室31の側壁には、第1のガス(SiH2Cl2,Si2Cl6などのシリコンと塩素とを含む原料ガス)を導入するためのインジェクター32と、第2のガス(NH3などの窒素を含む原料ガス)を導入するためのインジェクター33と、第3のガス(活性化した水素原料のガス)を導入するためのインジェクター34と、真空ポンプに接続されている排気口37とが設けられている。
紫外線により水素を活性化させる場合、紫外線の波長は概ね400ナノメータ以下とすると効率的である。
このようにして水素を活性化した後、反応室31に導入する。
成膜条件としては、例えば温度450℃、圧力130Pa(パスカル)、Si2Cl6流量10cc、NH3流量1000cc、H2流量1000ccにて実施することができる。
すなわち、Si2Cl6およびNH3の2種類のガスを同時に導入して成膜した第1の比較例の窒化珪素膜41と、第1のガス:Si2Cl6、第2のガス:活性化したNH3を交互に導入し、これを繰り返すことにより成膜した第2の比較例の窒化珪素膜42と、本発明による第1のガス:Si2Cl6、第2のガス:活性化したNH3に続いて、第3のガス:活性化した水素を導入し、これを繰り返すことにより成膜した窒化珪素膜43の3種の膜について比較した。
まず、図6(a)に表したように、シリコン基板61の上に、ゲート絶縁膜62を介してゲート電極63を形成する。
次に、図6(b)に表したように、これらの上に、窒化珪素膜64を形成する。この時に図1乃至図3に関して前述したような本発明の方法により形成する。
まず、図9(a)に表したように、MOSトランジスタの要部を形成する。すなわち、Si基板上に素子分離領域101、ウェル102、チャネル103、ゲート絶縁膜104、ゲート電極106、LDD注入サイドウォール(ゲート側壁)105を順次形成し、ソース領域107、ドレイン領域108の形成を行う。さらに、ニッケル(Ni)のスパッタ、RTP(rapid thermalprocessing)を順次行い、ニッケルシリサイドからなるシリサイド層119を形成する。
ここで、ゲート絶縁膜104を形成する工程において、図1及び図2に関して前述した方法により窒化珪素膜を形成することができる。また、この時、ゲート絶縁膜104は、単一の窒化珪素膜には限定されず、例えば、酸化珪素やhigh-k(高誘電率)材料からなる膜と、窒化珪素膜と、の積層構造とすることができる。この場合には、窒化珪素膜について図1及び図2に関して前述した方法を実施することができる。
また、ゲート側壁105を形成する工程についても、図6に関して前述したように、本発明の窒化珪素膜の製造方法を用いることができる。
また、第2の層間絶縁膜111の材料として、さらに誘電率の低い材料を用いることができる。そのような材料としては、メチル基を有するシリコン酸化物や、水素基を有するシリコン酸化物、有機ポリマーなど用いることができる。さらに具体的には、例えば、多孔質のメチルシルセスキオキサン(methyl silsequioxane:MSQ)などの各種のシルセスキオキサン化合物、ポリイミド、炭化フッ素(fluorocarbon)、パリレン(parylene)、ベンゾシクロブテンなどを挙げることができる。また、その形成方法としては、例えば、溶液をスピンコートし熱処理して薄膜を形成するスピン・オン・グラス(spin on glass:SOG)法を用いることができる。
その後、レジストを塗布してパターニングすることにより、レジストパターン120を形成する。レジストパターン120は、例えば、ArF露光機を用いて120nm径に露光することにより形成する。
そして、化学機械研磨法(chemical mechanical polishing:CMP)により研磨して表面を平坦化させて、図11(c)に表したようにコンタクト金属を埋め込んだ構造を形成できる。なお、この際にも、第3の層間絶縁膜112を設けることにより、CMPによる研磨に対して、第2の層間絶縁膜111を保護することができる。つまり、多孔質の酸化シリコンなどの比較的柔らかい材料により形成された第2の層間絶縁膜111の上に、窒化珪素などの比較的堅い材料からなる第3の層間絶縁膜112を設けることによりCMPの研磨の際に、第2の層間絶縁膜111が研磨されて膜厚が薄くなることを防ぐことができる。その結果として、配線間容量の増大や電流リークなどの問題を抑制できる。
そして、図13(b)に表したように、第5の層間絶縁膜115と第4の層間絶縁膜114をそれぞれエッチングすることにより、トレンチ124を形成する。第5の層間絶縁膜115のエッチングに際しては、例えば、CH2F2:50sccm O2:50sccm の混合ガスを用いて6.7パスカル(Pa)にてエッチングすることにより、層間絶縁膜115に開口部を形成することができる。第4の層間絶縁膜114にトレンチを形成する際には、C4F6:50sccm、CO:50sccm、O2:50sccmおよびAr:200sccmの混合ガスを用いて6.7パスカルにて反応性イオンエッチング行うことができる。この際に、第5の層間絶縁膜115をハードマスクとして用い、同時に、第3の層間絶縁膜112をエッチングストッパとして用いることができる。すなわち、酸化シリコンにより形成された第4の層間絶縁膜114をエッチングする際に、窒化珪素により形成された第5の層間絶縁膜115をハードマスクとして用い、同じく窒化珪素により形成された第3の層間絶縁膜112をエッチングストッパとして用いることにより、オーバーエッチングなどを抑制してトレンチを精密に形成できる。
すなわち、本変型例の場合、工程11において第1のガスを導入し、工程12において窒素ガスによるパージを実施した後に、工程17において第3のガスとして活性化水素を導入する。すると、基板上に形成されたシリコン層に含有される塩素が活性化水素と反応しシリコン層から取り除かれる。
本変型例によれば、第1のガスを導入してシリコン層を形成した後に、第3のガスとして活性化水素を導入(工程17)してシリコン層に含有される塩素を引き抜く。またさらに、第2のガスを導入して窒化珪素膜を形成した後に、活性化水素を導入(工程15)して窒化珪素層に含有される塩素を引き抜く。このように、シリコン層の状態と、窒化珪素層の状態のそれぞれにおいて活性化水素により残留塩素を引き抜くことにより、膜中の塩素の濃度をさらに低くすることができる。
12 第2の工程
13 第3の工程
14 第4の工程
15 第5の工程
16 第6の工程
21 シリコンウェーハ
22 シリコンと塩素とを含む層
23 窒化珪素薄膜
25 塩素
26 水素
31 反応室
32 第1のガスを供給するインジェクター
33 第2のガスを供給するインジェクター
34 第3のガスを供給するインジェクター
35 シリコンウェーハ
36 ウェーハステージ
37 排気口
41 通常のLPCVDによって形成した窒化珪素膜
42 従来技術によって形成した窒化珪素膜
43 本発明の製造方法によって形成した窒化珪素膜
61 シリコン基板
62 ゲート絶縁膜
63 ゲート電極
64 窒化珪素膜
71 サイドウォール
72 ゲート絶縁膜
73 ゲート電極
81 サイドウォール
82 塩素
83 ゲート絶縁膜
84 ゲート電極
101 素子分離領域
102 ウェル
103 チャネル
104 ゲート絶縁膜
105 ゲート側壁
106 ゲート電極
107 ソース領域
108 ドレイン領域
110〜112 層間絶縁膜
113D ドレインコンタクト
113G ゲートコンタクト
113S ソースコンタクト
114、115 層間絶縁膜
116D ドレイン配線
116G ゲート配線
116S ソース配線
119 シリサイド層
120 レジストパターン
120 レジストマスク
121 開口部
122 接続孔
123 レジストパターン
124 トレンチ
210 第1の工程
220 第2の工程
230 第3の工程
240 第4の工程
Claims (10)
- 基体の表面に窒化珪素膜を形成する窒化珪素膜の製造方法であって、
珪素と塩素とを含む第1のガスを前記基体の表面に供給する第1の工程と、
窒素を含む第2のガスを前記基体の表面に供給する第2の工程と、
水素を含む第3のガスを前記基体の表面に供給する第3の工程と、
をこの順に繰り返すことを特徴とする窒化珪素膜の製造方法。 - 前記水素は、活性化してなることを特徴とする請求項1記載の窒化珪素膜の製造方法。
- 前記水素は、原子状及びラジカルの少なくともいずれかに活性化してなることを特徴とする請求項1または2に記載の窒化珪素膜の製造方法。
- 前記窒素は、活性化してなることを特徴とする請求項1〜3のいずれか1つに記載の窒化珪素膜の製造方法。
- 前記活性化は、プラズマにより生じてなることを特徴とする請求項2〜4のいずれか1つに記載の窒化珪素膜の製造方法。
- 前記活性化は、触媒及び紫外線の少なくともいずれかにより生じてなることを特徴とする請求項2〜4のいずれか1つに記載の窒化珪素膜の製造方法。
- 前記第1の工程と前記第2の工程との間に、前記基体の表面から前記第1のガスを除去する工程を実施し、
前記第2の工程と前記第3の工程との間に、前記基体の表面から前記第2のガスを除去する工程を実施することを特徴とする請求項1〜6のいずれか1つに記載の窒化珪素膜の製造方法。 - シリコン基板と、前記シリコン基板の上に設けられた窒化珪素膜と、を有する半導体装置の製造方法であって、
前記窒化珪素膜を請求項1〜7のいずれか1つに記載の窒化珪素膜の製造方法により製造することを特徴とする半導体装置の製造方法。 - 半導体層と、前記半導体層の主面上に選択的に設けられたゲート絶縁膜と、前記ゲート絶縁膜の上に設けられたゲート電極と、を有する基体を形成する工程と、
前記基体の上に、請求項1〜7のいずれか1つに記載の窒化珪素膜の製造方法により窒化珪素膜を製造する工程と、
前記半導体層の前記主面に対して略垂直方向に前記窒化珪素膜をエッチングすることにより、前記半導体層及び前記ゲート電極の上の前記窒化珪素膜を除去し、前記ゲート絶縁膜及びゲート電極の側面に前記窒化珪素膜からなる側壁を残留させる工程と、
を備えたことを特徴とする半導体装置の製造方法。 - 半導体層の上に、請求項1〜7のいずれか1つに記載の窒化珪素膜の製造方法により窒化珪素膜を製造する工程と、
前記窒化珪素膜の上に層間絶縁層を形成する工程と、
前記層間絶縁層の上に開口を有する層を形成する工程と、
前記窒化珪素膜に対するエッチング速度よりも前記層間絶縁層に対するエッチング速度のほうが大なる条件で、前記開口を介して前記層間絶縁層をエッチングする工程と、
を備えたことを特徴とする半導体装置の製造方法。
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JP2004221490A JP4669679B2 (ja) | 2004-07-29 | 2004-07-29 | 窒化珪素膜の製造方法及び半導体装置の製造方法 |
TW093139428A TWI345812B (en) | 2004-07-29 | 2004-12-17 | Mehtod of manufacturing silicon nitride film, method of manufacturing semiconductor device, and semiconductor device |
KR1020040108818A KR100936685B1 (ko) | 2004-07-29 | 2004-12-20 | 질화규소막의 제조 방법, 반도체 장치의 제조 방법 및반도체 장치 |
US11/038,165 US20060022228A1 (en) | 2004-07-29 | 2005-01-21 | Method of manufacturing silicon nitride film, method of manufacturing semiconductor device, and semiconductor device |
US12/167,025 US20080274605A1 (en) | 2004-07-29 | 2008-07-02 | Method of manufacturing silicon nitride film, method of manufacturing semiconductor device, and semiconductor device |
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JP2010283385A (ja) * | 2010-09-07 | 2010-12-16 | Tokyo Electron Ltd | シリコン窒化膜の形成方法、シリコン窒化膜の形成装置及びプログラム |
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JP2017139297A (ja) * | 2016-02-02 | 2017-08-10 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
CN110178201A (zh) * | 2017-01-13 | 2019-08-27 | 应用材料公司 | 用于低温氮化硅膜的方法及设备 |
JP2020504457A (ja) * | 2017-01-13 | 2020-02-06 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | 低温窒化ケイ素膜のための方法及び装置 |
JP2019004054A (ja) * | 2017-06-15 | 2019-01-10 | 東京エレクトロン株式会社 | 成膜方法、成膜装置、及び記憶媒体 |
JP2021111698A (ja) * | 2020-01-10 | 2021-08-02 | 住友電気工業株式会社 | 半導体装置及び半導体装置の製造方法 |
JP7327173B2 (ja) | 2020-01-10 | 2023-08-16 | 住友電気工業株式会社 | 半導体装置及び半導体装置の製造方法 |
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TWI345812B (en) | 2011-07-21 |
JP4669679B2 (ja) | 2011-04-13 |
US20080274605A1 (en) | 2008-11-06 |
KR20060011780A (ko) | 2006-02-03 |
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US20060022228A1 (en) | 2006-02-02 |
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