JP2005531934A5 - - Google Patents

Download PDF

Info

Publication number
JP2005531934A5
JP2005531934A5 JP2004519678A JP2004519678A JP2005531934A5 JP 2005531934 A5 JP2005531934 A5 JP 2005531934A5 JP 2004519678 A JP2004519678 A JP 2004519678A JP 2004519678 A JP2004519678 A JP 2004519678A JP 2005531934 A5 JP2005531934 A5 JP 2005531934A5
Authority
JP
Japan
Prior art keywords
region
gate
substrate
logic element
active
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004519678A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005531934A (ja
Filing date
Publication date
Priority claimed from US10/211,433 external-priority patent/US7064034B2/en
Application filed filed Critical
Publication of JP2005531934A publication Critical patent/JP2005531934A/ja
Publication of JP2005531934A5 publication Critical patent/JP2005531934A5/ja
Pending legal-status Critical Current

Links

JP2004519678A 2002-07-02 2003-06-25 複数のゲートレイヤを用いて論理要素を製造する技術 Pending JP2005531934A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US42111502P 2002-07-02 2002-07-02
US10/211,433 US7064034B2 (en) 2002-07-02 2002-08-02 Technique for fabricating logic elements using multiple gate layers
PCT/US2003/020453 WO2004006338A1 (en) 2002-07-02 2003-06-25 Technique for fabricating logic elements using multiple gate layers

Publications (2)

Publication Number Publication Date
JP2005531934A JP2005531934A (ja) 2005-10-20
JP2005531934A5 true JP2005531934A5 (https=) 2007-01-11

Family

ID=30117870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004519678A Pending JP2005531934A (ja) 2002-07-02 2003-06-25 複数のゲートレイヤを用いて論理要素を製造する技術

Country Status (5)

Country Link
US (3) US7064034B2 (https=)
EP (1) EP1520302A1 (https=)
JP (1) JP2005531934A (https=)
AU (1) AU2003281425A1 (https=)
WO (1) WO2004006338A1 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101025846B1 (ko) * 2004-09-13 2011-03-30 삼성전자주식회사 탄소나노튜브 채널을 포함하는 반도체 장치의 트랜지스터
WO2007017700A1 (en) 2005-08-09 2007-02-15 University Of Sunderland Hydrophobic silica particles and methods of making same
US7968932B2 (en) * 2005-12-26 2011-06-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7738282B2 (en) * 2007-02-15 2010-06-15 Taiwan Semiconductor Manufacturing Company, Ltd. Cell structure of dual port SRAM
CN102024821B (zh) * 2009-09-18 2012-08-22 中芯国际集成电路制造(上海)有限公司 非易失性存储装置、非易失性存储器件及其制造方法
JP5531848B2 (ja) * 2010-08-06 2014-06-25 富士通セミコンダクター株式会社 半導体装置、半導体集積回路装置、SRAM、Dt−MOSトランジスタの製造方法
CN102569386B (zh) * 2010-12-17 2015-02-04 上海华虹宏力半导体制造有限公司 具有屏蔽栅的vdmos器件及其制备方法
CN102569385B (zh) * 2010-12-17 2015-04-08 上海华虹宏力半导体制造有限公司 具有屏蔽栅的vdmos结构及其制备方法
JP5715872B2 (ja) * 2011-04-13 2015-05-13 ラピスセミコンダクタ株式会社 半導体集積回路、半導体集積回路の製造方法及び信号処理装置
US9735382B2 (en) * 2012-11-08 2017-08-15 Palo Alto Research Center Incorporated Circuit layout for thin film transistors in series or parallel
US8778742B1 (en) * 2013-04-26 2014-07-15 Freescale Semiconductor, Inc. Methods and systems for gate dimension control in multi-gate structures for semiconductor devices
JP2015056472A (ja) * 2013-09-11 2015-03-23 株式会社東芝 半導体装置
KR102374052B1 (ko) 2016-02-26 2022-03-14 삼성전자주식회사 반도체 소자 및 그 제조 방법

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1139170A (en) * 1965-12-22 1969-01-08 Mullard Ltd Thin film transistors
DK134919B (da) 1966-01-04 1977-02-07 Soeren Anton Wilfre Joergensen Matrix-kobling.
DE2734354A1 (de) * 1977-07-29 1979-02-08 Siemens Ag Speicherelement
DE2935254A1 (de) * 1979-08-31 1981-04-02 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung einer monolithischen statischen speicherzelle
US4380863A (en) * 1979-12-10 1983-04-26 Texas Instruments Incorporated Method of making double level polysilicon series transistor devices
US4409723A (en) * 1980-04-07 1983-10-18 Eliyahou Harari Method of forming non-volatile EPROM and EEPROM with increased efficiency
JPS6340361A (ja) * 1986-08-05 1988-02-20 Oki Electric Ind Co Ltd 相補型半導体装置
JPS6340360A (ja) * 1986-08-05 1988-02-20 Oki Electric Ind Co Ltd 半導体装置
JPS6355975A (ja) * 1986-08-27 1988-03-10 Hitachi Ltd 半導体装置
US4749443A (en) * 1986-12-04 1988-06-07 Texas Instruments Incorporated Sidewall oxide to reduce filaments
US5016215A (en) * 1987-09-30 1991-05-14 Texas Instruments Incorporated High speed EPROM with reverse polarity voltages applied to source and drain regions during reading and writing
US5045488A (en) * 1990-01-22 1991-09-03 Silicon Storage Technology, Inc. Method of manufacturing a single transistor non-volatile, electrically alterable semiconductor memory device
KR100199258B1 (ko) * 1990-02-09 1999-06-15 가나이 쓰도무 반도체집적회로장치
JPH03247117A (ja) * 1990-02-26 1991-11-05 Nec Corp Cmos論理回路
JPH03283566A (ja) * 1990-03-30 1991-12-13 Nec Corp 半導体装置
JPH0433374A (ja) * 1990-05-30 1992-02-04 Fujitsu Ltd 電界効果半導体装置
US5296393A (en) 1990-11-23 1994-03-22 Texas Instruments Incorporated Process for the simultaneous fabrication of high-and-low-voltage semiconductor devices, integrated circuit containing the same, systems and methods
US5204541A (en) 1991-06-28 1993-04-20 Texas Instruments Incorporated Gated thyristor and process for its simultaneous fabrication with high- and low-voltage semiconductor devices
US5210047A (en) * 1991-12-12 1993-05-11 Woo Been Jon K Process for fabricating a flash EPROM having reduced cell size
US5366918A (en) 1994-02-07 1994-11-22 United Microelectronics Corporation Method for fabricating a split polysilicon SRAM cell
JP3396286B2 (ja) 1994-02-28 2003-04-14 三菱電機株式会社 半導体集積回路装置およびその製造方法
JP3490203B2 (ja) * 1995-12-28 2004-01-26 エルジー フィリップス エルシーディー カンパニー リミテッド 電界効果トランジスタおよびその駆動方法
JP3282965B2 (ja) * 1996-03-26 2002-05-20 シャープ株式会社 トランジスタ
US6031981A (en) 1996-12-19 2000-02-29 Cirrus Logic, Inc. Reconfigurable gate array cells for automatic engineering change order
US5953599A (en) 1997-06-12 1999-09-14 National Semiconductor Corporation Method for forming low-voltage CMOS transistors with a thin layer of gate oxide and high-voltage CMOS transistors with a thick layer of gate oxide
US5851881A (en) 1997-10-06 1998-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making monos flash memory for multi-level logic
JP2000077627A (ja) * 1998-06-17 2000-03-14 Mitsubishi Electric Corp 半導体素子
US6133102A (en) 1998-06-19 2000-10-17 Wu; Shye-Lin Method of fabricating double poly-gate high density multi-state flat mask ROM cells
JP3183265B2 (ja) * 1998-08-17 2001-07-09 日本電気株式会社 薄膜半導体装置
US6323103B1 (en) 1998-10-20 2001-11-27 Siemens Aktiengesellschaft Method for fabricating transistors
US6313500B1 (en) 1999-01-12 2001-11-06 Agere Systems Guardian Corp. Split gate memory cell
JP2001326289A (ja) * 2000-03-08 2001-11-22 Semiconductor Energy Lab Co Ltd 不揮発性メモリおよび半導体装置
KR100327434B1 (ko) * 2000-05-01 2002-03-13 박종섭 반도체 소자의 구조

Similar Documents

Publication Publication Date Title
CN103227152B (zh) 利用侧壁图像转移技术形成sram装置的方法
US7906818B2 (en) Memory array with a pair of memory-cell strings to a single conductive pillar
TWI415250B (zh) 具有非晶態金屬氧化物半導體通道之剛性半導體記憶體
US7551491B2 (en) Unit cell of a non-volatile memory device, a non-volatile memory device and method thereof
JPWO2000070683A1 (ja) 半導体記憶装置
JP4159741B2 (ja) 電気的に消去可能なメモリデバイス
CN103378135A (zh) 用于FinFET的装置
US20060289940A1 (en) Fin FET CMOS device, method of manufacturing the same, and memory including fin FET CMOS device
JP2006041354A5 (https=)
US7723779B2 (en) Integrated semiconductor nonvolatile storage device
JP2005531934A5 (https=)
US7932551B2 (en) Nonvolatile memory device and method of fabricating the same comprising a dual fin structure
US7688639B1 (en) CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer
CN103733262A (zh) 具有双应力衬垫的非对称静态随机存取存储器单元
TW201029179A (en) Techniques for improving transistor-to-transistor stress uniformity
US11973031B2 (en) Reduced pitch memory subsystem for memory device
US20170077105A1 (en) Semiconductor device
US7816734B2 (en) Field-effect transistor including localized halo ion regions, and semiconductor memory, memory card, and system including the same
JP2014096479A (ja) 半導体装置およびその製造方法
TWI874853B (zh) 記憶體裝置及其製造方法
US20140103419A1 (en) Non-volatile memory device and method for forming the same
US7307320B2 (en) Differential mechanical stress-producing regions for integrated circuit field effect transistors
JP2775253B2 (ja) Sramセル及びその製造方法
CN103022040B (zh) 只读存储器及其制作方法
TW202236268A (zh) 靜態隨機存取記憶體及其操作方法