JP2003338587A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法

Info

Publication number
JP2003338587A
JP2003338587A JP2002146241A JP2002146241A JP2003338587A JP 2003338587 A JP2003338587 A JP 2003338587A JP 2002146241 A JP2002146241 A JP 2002146241A JP 2002146241 A JP2002146241 A JP 2002146241A JP 2003338587 A JP2003338587 A JP 2003338587A
Authority
JP
Japan
Prior art keywords
wiring
semiconductor device
semiconductor element
mother board
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002146241A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003338587A5 (https=
Inventor
Toru Saga
徹 嵯峨
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Akita Electronics Systems Co Ltd
Original Assignee
Hitachi Ltd
Akita Electronics Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Akita Electronics Systems Co Ltd filed Critical Hitachi Ltd
Priority to JP2002146241A priority Critical patent/JP2003338587A/ja
Priority to US10/441,123 priority patent/US6791173B2/en
Publication of JP2003338587A publication Critical patent/JP2003338587A/ja
Priority to US10/923,718 priority patent/US7170153B2/en
Publication of JP2003338587A5 publication Critical patent/JP2003338587A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2002146241A 2002-05-21 2002-05-21 半導体装置及びその製造方法 Pending JP2003338587A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002146241A JP2003338587A (ja) 2002-05-21 2002-05-21 半導体装置及びその製造方法
US10/441,123 US6791173B2 (en) 2002-05-21 2003-05-20 Semiconductor device and its manufacturing method
US10/923,718 US7170153B2 (en) 2002-05-21 2004-08-24 Semiconductor device and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002146241A JP2003338587A (ja) 2002-05-21 2002-05-21 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2003338587A true JP2003338587A (ja) 2003-11-28
JP2003338587A5 JP2003338587A5 (https=) 2005-09-02

Family

ID=29545116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002146241A Pending JP2003338587A (ja) 2002-05-21 2002-05-21 半導体装置及びその製造方法

Country Status (2)

Country Link
US (2) US6791173B2 (https=)
JP (1) JP2003338587A (https=)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005244233A (ja) * 2004-02-25 2005-09-08 Infineon Technologies Ag チップを収容するための配線キャリア
JP2007012992A (ja) * 2005-07-01 2007-01-18 Akita Denshi Systems:Kk 半導体装置の製造方法
JP2009023239A (ja) * 2007-07-20 2009-02-05 Nec Electronics Corp 樹脂モールド金型
US7646094B2 (en) 2006-01-31 2010-01-12 Sharp Kabushiki Kaisha Semiconductor device
JP2022191741A (ja) * 2021-06-16 2022-12-28 株式会社東芝 半導体装置、その製造方法および基板

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US7071012B2 (en) * 2003-07-05 2006-07-04 Micron Technology, Inc. Methods relating to the reconstruction of semiconductor wafers for wafer-level processing
JP4206320B2 (ja) 2003-09-19 2009-01-07 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
US20060091562A1 (en) * 2004-10-29 2006-05-04 Hsin-Hui Lee Flip chip BGA process and package with stiffener ring
US20060250780A1 (en) * 2005-05-06 2006-11-09 Staktek Group L.P. System component interposer
DE102005023949B4 (de) * 2005-05-20 2019-07-18 Infineon Technologies Ag Verfahren zur Herstellung eines Nutzens aus einer Verbundplatte mit Halbleiterchips und einer Kunststoffgehäusemasse und ein Verfahren zur Herstellung von Halbleiterbauteilen mittels eines Nutzens
US7589406B2 (en) * 2005-06-27 2009-09-15 Micron Technology, Inc. Stacked semiconductor component
US20070216033A1 (en) * 2006-03-20 2007-09-20 Corisis David J Carrierless chip package for integrated circuit devices, and methods of making same
JP2008004570A (ja) * 2006-06-20 2008-01-10 Matsushita Electric Ind Co Ltd 樹脂封止型半導体装置の製造方法、樹脂封止型半導体装置の製造装置、および樹脂封止型半導体装置
JP5054954B2 (ja) * 2006-09-22 2012-10-24 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN101530011A (zh) * 2006-11-30 2009-09-09 株式会社德山 金属化陶瓷基板芯片的制造方法
US20090079057A1 (en) * 2007-09-24 2009-03-26 Infineon Technologies Ag Integrated circuit device
US7776649B1 (en) * 2009-05-01 2010-08-17 Powertech Technology Inc. Method for fabricating wafer level chip scale packages
KR101095094B1 (ko) * 2009-10-26 2011-12-16 삼성전기주식회사 웨이퍼 레벨 패키지의 제조방법
KR101388892B1 (ko) * 2012-08-20 2014-04-29 삼성전기주식회사 패키지 기판, 패키지 기판의 제조 방법 및 패키지 기판의 성형 금형
TWI576022B (zh) * 2016-05-16 2017-03-21 中華精測科技股份有限公司 支撐結構與其製造方法
US11043409B2 (en) * 2018-03-05 2021-06-22 Infineon Technologies Ag Method of forming contacts to an embedded semiconductor die and related semiconductor packages
US10923456B2 (en) * 2018-12-20 2021-02-16 Cerebras Systems Inc. Systems and methods for hierarchical exposure of an integrated circuit having multiple interconnected die
KR102818699B1 (ko) * 2020-01-29 2025-06-09 삼성전자주식회사 반도체 패키지 제조용 프레임 지그, 프레임 지그를 포함하는 반도체 패키지 제조 장치, 및 프레임 지그를 이용한 반도체 패키지 제조 방법
TWI822230B (zh) * 2022-08-05 2023-11-11 友達光電股份有限公司 發光面板

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JP3207738B2 (ja) * 1996-01-15 2001-09-10 株式会社東芝 樹脂封止型半導体装置及びその製造方法
JPH09320996A (ja) * 1996-03-29 1997-12-12 Denso Corp 半導体装置の製造方法
DE69738783D1 (de) * 1996-10-08 2008-07-31 Hitachi Chemical Co Ltd Halbleiteranordnung, halbleiterchipträgersubstrat, herstellungsverfahren für anordnung und substrat, klebstoff und doppelseitiges haftklebeband
JPH11102944A (ja) 1997-08-01 1999-04-13 Toshiba Corp 半導体装置の製造方法
JP3846094B2 (ja) * 1998-03-17 2006-11-15 株式会社デンソー 半導体装置の製造方法
DE69914418T2 (de) * 1998-08-10 2004-12-02 Lintec Corp. Dicing tape und Verfahren zum Zerteilen einer Halbleiterscheibe
US6091140A (en) * 1998-10-23 2000-07-18 Texas Instruments Incorporated Thin chip-size integrated circuit package
JP3844936B2 (ja) * 1999-03-26 2006-11-15 富士通株式会社 半導体装置
MY133357A (en) * 1999-06-30 2007-11-30 Hitachi Ltd A semiconductor device and a method of manufacturing the same
JP3916352B2 (ja) 1999-10-28 2007-05-16 松下電器産業株式会社 ターミナルランドフレーム及びその製造方法、並びに樹脂封止型半導体装置及びその製造方法
JP4018853B2 (ja) 1999-10-28 2007-12-05 松下電器産業株式会社 ターミナルランドフレーム
JP4454814B2 (ja) * 2000-08-29 2010-04-21 Ｎｅｃエレクトロニクス株式会社 樹脂封止型半導体装置及びその製造方法
JP2002118201A (ja) * 2000-10-05 2002-04-19 Hitachi Ltd 半導体装置およびその製造方法
JP2002124756A (ja) * 2000-10-18 2002-04-26 Nitto Denko Corp 回路基板および回路基板の端子部の接続構造
JP3628971B2 (ja) * 2001-02-15 2005-03-16 松下電器産業株式会社 リードフレーム及びそれを用いた樹脂封止型半導体装置の製造方法
JP3609737B2 (ja) * 2001-03-22 2005-01-12 三洋電機株式会社 回路装置の製造方法
JP3540793B2 (ja) * 2001-12-05 2004-07-07 松下電器産業株式会社 樹脂封止型半導体装置及びその製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005244233A (ja) * 2004-02-25 2005-09-08 Infineon Technologies Ag チップを収容するための配線キャリア
JP2007012992A (ja) * 2005-07-01 2007-01-18 Akita Denshi Systems:Kk 半導体装置の製造方法
US7646094B2 (en) 2006-01-31 2010-01-12 Sharp Kabushiki Kaisha Semiconductor device
JP2009023239A (ja) * 2007-07-20 2009-02-05 Nec Electronics Corp 樹脂モールド金型
JP2022191741A (ja) * 2021-06-16 2022-12-28 株式会社東芝 半導体装置、その製造方法および基板
JP7652638B2 (ja) 2021-06-16 2025-03-27 株式会社東芝 半導体装置、その製造方法および基板

Also Published As

Publication number Publication date
US6791173B2 (en) 2004-09-14
US7170153B2 (en) 2007-01-30
US20050023660A1 (en) 2005-02-03
US20030218262A1 (en) 2003-11-27

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