JP2003188254A - 半導体装置の製造方法および半導体装置 - Google Patents

半導体装置の製造方法および半導体装置

Info

Publication number
JP2003188254A
JP2003188254A JP2001384535A JP2001384535A JP2003188254A JP 2003188254 A JP2003188254 A JP 2003188254A JP 2001384535 A JP2001384535 A JP 2001384535A JP 2001384535 A JP2001384535 A JP 2001384535A JP 2003188254 A JP2003188254 A JP 2003188254A
Authority
JP
Japan
Prior art keywords
wiring
insulating film
film
semiconductor device
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001384535A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003188254A5 (https=
Inventor
Junji Noguchi
純司 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2001384535A priority Critical patent/JP2003188254A/ja
Priority to US10/293,442 priority patent/US6890846B2/en
Priority to TW091136326A priority patent/TW200305951A/zh
Priority to KR1020020080618A priority patent/KR20030051359A/ko
Publication of JP2003188254A publication Critical patent/JP2003188254A/ja
Priority to US11/116,452 priority patent/US20050196954A1/en
Publication of JP2003188254A5 publication Critical patent/JP2003188254A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662—Laminate layers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/6903—Inorganic materials containing silicon
    • H10P14/6905—Inorganic materials containing silicon being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/403—Chemomechanical polishing [CMP] of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/27—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers
    • H10P70/277—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers the processing being a planarisation of conductive layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062—Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/075—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers of multilayered thin functional dielectric layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2001384535A 2001-12-18 2001-12-18 半導体装置の製造方法および半導体装置 Withdrawn JP2003188254A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001384535A JP2003188254A (ja) 2001-12-18 2001-12-18 半導体装置の製造方法および半導体装置
US10/293,442 US6890846B2 (en) 2001-12-18 2002-11-14 Method for manufacturing semiconductor integrated circuit device
TW091136326A TW200305951A (en) 2001-12-18 2002-12-17 Method for manufacturing semiconductor integrated circuit device and semiconductor integrated circuit device
KR1020020080618A KR20030051359A (ko) 2001-12-18 2002-12-17 반도체 장치 및 그 제조 방법
US11/116,452 US20050196954A1 (en) 2001-12-18 2005-04-28 Method for manufacturing semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001384535A JP2003188254A (ja) 2001-12-18 2001-12-18 半導体装置の製造方法および半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2006035984A Division JP2006179948A (ja) 2006-02-14 2006-02-14 半導体装置の製造方法および半導体装置

Publications (2)

Publication Number Publication Date
JP2003188254A true JP2003188254A (ja) 2003-07-04
JP2003188254A5 JP2003188254A5 (https=) 2006-03-30

Family

ID=19187735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001384535A Withdrawn JP2003188254A (ja) 2001-12-18 2001-12-18 半導体装置の製造方法および半導体装置

Country Status (4)

Country Link
US (2) US6890846B2 (https=)
JP (1) JP2003188254A (https=)
KR (1) KR20030051359A (https=)
TW (1) TW200305951A (https=)

Cited By (6)

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JP2005033164A (ja) * 2003-07-09 2005-02-03 Hynix Semiconductor Inc 半導体素子の銅配線形成方法
US7109127B2 (en) 2003-11-06 2006-09-19 Renesas Technology Corp. Manufacturing method of semiconductor device
JP2007067132A (ja) * 2005-08-31 2007-03-15 Sony Corp 半導体装置の製造方法
JP2007533171A (ja) * 2004-04-19 2007-11-15 アプライド　マテリアルズ　インコーポレイテッド 低ｋ誘電体と導電材料との接着改善
JP2012060148A (ja) * 2011-11-14 2012-03-22 Renesas Electronics Corp 半導体集積回路装置の製造方法
WO2026006710A1 (en) * 2024-06-28 2026-01-02 Lam Research Corporation Carbon film deposition with reducing treatment after shaping etch

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JP3810718B2 (ja) * 2002-08-30 2006-08-16 富士通株式会社 半導体装置の製造方法
KR100483290B1 (ko) * 2002-12-14 2005-04-15 동부아남반도체 주식회사 반도체 소자의 제조 방법
US20050048768A1 (en) * 2003-08-26 2005-03-03 Hiroaki Inoue Apparatus and method for forming interconnects
US6902440B2 (en) 2003-10-21 2005-06-07 Freescale Semiconductor, Inc. Method of forming a low K dielectric in a semiconductor manufacturing process
US7205235B2 (en) * 2003-12-15 2007-04-17 Freescale Semiconductor, Inc. Method for reducing corrosion of metal surfaces during semiconductor processing
JP2005203476A (ja) * 2004-01-14 2005-07-28 Oki Electric Ind Co Ltd 半導体装置の配線構造及びその製造方法
US6897147B1 (en) * 2004-01-15 2005-05-24 Taiwan Semiconductor Manufacturing Company Solution for copper hillock induced by thermal strain with buffer zone for strain relaxation
JP3810411B2 (ja) * 2004-01-23 2006-08-16 Ｎｅｃエレクトロニクス株式会社 集積回路装置
KR100593737B1 (ko) * 2004-01-28 2006-06-28 삼성전자주식회사 반도체 소자의 배선 방법 및 배선 구조체
JP2005217262A (ja) * 2004-01-30 2005-08-11 Matsushita Electric Ind Co Ltd 化合物半導体装置の製造方法
KR100520683B1 (ko) * 2004-02-06 2005-10-11 매그나칩 반도체 유한회사 반도체 소자의 금속 배선 형성 방법
KR20060043082A (ko) * 2004-02-24 2006-05-15 마츠시타 덴끼 산교 가부시키가이샤 반도체장치의 제조방법
US7288205B2 (en) * 2004-07-09 2007-10-30 Applied Materials, Inc. Hermetic low dielectric constant layer for barrier applications
JP4493444B2 (ja) * 2004-08-26 2010-06-30 株式会社ルネサステクノロジ 半導体装置の製造方法
US7268073B2 (en) * 2004-11-10 2007-09-11 Texas Instruments Incorporated Post-polish treatment for inhibiting copper corrosion
JP4469737B2 (ja) * 2005-02-10 2010-05-26 株式会社東芝 半導体装置の製造方法
EP1900001A2 (en) * 2005-06-02 2008-03-19 Applied Materials, Inc. Methods and apparatus for incorporating nitrogen in oxide films
JP4956919B2 (ja) * 2005-06-08 2012-06-20 株式会社日立製作所 半導体装置およびその製造方法
CN101233601A (zh) * 2005-06-13 2008-07-30 高级技术材料公司 在金属硅化物形成后用于选择性除去金属或金属合金的组合物及方法
KR100628244B1 (ko) * 2005-06-15 2006-09-26 동부일렉트로닉스 주식회사 반도체소자의 제조방법
US7348672B2 (en) * 2005-07-07 2008-03-25 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnects with improved reliability
US7572741B2 (en) * 2005-09-16 2009-08-11 Cree, Inc. Methods of fabricating oxide layers on silicon carbide layers utilizing atomic oxygen
JP2007134592A (ja) * 2005-11-11 2007-05-31 Renesas Technology Corp Ｃｕ配線形成方法
US20070155186A1 (en) * 2005-11-22 2007-07-05 International Business Machines Corporation OPTIMIZED SiCN CAPPING LAYER
US8921193B2 (en) * 2006-01-17 2014-12-30 Taiwan Semiconductor Manufacturing Company, Ltd. Pre-gate dielectric process using hydrogen annealing
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US20070218214A1 (en) * 2006-03-14 2007-09-20 Kuo-Chih Lai Method of improving adhesion property of dielectric layer and interconnect process
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US7799689B2 (en) * 2006-11-17 2010-09-21 Taiwan Semiconductor Manufacturing Company, Ltd Method and apparatus for chemical mechanical polishing including first and second polishing
US7749893B2 (en) * 2006-12-18 2010-07-06 Lam Research Corporation Methods and systems for low interfacial oxide contact between barrier and copper metallization
JP5010265B2 (ja) * 2006-12-18 2012-08-29 株式会社東芝 半導体装置の製造方法
KR100897826B1 (ko) * 2007-08-31 2009-05-18 주식회사 동부하이텍 반도체 소자의 제조 방법
US8648444B2 (en) * 2007-11-29 2014-02-11 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer scribe line structure for improving IC reliability
US20090176367A1 (en) * 2008-01-08 2009-07-09 Heidi Baks OPTIMIZED SiCN CAPPING LAYER
US20090189282A1 (en) * 2008-01-10 2009-07-30 Rohm Co., Ltd. Semiconductor device
DE102008035235B4 (de) * 2008-07-29 2014-05-22 Ivoclar Vivadent Ag Vorrichtung zur Erwärmung von Formteilen, insbesondere dentalkeramischen Formteilen
CN102689265B (zh) * 2011-03-22 2015-04-29 中芯国际集成电路制造(上海)有限公司 化学机械抛光的方法
CN104025263B (zh) 2011-12-30 2018-07-03 英特尔公司 自封闭的非对称互连结构
US8772938B2 (en) * 2012-12-04 2014-07-08 Intel Corporation Semiconductor interconnect structures
US9209272B2 (en) * 2013-09-11 2015-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Oxidation and etching post metal gate CMP
US10090396B2 (en) * 2015-07-20 2018-10-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating metal gate devices and resulting structures
US10867851B2 (en) * 2018-02-26 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Contact structure and semiconductor device and method of forming the same
DE102018131694B4 (de) * 2018-09-28 2025-03-13 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zum bilden einer integrierten schaltungsstruktur
US10770395B2 (en) * 2018-11-01 2020-09-08 International Business Machines Corporation Silicon carbide and silicon nitride interconnects
KR102864465B1 (ko) * 2018-11-23 2025-09-25 삼성전자주식회사 웨이퍼 평탄화 방법 및 이에 의한 이미지 센서
CN112071803A (zh) * 2020-09-17 2020-12-11 长江存储科技有限责任公司 一种半导体结构及其制造方法
CN112909037A (zh) * 2021-01-28 2021-06-04 上海华力集成电路制造有限公司 一种改善图像传感器随机电报噪声和图像非均一性的方法

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JPH11111843A (ja) 1997-10-01 1999-04-23 Hitachi Ltd 半導体集積回路装置およびその製造方法
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005033164A (ja) * 2003-07-09 2005-02-03 Hynix Semiconductor Inc 半導体素子の銅配線形成方法
US7109127B2 (en) 2003-11-06 2006-09-19 Renesas Technology Corp. Manufacturing method of semiconductor device
US7419916B2 (en) 2003-11-06 2008-09-02 Renesas Technology Corp. Manufacturing method of semiconductor device
JP2007533171A (ja) * 2004-04-19 2007-11-15 アプライド　マテリアルズ　インコーポレイテッド 低ｋ誘電体と導電材料との接着改善
JP2011228717A (ja) * 2004-04-19 2011-11-10 Applied Materials Inc 低ｋ誘電体と導電材料との接着改善
JP2007067132A (ja) * 2005-08-31 2007-03-15 Sony Corp 半導体装置の製造方法
US7670941B2 (en) 2005-08-31 2010-03-02 Sony Corporation Method for production of semiconductor devices
JP2012060148A (ja) * 2011-11-14 2012-03-22 Renesas Electronics Corp 半導体集積回路装置の製造方法
WO2026006710A1 (en) * 2024-06-28 2026-01-02 Lam Research Corporation Carbon film deposition with reducing treatment after shaping etch

Also Published As

Publication number Publication date
US6890846B2 (en) 2005-05-10
US20050196954A1 (en) 2005-09-08
TW200305951A (en) 2003-11-01
KR20030051359A (ko) 2003-06-25
US20030114000A1 (en) 2003-06-19

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