JP2002510877A - 表面平坦化のための、表面への制御された多様な厚みの材料の蒸着 - Google Patents

表面平坦化のための、表面への制御された多様な厚みの材料の蒸着

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Publication number
JP2002510877A
JP2002510877A JP2000542790A JP2000542790A JP2002510877A JP 2002510877 A JP2002510877 A JP 2002510877A JP 2000542790 A JP2000542790 A JP 2000542790A JP 2000542790 A JP2000542790 A JP 2000542790A JP 2002510877 A JP2002510877 A JP 2002510877A
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JP
Japan
Prior art keywords
semiconductor
tool
height
database
profile
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000542790A
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English (en)
Japanese (ja)
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JP2002510877A5 (enExample
Inventor
ドーソン,ロバート
メイ,チャールズ・イー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2002510877A publication Critical patent/JP2002510877A/ja
Publication of JP2002510877A5 publication Critical patent/JP2002510877A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31051Planarisation of the insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31051Planarisation of the insulating layers
    • H01L21/31053Planarisation of the insulating layers involving a dielectric removal step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP2000542790A 1998-04-06 1998-10-19 表面平坦化のための、表面への制御された多様な厚みの材料の蒸着 Pending JP2002510877A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/056,024 US6033921A (en) 1998-04-06 1998-04-06 Method for depositing a material of controlled, variable thickness across a surface for planarization of that surface
US09/056,024 1998-04-06
PCT/US1998/022003 WO1999052133A1 (en) 1998-04-06 1998-10-19 Depositing a material of controlled, variable thickness across a surface for planarization of that surface

Publications (2)

Publication Number Publication Date
JP2002510877A true JP2002510877A (ja) 2002-04-09
JP2002510877A5 JP2002510877A5 (enExample) 2006-01-05

Family

ID=22001674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000542790A Pending JP2002510877A (ja) 1998-04-06 1998-10-19 表面平坦化のための、表面への制御された多様な厚みの材料の蒸着

Country Status (5)

Country Link
US (2) US6033921A (enExample)
EP (1) EP1070343A1 (enExample)
JP (1) JP2002510877A (enExample)
KR (1) KR20010042493A (enExample)
WO (1) WO1999052133A1 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101733064B1 (ko) 2015-06-01 2017-05-08 가부시키가이샤 히다치 고쿠사이 덴키 반도체 장치의 제조 방법, 기판 처리 시스템, 기판 처리 장치 및 기록 매체
CN107871711A (zh) * 2016-09-28 2018-04-03 株式会社日立国际电气 半导体器件的制造方法、衬底处理装置及记录介质
CN115667577A (zh) * 2020-06-15 2023-01-31 东京毅力科创株式会社 喷淋板及成膜装置

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6033921A (en) * 1998-04-06 2000-03-07 Advanced Micro Devices, Inc. Method for depositing a material of controlled, variable thickness across a surface for planarization of that surface
US6503767B2 (en) * 2000-12-19 2003-01-07 Speedfam-Ipec Corporation Process for monitoring a process, planarizing a surface, and for quantifying the results of a planarization process
US6996235B2 (en) * 2001-10-08 2006-02-07 Pitney Bowes Inc. Method and system for secure printing of documents via a printer coupled to the internet
EP1629522A4 (en) * 2003-05-30 2008-07-23 Aviza Tech Inc GAS DISTRIBUTION SYSTEM
JP6133347B2 (ja) 2015-03-30 2017-05-24 株式会社日立国際電気 半導体装置の製造方法、基板処理システム及びプログラム
JP6109224B2 (ja) * 2015-03-30 2017-04-05 株式会社日立国際電気 半導体装置の製造方法、プログラムおよび基板処理装置
JP6072845B2 (ja) * 2015-03-31 2017-02-01 株式会社日立国際電気 半導体装置の製造方法、基板処理システム、基板処理装置及びプログラム
JP6126155B2 (ja) * 2015-03-31 2017-05-10 株式会社日立国際電気 半導体装置の製造方法、プログラムおよび基板処理装置
US20170040233A1 (en) * 2015-08-04 2017-02-09 Hitachi Kokusai Electric Inc. Substrate Processing Apparatus and Substrate Processing System
JP6151745B2 (ja) * 2015-08-04 2017-06-21 株式会社日立国際電気 基板処理装置、基板処理システム、半導体装置の製造方法、プログラム及び記録媒体
JP6153975B2 (ja) * 2015-08-07 2017-06-28 株式会社日立国際電気 半導体装置の製造方法、基板処理システム、プログラム、記録媒体および基板処理装置
CN114075661B (zh) * 2020-08-14 2022-11-18 长鑫存储技术有限公司 半导体沉积方法及半导体沉积系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6479399A (en) * 1987-09-22 1989-03-24 Nippon Steel Corp Production of metallic plate having colored pattern
JPH04212414A (ja) * 1990-08-16 1992-08-04 Fuji Electric Co Ltd プラズマ処理装置
JPH06177056A (ja) * 1992-12-09 1994-06-24 Hitachi Ltd ガス処理装置
JPH0922795A (ja) * 1995-07-04 1997-01-21 Sony Corp プラズマcvd装置およびプラズマcvd方法
JPH09205049A (ja) * 1996-01-23 1997-08-05 Kokusai Electric Co Ltd 成膜装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0582724A1 (de) * 1992-08-04 1994-02-16 Siemens Aktiengesellschaft Verfahren zur lokal und global planarisierenden CVD-Abscheidung von SiO2-Schichten auf strukturierten Siliziumsubstraten
US5419803A (en) * 1993-11-17 1995-05-30 Hughes Aircraft Company Method of planarizing microstructures
KR100203995B1 (ko) * 1995-02-16 1999-06-15 나가시마 카쭈시게, 노미야마 아키히코 입자충전방법 및 장치
US5665199A (en) * 1995-06-23 1997-09-09 Advanced Micro Devices, Inc. Methodology for developing product-specific interlayer dielectric polish processes
KR0165320B1 (ko) * 1995-12-27 1999-02-01 김광호 반도체 산화 공정의 소크타임 설정 방법
US6033921A (en) * 1998-04-06 2000-03-07 Advanced Micro Devices, Inc. Method for depositing a material of controlled, variable thickness across a surface for planarization of that surface

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6479399A (en) * 1987-09-22 1989-03-24 Nippon Steel Corp Production of metallic plate having colored pattern
JPH04212414A (ja) * 1990-08-16 1992-08-04 Fuji Electric Co Ltd プラズマ処理装置
JPH06177056A (ja) * 1992-12-09 1994-06-24 Hitachi Ltd ガス処理装置
JPH0922795A (ja) * 1995-07-04 1997-01-21 Sony Corp プラズマcvd装置およびプラズマcvd方法
JPH09205049A (ja) * 1996-01-23 1997-08-05 Kokusai Electric Co Ltd 成膜装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101733064B1 (ko) 2015-06-01 2017-05-08 가부시키가이샤 히다치 고쿠사이 덴키 반도체 장치의 제조 방법, 기판 처리 시스템, 기판 처리 장치 및 기록 매체
CN107871711A (zh) * 2016-09-28 2018-04-03 株式会社日立国际电气 半导体器件的制造方法、衬底处理装置及记录介质
JP2018056281A (ja) * 2016-09-28 2018-04-05 株式会社日立国際電気 半導体装置の製造方法、基板処理装置およびプログラム
CN115667577A (zh) * 2020-06-15 2023-01-31 东京毅力科创株式会社 喷淋板及成膜装置
KR20230019202A (ko) 2020-06-15 2023-02-07 도쿄엘렉트론가부시키가이샤 샤워 플레이트 및 성막 장치

Also Published As

Publication number Publication date
US6033921A (en) 2000-03-07
WO1999052133A1 (en) 1999-10-14
EP1070343A1 (en) 2001-01-24
KR20010042493A (ko) 2001-05-25
US6184986B1 (en) 2001-02-06

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