1227921 (1) 玖、發明說明 【發明所屬之技術領域】 本發明關係於化學機械硏磨半導體晶圓之終點檢測。 更明確地說，本案關係於化學機械硏磨製程的過度硏磨（ 〇 v e r · ρ ο 1 i s h )的時間控制。 【先前技術】 於半導體工業中，化學機械硏磨（C Μ P )係用以藉由 對著一硏磨墊旋轉一半導體晶圓，而選擇地自該晶圓去除 部份之薄膜。薄膜的過度硏磨（去除太多）或不夠硏磨（ 去除太少）將導致晶圓的刮傷或重作，這將造成很昂貴的 成本。、 因·此’於本技藝中，有必要在線上直接監視CMP製 程並精確地決定總硏磨時間。其中一種方法爲採用了一終 點檢測（EPD )系統。同時，爲了針對膜及CMP製程中 之不均勻事件，有人採用了過度硏磨之步驟。因此，發展 出兩種決定過度硏磨時間的方法。第一種爲固定時間法， 當進行該硏磨方法時，將該過度硏磨時間設定爲固定時間 ，而不管該終點檢測時間爲多長。因爲在CMP之過度硏 磨後之剩餘膜均勻度係關係於EPD時間，所以此並不是 設定過度硏磨時間的一正確方法。另一種則爲所謂EP D 百分比法’該方法將過度硏磨時間直接成比例於EPD時 間。然而，此方法仍爲過度簡化。同時，於例如淺溝渠絕 緣（STI )之化學機械硏磨之應用中，此等過度硏磨時間 1227921 (2) 的決定方法會造成錯誤。同時，由硏磨機廠商所提供之過 度硏磨時間設定，並沒有其他可選用之決定方法。因此， 有必要發展出一種更精確的方法，來檢測並決定化學機械 硏磨的終點。此方法能藉由將實驗中所取得之過度硏磨時 間與E P D時間的關係’透過一較精確的關係模式表達， 而計算出所需之過度硏磨時間。 【發明內容】 因此，本發明的目的係提供一種終點檢測控制方法， 其能決定過度硏磨時間，以克服先前技術之時間控制不精 確，甚至控制錯誤的情形。 本發明的另一目的爲提供一種終點檢測控制方法，其 能在不變更原來硬體下，來完成更精確之過度硏磨時間的 決定。 本發明的再一目的爲提供一種終點檢測控制方法，其 能依據晶圓產品類型與厚度，而決定出其相關之過度硏磨 時間。 本發明的另一目的爲提供一種終點檢測控制方法，其 不但能適用於決定化學機械硏磨製程中之過度硏磨時間， 同時，也可以適用於其他採用終點檢測系統之製程中。 本發明之決定過度硏磨時間之方法，包含步驟有··將 予以硏磨之多數特性送入化學機械硏磨系統中’進行硏磨 以取得各別之過度硏磨時間與終點檢測時間；相關所得過 度硏磨時間與終點檢測時間，推導出一最佳化公式，並且 -5- (3) 1227921 ，將該最佳化公式存入該化學機械硏磨系統中；及將所予 進行硏磨之特性的厚度輸入，即可取得精確之過度硏磨時 間。 【實施方式】 本發明提供一種使用模式預測控制之半導體晶圓製程 的控制方法。本發明更適用以於化學機械硏磨（CMP )工 具中，控制被硏磨之氧化物膜的硏磨厚度。但是本發明並 不作如此限定，本發明之更詳細了解可以藉由讀取以下之 詳細說明加以完成。 本發明現以化學機械硏磨一淺溝渠絕緣（S TI )結構 之氧化物層爲例加以說明，然可以了解的是，本案也可以 適用於以監視其他去除膜之方法，例如濕式蝕刻、電漿蝕 刻、電化學鈾刻等。 傳統淺溝渠絕緣製程包含步驟有將一矽基材蝕刻至一 相當淺之深度，例如於0.2至0.5微米之間，然後，將這 些淺溝渠塡充以一介電質。部份之STI製程中，包含在以 介電質塡充淺溝渠前，進行一在溝渠壁上成長氧化物的中 間步驟。以下簡述一傳統形成淺溝渠絕緣結構的方法。首 先，在一基板1 〇上，依序形成一墊氧化物1 2與一氮化矽 層1 4。然後，使用微影與蝕刻法，以選擇地去除墊氧化 物1 2與氮化矽層1 4與部份之基板1 〇，以在構成作用區 1 6之墊氧化物1 2與氮化矽14間形成淺溝渠2 〇，如第1 圖所示。 -6- (4) 1227921 隨後，使用一高密度電漿化學氣相沉積（H D P C V D ) 製程，以將一氧化物形成於該基板上。由於該等淺溝渠， 使得藉由該HDPCVD製程所形成之氧化物具有一剖面（ profile )，其中錐狀體氧化物角係形成在該等作用區上。 然而，分別爲第2 A及3 A圖所示，所形成之氧化物角具 有一種現象，即當氧化物層2 2的厚度較小時，其上之高 低起伏較劇烈。相反地，當氧化物層2 2的厚度較大時， 其上之高低起伏較平坦。 接著，使用化學機械硏磨（C Μ P )製程，來將該氧化 物層2 2平坦化。該平坦化分爲兩時間段，一時間段爲將 上下起伏去除達成平坦的EPD時間，如第2Β與3Β圖所 示，分別表示該基板1 〇經過化學機械硏磨EPD時間後之 情形；另一時間段則爲已平坦化後，將氮化矽1 4上之氧化 物去除之過度硏磨（0Ρ )時間，經過過度硏磨後之淺溝 渠內之氧化物區將與氮化矽具有同一位準。明顯地，形成 較薄氧化物層之第2Α及2Β圖，會有一較長之EPD時間 ，但其〇 Ρ時間較短；反之，形成較厚氧化物層之第3 Α及 3B圖，則會有一較短之EPD時間，但是其使用之0P時 間會較長。因此，可以得到0P時間與EPD時間呈一反比 關係。經發明人實驗發現，當所予硏磨之氧化物厚度由 6 100埃增加至6 8 00埃時，其EPD時間會由3 20秒降低至 2 8 0秒。同時，經過硏磨更多之晶圓後，可以根據氧化物 膜厚度與EPD時間得到如第4圖所示之一軌跡。該等膜 厚度與EPD時間之資料點可以被儲存於資料檔案中。其 1227921 (5) 中’可以依據該軌跡推導出以下之等式： y = - 0.0 5 1 5 X + 6 3 0 其中y爲EPD時間及X代表予以硏磨之晶圓的氧化 物膜厚度。 上述等式可以被儲存於一程式（recipe )中，並且， 各種之程式可以被儲存並基於所予以被硏磨之晶圓/薄膜 類型而加以套用。 注意的是，本發明之此類型之製程控制系統並不限定 於此較佳實施例，也可以在少數調整後，用於使用EPD 以監視去除膜的例如電漿蝕刻或濕式蝕刻等之製程中。 雖然本發明已經以特定實施例之方式加以說明，但可 以由前述說明了解，各種替代、修改及變化在熟習於本技 藝者下完成，此等替代、修改及變化係在隨附之申請專利 範圍及本發明的精神與範圍之內。 【圖式簡單說明】 第1圖爲剖面圖，顯示傳統在一半導體基板形成淺溝 渠隔離（S TI )結構之一步驟； 第2A及2B圖爲第1圖之具較薄氧化物層之STI結 構在進行化學機械硏磨前後之剖面圖； 第3A及3B圖爲第1圖之具較厚氧化物層之STI結 構在進行化學機械硏磨前後之剖面圖；及 第4圖爲一圖表，顯示予以硏磨之氧化物層膜厚與 EPD時間之關係。 (6)1227921 [主要元件對照表] 10 基 板 12 墊 氧 化 物 14 氮 化 矽 層 16 作 用 區 20 溝 渠 22 氧 化 物 層1227921 (1) 发明. Description of the invention [Technical field to which the invention belongs] The present invention relates to the end-point detection of chemical mechanical honing semiconductor wafers. More specifically, this case is related to the time control of the excessive honing (0 v e r · ρ ο 1 i s h) of the chemical mechanical honing process. [Previous Technology] In the semiconductor industry, chemical mechanical honing (CMP) is used to selectively remove a portion of a thin film from a semiconductor wafer by rotating it against a honing pad. Excessive honing (too much removal) or insufficient honing (too little removal) of the film will result in scratching or rework of the wafer, which will cause very expensive costs. Therefore, in this technique, it is necessary to directly monitor the CMP process online and accurately determine the total honing time. One method is to use an end point detection (EPD) system. At the same time, in order to address uneven events in the film and CMP process, some people have adopted an excessive honing step. Therefore, two methods have been developed to determine excessive honing time. The first is a fixed time method. When the honing method is performed, the excessive honing time is set to a fixed time regardless of the length of the end point detection time. Because the remaining film uniformity after CMP over honing is related to the EPD time, this is not a correct way to set the over honing time. The other is the so-called EPD percentage method, which directly scales the excess honing time to the EPD time. However, this method is still oversimplified. At the same time, in applications such as chemical mechanical honing of shallow trench insulation (STI), these methods of determining the excessive honing time 1227921 (2) can cause errors. At the same time, there is no other alternative method for determining the honing time provided by the honing machine manufacturer. Therefore, it is necessary to develop a more accurate method to detect and determine the end point of CMP. This method can calculate the required excessive honing time by expressing the relationship between the excessive honing time obtained in the experiment and the E P D time through a more accurate relationship model. [Summary of the Invention] Therefore, an object of the present invention is to provide an endpoint detection control method that can determine excessive honing time to overcome the inaccurate or even wrong control of time control in the prior art. Another object of the present invention is to provide an endpoint detection and control method which can complete a more accurate decision on the honing time without changing the original hardware. Another object of the present invention is to provide an endpoint detection control method, which can determine the related over honing time according to the type and thickness of the wafer product. Another object of the present invention is to provide an endpoint detection control method, which is not only suitable for determining excessive honing time in a chemical mechanical honing process, but also applicable to other processes using an endpoint detection system. The method for determining the excessive honing time of the present invention includes the steps of: sending most of the characteristics of the honing to the chemical mechanical honing system to perform honing to obtain the respective excessive honing time and the end point detection time; related An optimal formula is derived from the obtained excessive honing time and the end point detection time, and -5- (3) 1227921 is stored in the chemical mechanical honing system; and the honing is performed. The characteristic thickness input can obtain accurate excessive honing time. [Embodiment] The present invention provides a method for controlling a semiconductor wafer process using mode predictive control. The present invention is more suitable for controlling the honing thickness of an oxide film to be honed in a chemical mechanical honing (CMP) tool. However, the present invention is not so limited, and a more detailed understanding of the present invention can be accomplished by reading the following detailed description. The present invention is described by taking a chemical mechanical honing of an oxide layer of a shallow trench insulation (STI) structure as an example. However, it can be understood that this case can also be applied to monitoring other methods for removing films, such as wet etching, Plasma etching, electrochemical uranium etching, etc. The traditional shallow trench insulation process includes the steps of etching a silicon substrate to a relatively shallow depth, such as between 0.2 and 0.5 microns, and then filling these shallow trenches with a dielectric. Some STI processes include an intermediate step of growing an oxide on the trench wall before filling the shallow trench with a dielectric. The following briefly describes a traditional method for forming a shallow trench insulation structure. First, a pad oxide 12 and a silicon nitride layer 14 are sequentially formed on a substrate 10. Then, using lithography and etching methods, the pad oxide 12 and the silicon nitride layer 14 and a part of the substrate 10 are selectively removed to form the pad oxide 12 and the silicon nitride in the active region 16. 14 formed shallow trenches 20, as shown in Figure 1. -6- (4) 1227921 Subsequently, a high-density plasma chemical vapor deposition (H D P C V D) process is used to form an oxide on the substrate. Due to the shallow trenches, the oxide formed by the HDPCVD process has a profile, in which the cone oxide angle system is formed on the active regions. However, as shown in Figs. 2A and 3A, respectively, the formed oxide corners have a phenomenon that when the thickness of the oxide layer 22 is small, the heights of the oxide layers 22 fluctuate sharply. Conversely, when the thickness of the oxide layer 22 is large, the height fluctuations thereof are flatter. Next, a chemical mechanical honing (CMP) process is used to planarize the oxide layer 22. The planarization is divided into two time periods. One time period is to remove the ups and downs to achieve a flat EPD time, as shown in Figures 2B and 3B, respectively, showing the condition of the substrate 10 after chemical mechanical honing EPD time; A period of time is the excessive honing (OP) time for removing the oxide on the silicon nitride 14 after the planarization, and the oxide region in the shallow trench after the excessive honing will have the same as that of the silicon nitride. Level. Obviously, if the 2A and 2B patterns of the thinner oxide layer are formed, there will be a longer EPD time, but its OP time is shorter; on the contrary, if the 3A and 3B patterns of the thicker oxide layer are formed, the There is a shorter EPD time, but its OP time will be longer. Therefore, we can get an inverse relationship between the OP time and the EPD time. The inventor's experiments have found that when the thickness of the honing oxide increases from 6 100 angstroms to 6 8000 angstroms, the EPD time decreases from 3 20 seconds to 280 seconds. At the same time, after honing more wafers, one of the trajectories shown in Figure 4 can be obtained according to the oxide film thickness and EPD time. The data points of film thickness and EPD time can be stored in the data file. The following equation in 1227921 (5) can be used to derive the following equation: y =-0.0 5 1 5 X + 6 3 0 where y is the EPD time and X is the oxide film thickness of the wafer to be honed. The above equations can be stored in a recipe, and various programs can be stored and applied based on the type of wafer / film being honed. Note that this type of process control system of the present invention is not limited to this preferred embodiment, and can also be used to monitor the removal of films such as plasma etching or wet etching processes using EPD after a few adjustments. in. Although the present invention has been described in terms of specific embodiments, it can be understood from the foregoing description that various substitutions, modifications, and changes are made by those skilled in the art, and these substitutions, modifications, and changes are within the scope of the accompanying patent application And within the spirit and scope of the present invention. [Brief description of the figure] Figure 1 is a cross-sectional view showing one step of forming a shallow trench isolation (STI) structure on a semiconductor substrate. Figures 2A and 2B are STIs with a thinner oxide layer in Figure 1 Sectional views of the structure before and after chemical mechanical honing; Figures 3A and 3B are sectional views of the STI structure with a thicker oxide layer before and after chemical mechanical honing in Figure 1; and Figure 4 is a chart, The relationship between the thickness of the oxide layer to be honed and the EPD time is shown. (6) 1227921 [Comparison table of main components] 10 base board 12 pads of oxide 14 silicon nitride layer 16 function area 20 trenches 22 oxide layer
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