JP2000215680A5 - - Google Patents
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- Publication number
- JP2000215680A5 JP2000215680A5 JP1999013449A JP1344999A JP2000215680A5 JP 2000215680 A5 JP2000215680 A5 JP 2000215680A5 JP 1999013449 A JP1999013449 A JP 1999013449A JP 1344999 A JP1344999 A JP 1344999A JP 2000215680 A5 JP2000215680 A5 JP 2000215680A5
- Authority
- JP
- Japan
- Prior art keywords
- memory cell
- control circuit
- data
- sense amplifier
- cpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1344999A JP2000215680A (ja) | 1999-01-21 | 1999-01-21 | メモリ制御回路 |
| US09/330,220 US6075731A (en) | 1999-01-21 | 1999-06-11 | Memory control apparatus having data retention capabilities |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1344999A JP2000215680A (ja) | 1999-01-21 | 1999-01-21 | メモリ制御回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000215680A JP2000215680A (ja) | 2000-08-04 |
| JP2000215680A5 true JP2000215680A5 (enExample) | 2005-11-04 |
Family
ID=11833460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1344999A Pending JP2000215680A (ja) | 1999-01-21 | 1999-01-21 | メモリ制御回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6075731A (enExample) |
| JP (1) | JP2000215680A (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7211044B2 (en) * | 2001-05-29 | 2007-05-01 | Ethicon Endo-Surgery, Inc. | Method for mapping temperature rise using pulse-echo ultrasound |
| JP3692418B2 (ja) * | 2002-10-09 | 2005-09-07 | 沖電気工業株式会社 | 半導体装置の誤動作防止回路 |
| US20090027942A1 (en) * | 2004-04-26 | 2009-01-29 | Applied Interllectual Properties | Semiconductor memory unit and array |
| US20080123430A1 (en) * | 2006-06-29 | 2008-05-29 | Applied Intellectual Property Co., Ltd. | Non-volatile memory unit and array |
| US7334182B2 (en) * | 2004-11-24 | 2008-02-19 | Northrop Grumman Corporation | Serial data preservation method |
| JP5731730B2 (ja) * | 2008-01-11 | 2015-06-10 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体記憶装置及びその半導体記憶装置を含むデータ処理システム |
| JP5495885B2 (ja) * | 2010-03-26 | 2014-05-21 | 三菱電機株式会社 | データ記憶装置 |
| US8422303B2 (en) * | 2010-12-22 | 2013-04-16 | HGST Netherlands B.V. | Early degradation detection in flash memory using test cells |
| CN109935252B (zh) * | 2017-12-15 | 2021-03-30 | 旺宏电子股份有限公司 | 存储器装置及其操作方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62128097A (ja) * | 1985-11-27 | 1987-06-10 | Mitsubishi Electric Corp | 不揮発生メモリ装置 |
| US5276856A (en) * | 1989-09-28 | 1994-01-04 | Pixel Semiconductor, Inc. | Memory controller flexible timing control system and method |
| JPH08297987A (ja) * | 1995-04-26 | 1996-11-12 | Toshiba Corp | 不揮発性半導体記憶装置 |
| JP3789542B2 (ja) * | 1996-04-04 | 2006-06-28 | 富士通株式会社 | メモリ制御回路 |
| JPH09320300A (ja) * | 1996-05-28 | 1997-12-12 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US5901103A (en) * | 1997-04-07 | 1999-05-04 | Motorola, Inc. | Integrated circuit having standby control for memory and method thereof |
-
1999
- 1999-01-21 JP JP1344999A patent/JP2000215680A/ja active Pending
- 1999-06-11 US US09/330,220 patent/US6075731A/en not_active Expired - Lifetime
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