IT1191561B - Dispositivo di memoria non labile a semiconduttore con porta non connessa (floating gate) alterabile elettricamente - Google Patents

Dispositivo di memoria non labile a semiconduttore con porta non connessa (floating gate) alterabile elettricamente

Info

Publication number
IT1191561B
IT1191561B IT83623/86A IT8362386A IT1191561B IT 1191561 B IT1191561 B IT 1191561B IT 83623/86 A IT83623/86 A IT 83623/86A IT 8362386 A IT8362386 A IT 8362386A IT 1191561 B IT1191561 B IT 1191561B
Authority
IT
Italy
Prior art keywords
door
memory device
floating gate
electrically alterable
semiconductor non
Prior art date
Application number
IT83623/86A
Other languages
English (en)
Other versions
IT8683623A0 (it
Inventor
Gabriella Fontana
Original Assignee
Sgs Microelettrica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettrica Spa filed Critical Sgs Microelettrica Spa
Priority to IT83623/86A priority Critical patent/IT1191561B/it
Publication of IT8683623A0 publication Critical patent/IT8683623A0/it
Priority to US07/054,712 priority patent/US4823175A/en
Priority to DE8787830204T priority patent/DE3768176D1/de
Priority to JP62132028A priority patent/JPH0810727B2/ja
Priority to EP87830204A priority patent/EP0256993B1/en
Application granted granted Critical
Publication of IT1191561B publication Critical patent/IT1191561B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
IT83623/86A 1986-06-03 1986-06-03 Dispositivo di memoria non labile a semiconduttore con porta non connessa (floating gate) alterabile elettricamente IT1191561B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT83623/86A IT1191561B (it) 1986-06-03 1986-06-03 Dispositivo di memoria non labile a semiconduttore con porta non connessa (floating gate) alterabile elettricamente
US07/054,712 US4823175A (en) 1986-06-03 1987-05-27 Electrically alterable, nonvolatile floating gate memory device
DE8787830204T DE3768176D1 (de) 1986-06-03 1987-05-29 Elektrisch veraenderbare nichtfluechtige speichereinrichtung mit schwebendem tor.
JP62132028A JPH0810727B2 (ja) 1986-06-03 1987-05-29 電気的に変更できる持久記憶浮動ゲ−トメモリデバイス
EP87830204A EP0256993B1 (en) 1986-06-03 1987-05-29 Electrically alterable, nonvolatile, floating gate memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT83623/86A IT1191561B (it) 1986-06-03 1986-06-03 Dispositivo di memoria non labile a semiconduttore con porta non connessa (floating gate) alterabile elettricamente

Publications (2)

Publication Number Publication Date
IT8683623A0 IT8683623A0 (it) 1986-06-03
IT1191561B true IT1191561B (it) 1988-03-23

Family

ID=11323290

Family Applications (1)

Application Number Title Priority Date Filing Date
IT83623/86A IT1191561B (it) 1986-06-03 1986-06-03 Dispositivo di memoria non labile a semiconduttore con porta non connessa (floating gate) alterabile elettricamente

Country Status (5)

Country Link
US (1) US4823175A (it)
EP (1) EP0256993B1 (it)
JP (1) JPH0810727B2 (it)
DE (1) DE3768176D1 (it)
IT (1) IT1191561B (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5020030A (en) * 1988-10-31 1991-05-28 Huber Robert J Nonvolatile SNOS memory cell with induced capacitor
DE69019872T2 (de) * 1989-03-31 1996-02-22 Philips Electronics Nv Elektrisch programmierbare Halbleiterspeicher.
KR0147452B1 (ko) * 1993-11-30 1998-08-01 사토 후미오 불휘발성 반도체기억장치
US5550072A (en) * 1994-08-30 1996-08-27 National Semiconductor Corporation Method of fabrication of integrated circuit chip containing EEPROM and capacitor
US5498560A (en) * 1994-09-16 1996-03-12 Motorola, Inc. Process for forming an electrically programmable read-only memory cell
EP0752721B1 (en) * 1995-06-29 2009-04-29 Sharp Kabushiki Kaisha Nonvolatile semiconductor memory and driving method and fabrication method of the same
US5877054A (en) * 1995-06-29 1999-03-02 Sharp Kabushiki Kaisha Method of making nonvolatile semiconductor memory
JP3366173B2 (ja) * 1995-07-31 2003-01-14 シャープ株式会社 不揮発性半導体メモリの製造方法
US5844269A (en) * 1996-07-02 1998-12-01 National Semiconductor Corporation EEPROM cell having reduced capacitance across the layer of tunnel oxide
JPH10242434A (ja) * 1997-02-26 1998-09-11 Toshiba Corp 半導体集積回路装置及びフラッシュｅｅｐｒｏｍ
IT1294312B1 (it) * 1997-08-07 1999-03-24 Sgs Thomson Microelectronics Processo per la fabbricazione di un dispositivo di memoria non volatile programmabile elettricamente
TW351852B (en) * 1997-10-20 1999-02-01 United Semicondutor Corp Process for manufacturing flash memory cell structure
US6023085A (en) 1997-12-18 2000-02-08 Advanced Micro Devices, Inc. Core cell structure and corresponding process for NAND-type high performance flash memory device
EP1071134A1 (en) * 1999-07-22 2001-01-24 STMicroelectronics S.r.l. Process for manufacturing an electronic device comprising EEPROM memory cells with dimensional control of the floating gate regions
JP2002026151A (ja) * 2000-07-05 2002-01-25 Mitsubishi Electric Corp 半導体メモリ装置
KR100518577B1 (ko) * 2003-05-26 2005-10-04 삼성전자주식회사 원 타임 프로그래머블 메모리 소자 및 이를 포함하는반도체 집적회로와 그 제조방법
US7262095B1 (en) * 2005-06-07 2007-08-28 Spansion Llc System and method for reducing process-induced charging
KR100731058B1 (ko) * 2005-12-26 2007-06-22 동부일렉트로닉스 주식회사 이중 터널 산화막을 포함하는 플래시 메모리 셀 및 그 제조방법
US7825479B2 (en) * 2008-08-06 2010-11-02 International Business Machines Corporation Electrical antifuse having a multi-thickness dielectric layer
CN102709288B (zh) * 2012-05-18 2016-03-30 电子科技大学 一种总剂量辐射加固的半导体存储器

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4288256A (en) * 1977-12-23 1981-09-08 International Business Machines Corporation Method of making FET containing stacked gates
US4498095A (en) * 1978-05-02 1985-02-05 International Business Machines Corporation Semiconductor structure with improved isolation between two layers of polycrystalline silicon
JPS55500965A (it) * 1978-11-27 1980-11-13
US4409723A (en) * 1980-04-07 1983-10-18 Eliyahou Harari Method of forming non-volatile EPROM and EEPROM with increased efficiency
US4458262A (en) * 1980-05-27 1984-07-03 Supertex, Inc. CMOS Device with ion-implanted channel-stop region and fabrication method therefor
DE3032333A1 (de) * 1980-08-27 1982-04-22 Siemens AG, 1000 Berlin und 8000 München Monolithische statische speicherzelle und verfahren zu ihrem betrieb
DE3273867D1 (en) * 1981-07-27 1986-11-20 Xerox Corp Field effect transistor
JPS58115856A (ja) * 1981-12-28 1983-07-09 Nec Home Electronics Ltd 半導体装置
US4477825A (en) * 1981-12-28 1984-10-16 National Semiconductor Corporation Electrically programmable and erasable memory cell
US4442447A (en) * 1982-03-09 1984-04-10 Rca Corporation Electrically alterable nonvolatile floating gate memory device
US4590504A (en) * 1982-12-28 1986-05-20 Thomson Components - Mostek Corporation Nonvolatile MOS memory cell with tunneling element
JPS60130161A (ja) * 1983-12-16 1985-07-11 Fujitsu Ltd スタテイツクメモリセル
IT1213218B (it) * 1984-09-25 1989-12-14 Ates Componenti Elettron Processo per la fabbricazione di una cella di memoria non volatile con area di ossido sottile di dimensioni molto piccole, e cella ottenuta con il processo suddetto.
JPS61194877A (ja) * 1985-02-25 1986-08-29 Nec Corp 絶縁ゲ−ト型不揮発性半導体メモリ
JPS61228672A (ja) * 1985-04-02 1986-10-11 Nec Corp 絶縁ゲ−ト型不揮発性半導体メモリ及びその製造方法

Also Published As

Publication number Publication date
US4823175A (en) 1989-04-18
EP0256993B1 (en) 1991-02-27
JPS62291180A (ja) 1987-12-17
JPH0810727B2 (ja) 1996-01-31
DE3768176D1 (de) 1991-04-04
EP0256993A1 (en) 1988-02-24
IT8683623A0 (it) 1986-06-03

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970628