HK1044737A1 - Method for manufacturing encapsulated electronicalcomponents. - Google Patents

Method for manufacturing encapsulated electronicalcomponents.

Info

Publication number
HK1044737A1
HK1044737A1 HK02105587A HK02105587A HK1044737A1 HK 1044737 A1 HK1044737 A1 HK 1044737A1 HK 02105587 A HK02105587 A HK 02105587A HK 02105587 A HK02105587 A HK 02105587A HK 1044737 A1 HK1044737 A1 HK 1044737A1
Authority
HK
Hong Kong
Prior art keywords
electronic components
electrically conducting
adhesive film
conducting support
support
Prior art date
Application number
HK02105587A
Other languages
English (en)
Inventor
Johannes Bernardus Pet Janssen
Johannes Bernardus De Vrught
Original Assignee
3P Licensing Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=19769109&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=HK1044737(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by 3P Licensing Bv filed Critical 3P Licensing Bv
Publication of HK1044737A1 publication Critical patent/HK1044737A1/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/14Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
    • B29C45/14639Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
    • B29C45/14655Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/30Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/35Heat-activated
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • H01L21/566Release layers for moulds, e.g. release layers, layers against residue during moulding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/183Connection portion, e.g. seal
    • H01L2924/18301Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
HK02105587A 1999-04-29 2002-07-30 Method for manufacturing encapsulated electronicalcomponents. HK1044737A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL1011929A NL1011929C2 (nl) 1999-04-29 1999-04-29 Werkwijze voor het inkapselen van elektronische componenten, in het bijzonder geintegreerde schakelingen.
PCT/NL2000/000280 WO2000066340A1 (en) 1999-04-29 2000-05-01 Method for manufacturing encapsulated electronical components

Publications (1)

Publication Number Publication Date
HK1044737A1 true HK1044737A1 (en) 2002-11-01

Family

ID=19769109

Family Applications (1)

Application Number Title Priority Date Filing Date
HK02105587A HK1044737A1 (en) 1999-04-29 2002-07-30 Method for manufacturing encapsulated electronicalcomponents.

Country Status (11)

Country Link
US (2) US6613607B2 (nl)
EP (2) EP1338397A3 (nl)
JP (2) JP2002543604A (nl)
KR (1) KR100701720B1 (nl)
AT (1) ATE258846T1 (nl)
AU (1) AU4624900A (nl)
DE (1) DE60008093T2 (nl)
HK (1) HK1044737A1 (nl)
NL (1) NL1011929C2 (nl)
SG (1) SG121813A1 (nl)
WO (1) WO2000066340A1 (nl)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10012880A1 (de) * 2000-03-16 2001-09-27 Infineon Technologies Ag Verfahren und Vorrichtung zur Herstellung einer Halbleiterchip-Umhüllung
US6908791B2 (en) * 2002-04-29 2005-06-21 Texas Instruments Incorporated MEMS device wafer-level package
NL1020594C2 (nl) 2002-05-14 2003-11-17 Fico Bv Werkwijze voor het met behulp van een folielaag omhullen van een elektronische component.
TW560026B (en) * 2002-08-27 2003-11-01 Uni Tek System Inc Singulation method of the array-type work piece to be singulated having metal layer singulation street, and the array-type work piece to be singulated applying the method
US7759775B2 (en) * 2004-07-20 2010-07-20 Alpha And Omega Semiconductor Incorporated High current semiconductor power device SOIC package
US7238551B2 (en) * 2004-11-23 2007-07-03 Siliconix Incorporated Method of fabricating semiconductor package including die interposed between cup-shaped lead frame having mesas and valleys
US7394150B2 (en) * 2004-11-23 2008-07-01 Siliconix Incorporated Semiconductor package including die interposed between cup-shaped lead frame and lead frame having mesas and valleys
US20060180579A1 (en) * 2005-02-11 2006-08-17 Towa Intercon Technology, Inc. Multidirectional cutting chuck
US20070130759A1 (en) * 2005-06-15 2007-06-14 Gem Services, Inc. Semiconductor device package leadframe formed from multiple metal layers
GB0516625D0 (en) * 2005-08-15 2005-09-21 Eurocut Ltd Orthopaedic surgical instrument
JP4782522B2 (ja) * 2005-09-27 2011-09-28 ソニーケミカル&インフォメーションデバイス株式会社 光機能素子パッケージ及びその製造方法
US7608482B1 (en) * 2006-12-21 2009-10-27 National Semiconductor Corporation Integrated circuit package with molded insulation
JP2008258411A (ja) * 2007-04-05 2008-10-23 Rohm Co Ltd 半導体装置および半導体装置の製造方法
JP5285289B2 (ja) * 2008-02-06 2013-09-11 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置およびその製造方法
EP2154713B1 (en) * 2008-08-11 2013-01-02 Sensirion AG Method for manufacturing a sensor device with a stress relief layer
US8829685B2 (en) * 2009-03-31 2014-09-09 Semiconductor Components Industries, Llc Circuit device having funnel shaped lead and method for manufacturing the same
TWI453831B (zh) 2010-09-09 2014-09-21 台灣捷康綜合有限公司 半導體封裝結構及其製造方法
KR101247561B1 (ko) 2011-08-18 2013-03-25 주식회사 해성엔지니어링 스트립용 테이핑장치
JP6146732B2 (ja) * 2013-01-18 2017-06-14 Shマテリアル株式会社 半導体素子搭載用基板及びその製造方法
US9966330B2 (en) 2013-03-14 2018-05-08 Vishay-Siliconix Stack die package
US9589929B2 (en) 2013-03-14 2017-03-07 Vishay-Siliconix Method for fabricating stack die package
JP6180646B1 (ja) * 2016-02-25 2017-08-16 三菱電機株式会社 半導体パッケージ、及びモジュール

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3635754A (en) * 1966-01-21 1972-01-18 Johnson & Johnson Adhesive product
US3754070A (en) 1970-08-03 1973-08-21 Motorola Inc Flash free molding
US4980016A (en) * 1985-08-07 1990-12-25 Canon Kabushiki Kaisha Process for producing electric circuit board
JPH02153354A (ja) * 1988-12-05 1990-06-13 Oki Electric Ind Co Ltd 導電性付与材料及びその使用方法並びにこれを用いた薄膜形成材料
JPH04287351A (ja) * 1991-03-15 1992-10-12 Toowa Kk 電子部品のリード加工方法及び装置
US5218759A (en) * 1991-03-18 1993-06-15 Motorola, Inc. Method of making a transfer molded semiconductor device
JP2708343B2 (ja) * 1993-01-28 1998-02-04 ローム株式会社 半導体装置の製造方法およびリードフレーム
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
JP3541491B2 (ja) * 1994-06-22 2004-07-14 セイコーエプソン株式会社 電子部品
JP3257904B2 (ja) * 1994-08-11 2002-02-18 新光電気工業株式会社 リードフレームとその製造方法
JPH08172153A (ja) * 1994-12-20 1996-07-02 Sony Corp 半導体装置のリード加工方法及びリード加工用金型
US5977613A (en) * 1996-03-07 1999-11-02 Matsushita Electronics Corporation Electronic component, method for making the same, and lead frame and mold assembly for use therein
US6001671A (en) * 1996-04-18 1999-12-14 Tessera, Inc. Methods for manufacturing a semiconductor package having a sacrificial layer
KR100206910B1 (ko) * 1996-06-14 1999-07-01 구본준 반도체 패키지의 디플래쉬 방법
US6048483A (en) * 1996-07-23 2000-04-11 Apic Yamada Corporation Resin sealing method for chip-size packages
JPH10209190A (ja) * 1997-01-21 1998-08-07 Fujitsu Ltd 半導体装置の製造方法及び半導体装置
CN1122304C (zh) * 1997-02-10 2003-09-24 松下电器产业株式会社 树脂封装型半导体装置的制造方法
KR100214555B1 (ko) * 1997-02-14 1999-08-02 구본준 반도체 패키지의 제조방법
FR2764111A1 (fr) * 1997-06-03 1998-12-04 Sgs Thomson Microelectronics Procede de fabrication de boitiers semi-conducteurs comprenant un circuit integre
JP2971834B2 (ja) * 1997-06-27 1999-11-08 松下電子工業株式会社 樹脂封止型半導体装置の製造方法
JP3017470B2 (ja) * 1997-07-11 2000-03-06 アピックヤマダ株式会社 樹脂モールド方法及び樹脂モールド装置
US6028354A (en) * 1997-10-14 2000-02-22 Amkor Technology, Inc. Microelectronic device package having a heat sink structure for increasing the thermal conductivity of the package
US6187654B1 (en) * 1998-03-13 2001-02-13 Intercon Tools, Inc. Techniques for maintaining alignment of cut dies during substrate dicing
US6130473A (en) * 1998-04-02 2000-10-10 National Semiconductor Corporation Lead frame chip scale package
JP3862411B2 (ja) * 1998-05-12 2006-12-27 三菱電機株式会社 半導体装置の製造方法及びその構造
US6294100B1 (en) * 1998-06-10 2001-09-25 Asat Ltd Exposed die leadless plastic chip carrier
JP2000208540A (ja) * 1998-08-25 2000-07-28 Texas Instr Inc <Ti> 薄型半導体チップスケ―ル・パッケ―ジを密封する方法

Also Published As

Publication number Publication date
DE60008093T2 (de) 2004-09-09
US6921682B2 (en) 2005-07-26
WO2000066340A1 (en) 2000-11-09
US20020064926A1 (en) 2002-05-30
KR100701720B1 (ko) 2007-03-29
EP1338397A3 (en) 2004-03-24
AU4624900A (en) 2000-11-17
EP1175290B1 (en) 2004-02-04
NL1011929C2 (nl) 2000-10-31
JP3744927B2 (ja) 2006-02-15
US20040005737A1 (en) 2004-01-08
EP1338397A2 (en) 2003-08-27
DE60008093D1 (de) 2004-03-11
EP1175290A1 (en) 2002-01-30
SG121813A1 (en) 2006-05-26
US6613607B2 (en) 2003-09-02
JP2004349728A (ja) 2004-12-09
JP2002543604A (ja) 2002-12-17
KR20020000883A (ko) 2002-01-05
ATE258846T1 (de) 2004-02-15

Similar Documents

Publication Publication Date Title
HK1044737A1 (en) Method for manufacturing encapsulated electronicalcomponents.
EP1107306A4 (en) SEMICONDUCTOR HOUSING, SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR HOUSING
EP0902472A3 (en) Combination inductive coil and integrated circuit semiconductor chip in a single lead frame package and method therefor
JP2001511946A (ja) グリッドアレイ組立体及び製造方法
EP0773584A3 (en) Device having resin package and method of producing the same
EP0977251A4 (en) RESIN-SEALED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
EP1205971A3 (en) Electronic component and method and structure for mounting semiconductor device
MY123937A (en) Process for manufacturing semiconductor package and circuit board assembly
HK1027215A1 (en) Broad for mounting semiconductor element, method for manufacturing the same, and semiconductor device
EP0820099A3 (en) Packaged semiconductor device and method of manufacturing the same
GR3026168T3 (en) Method for encapsulating an integrated circuit.
US6649834B1 (en) Injection molded image sensor and a method for manufacturing the same
EP1094512A4 (en) METHOD FOR SEALING WITH A RESIN A SEMICONDUCTOR WAFER AND ADHESIVE STRIP FOR GLUING CONDUCTOR ARRAYS OR THE LIKE
US5445995A (en) Method for manufacturing plastic-encapsulated semiconductor devices with exposed metal heat sink
JP2867954B2 (ja) チップ型半導体装置の製造方法
JPH02126685A (ja) 固体イメージセンサー
US20040113049A1 (en) Injection molded image sensor and a method for manufacturing the same
TW324852B (en) Improved fabricating method of semiconductor device
JPH0936155A (ja) 半導体装置の製造方法
KR100725319B1 (ko) 반도체장치의 제조방법
US6383841B2 (en) Method for encapsulating with a fixing member to secure an electronic device
JP2006032470A (ja) 電子装置
JP2003188332A (ja) 半導体装置およびその製造方法
JPH10223822A (ja) 半導体装置
JPH0442547A (ja) プリント基板への部品搭載方法

Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20150501