FR2555365B1 - Procede de fabrication de circuit integre avec connexions de siliciure de tantale et circuit integre realise selon ce procede - Google Patents

Procede de fabrication de circuit integre avec connexions de siliciure de tantale et circuit integre realise selon ce procede

Info

Publication number
FR2555365B1
FR2555365B1 FR8318565A FR8318565A FR2555365B1 FR 2555365 B1 FR2555365 B1 FR 2555365B1 FR 8318565 A FR8318565 A FR 8318565A FR 8318565 A FR8318565 A FR 8318565A FR 2555365 B1 FR2555365 B1 FR 2555365B1
Authority
FR
France
Prior art keywords
integrated circuit
tantalum silicide
performed according
tantalum
connections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8318565A
Other languages
English (en)
French (fr)
Other versions
FR2555365A1 (fr
Inventor
Annie Baudrant
Michel Marty
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EFCIS
Original Assignee
EFCIS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EFCIS filed Critical EFCIS
Priority to FR8318565A priority Critical patent/FR2555365B1/fr
Priority to EP84402348A priority patent/EP0143700B1/fr
Priority to AT84402348T priority patent/ATE65003T1/de
Priority to DE8484402348T priority patent/DE3484769D1/de
Priority to US06/673,425 priority patent/US4593454A/en
Priority to JP59246368A priority patent/JPS60138942A/ja
Publication of FR2555365A1 publication Critical patent/FR2555365A1/fr
Priority to US06/833,845 priority patent/US4714951A/en
Application granted granted Critical
Publication of FR2555365B1 publication Critical patent/FR2555365B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6304Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6314Formation by oxidation, e.g. oxidation of the substrate of a metallic layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/011Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/62Electrodes ohmically coupled to a semiconductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69393Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing tantalum, e.g. Ta2O5
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/019Contacts of silicides
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/02Contacts, special
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/117Oxidation, selective
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/147Silicides

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Bipolar Transistors (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
FR8318565A 1983-11-22 1983-11-22 Procede de fabrication de circuit integre avec connexions de siliciure de tantale et circuit integre realise selon ce procede Expired FR2555365B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR8318565A FR2555365B1 (fr) 1983-11-22 1983-11-22 Procede de fabrication de circuit integre avec connexions de siliciure de tantale et circuit integre realise selon ce procede
EP84402348A EP0143700B1 (fr) 1983-11-22 1984-11-16 Procédé de fabrication de circuit intégré avec connexions de siliciure de tantale et circuit intégré réalisé selon ce procédé
AT84402348T ATE65003T1 (de) 1983-11-22 1984-11-16 Verfahren zur herstellung einer integrierten schaltung aus tantalsiliziden und nach diesem verfahren hergestellte integrierte schaltung.
DE8484402348T DE3484769D1 (de) 1983-11-22 1984-11-16 Verfahren zur herstellung einer integrierten schaltung aus tantalsiliziden und nach diesem verfahren hergestellte integrierte schaltung.
US06/673,425 US4593454A (en) 1983-11-22 1984-11-20 Process for manufacturing an integrated circuit with tantalum silicide connections utilizing self-aligned oxidation
JP59246368A JPS60138942A (ja) 1983-11-22 1984-11-22 集積回路およびその製造方法
US06/833,845 US4714951A (en) 1983-11-22 1986-02-26 Integrated circuit device which includes a continous layer which consists of conducting portions which are of a silicide of a refractory metal and insulating portions which are of an oxide of the metal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8318565A FR2555365B1 (fr) 1983-11-22 1983-11-22 Procede de fabrication de circuit integre avec connexions de siliciure de tantale et circuit integre realise selon ce procede

Publications (2)

Publication Number Publication Date
FR2555365A1 FR2555365A1 (fr) 1985-05-24
FR2555365B1 true FR2555365B1 (fr) 1986-08-29

Family

ID=9294381

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8318565A Expired FR2555365B1 (fr) 1983-11-22 1983-11-22 Procede de fabrication de circuit integre avec connexions de siliciure de tantale et circuit integre realise selon ce procede

Country Status (6)

Country Link
US (2) US4593454A (enExample)
EP (1) EP0143700B1 (enExample)
JP (1) JPS60138942A (enExample)
AT (1) ATE65003T1 (enExample)
DE (1) DE3484769D1 (enExample)
FR (1) FR2555365B1 (enExample)

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Also Published As

Publication number Publication date
DE3484769D1 (de) 1991-08-08
JPS60138942A (ja) 1985-07-23
FR2555365A1 (fr) 1985-05-24
ATE65003T1 (de) 1991-07-15
US4593454A (en) 1986-06-10
JPH0418702B2 (enExample) 1992-03-27
US4714951A (en) 1987-12-22
EP0143700A2 (fr) 1985-06-05
EP0143700A3 (en) 1985-09-18
EP0143700B1 (fr) 1991-07-03

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