FR2443742A1 - Perfectionnement apporte au procede pour la production de transistors bipolaires integres a tension elevee de rupture collecteur-emetteur et produit ainsi obtenu - Google Patents

Perfectionnement apporte au procede pour la production de transistors bipolaires integres a tension elevee de rupture collecteur-emetteur et produit ainsi obtenu

Info

Publication number
FR2443742A1
FR2443742A1 FR7929737A FR7929737A FR2443742A1 FR 2443742 A1 FR2443742 A1 FR 2443742A1 FR 7929737 A FR7929737 A FR 7929737A FR 7929737 A FR7929737 A FR 7929737A FR 2443742 A1 FR2443742 A1 FR 2443742A1
Authority
FR
France
Prior art keywords
phase
temperature
thickness
growth
breakage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7929737A
Other languages
English (en)
Other versions
FR2443742B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
ATES Componenti Elettronici SpA
SGS ATES Componenti Elettronici SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ATES Componenti Elettronici SpA, SGS ATES Componenti Elettronici SpA filed Critical ATES Componenti Elettronici SpA
Publication of FR2443742A1 publication Critical patent/FR2443742A1/fr
Application granted granted Critical
Publication of FR2443742B1 publication Critical patent/FR2443742B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/763Polycrystalline semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743Making of internal connections, substrate contacts

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

Procédé pour la production d'un dispositif semi-conducteur intégré qui contient au moins un transistor bipolaire NPN planaire épitaxial de type vertical et des colonnes d'isolement de la jonction. La croissance épitaxiale est fractionnée en trois phases distinctes, stabilisées sur trois températures différentes, la première phase étant limitée en superficie aux zones d'isolement 7 et de diffusion profonde du collecteur 8 et en épaisseur à 6 000-8 000 Angström environ, en l'absence de dopant et à une première température avec les réactifs SiH4 et H et une première vitesse de croissance, la deuxième phase s'étendant à toutes les zones du substrat I, et étant limitée en épaisseur à 30 000 Angström environ, en présence de dopant à une deuxième température avec les réactifs SiCl4 et H pour une seconde vitesse de croissance, la troisième phase s'étendant à l'épaisseur spécifiée par les exigences du projet, et étant menée à une troisième température, avec les mêmes réactifs que pour la deuxième phase, mais une concentration plus grande de SiCl 4 pour une plus grande vitesse de croissance.
FR7929737A 1978-12-04 1979-12-04 Perfectionnement apporte au procede pour la production de transistors bipolaires integres a tension elevee de rupture collecteur-emetteur et produit ainsi obtenu Granted FR2443742A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT30507/78A IT1101183B (it) 1978-12-04 1978-12-04 Perfezionamento al procedimento di produzione per transistori bipolari intagrati con elevata tensione di breakdown collettore-emettitore e prodotto risultante

Publications (2)

Publication Number Publication Date
FR2443742A1 true FR2443742A1 (fr) 1980-07-04
FR2443742B1 FR2443742B1 (fr) 1985-03-08

Family

ID=11229874

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7929737A Granted FR2443742A1 (fr) 1978-12-04 1979-12-04 Perfectionnement apporte au procede pour la production de transistors bipolaires integres a tension elevee de rupture collecteur-emetteur et produit ainsi obtenu

Country Status (5)

Country Link
DE (1) DE2948800A1 (fr)
FR (1) FR2443742A1 (fr)
GB (1) GB2037487A (fr)
IT (1) IT1101183B (fr)
SE (1) SE454631B (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT201600130185A1 (it) * 2016-12-22 2018-06-22 St Microelectronics Srl Procedimento di fabbricazione di un dispositivo a semiconduttore integrante un transistore a conduzione verticale, e dispositivo a semiconduttore

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2053238A1 (fr) * 1969-07-29 1971-04-16 Fairchild Camera Instr Co

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2053238A1 (fr) * 1969-07-29 1971-04-16 Fairchild Camera Instr Co

Also Published As

Publication number Publication date
SE7909953L (sv) 1980-06-05
IT1101183B (it) 1985-09-28
IT7830507A0 (it) 1978-12-04
GB2037487A (en) 1980-07-09
DE2948800A1 (de) 1980-06-19
FR2443742B1 (fr) 1985-03-08
SE454631B (sv) 1988-05-16

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