JPS5624922A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5624922A
JPS5624922A JP10098979A JP10098979A JPS5624922A JP S5624922 A JPS5624922 A JP S5624922A JP 10098979 A JP10098979 A JP 10098979A JP 10098979 A JP10098979 A JP 10098979A JP S5624922 A JPS5624922 A JP S5624922A
Authority
JP
Japan
Prior art keywords
layer
impurity
type
diffuse
diffuse outwardly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10098979A
Other languages
Japanese (ja)
Inventor
Koichi Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10098979A priority Critical patent/JPS5624922A/en
Publication of JPS5624922A publication Critical patent/JPS5624922A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)

Abstract

PURPOSE:To obtain an epitaxial layer having the impurity concentration as previously designed when the epitaxial layer to form a collector of a transistor is made to grow on a semiconductor substrate by a method wherein a substrate containing an impurity being hard to diffuse outwardly is used, and an impurity being easy to diffuse outwardly is implanted previously only to the surface layer. CONSTITUTION:An impurity ions being easy to diffuse outwardly like P, etc., are implanted to the surface layer part of an N type Si substrate 1 containing an impurity being hard to diffuse outwardly like Sb, etc., to form an N type layer 2. An N type layer 3 to form a collector region is made to grow epitaxially on the layer 2, and at this time P impurity in the layer 2 invades into the layer 3 to generate an N type layer 2'. Then B impurity is made to diffuse in the layer 3 by thermal oxidation and photo etching to form a P type base region 5, and P impurity in the layer 2' is made to diffuse outwardly by this heat treatment for many hours to form an N type layer 4 having an intended sag at the bottom part of the layer 3. Then an N type emitter region 7 is formed by diffusion in the region 5.
JP10098979A 1979-08-07 1979-08-07 Manufacture of semiconductor device Pending JPS5624922A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10098979A JPS5624922A (en) 1979-08-07 1979-08-07 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10098979A JPS5624922A (en) 1979-08-07 1979-08-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5624922A true JPS5624922A (en) 1981-03-10

Family

ID=14288715

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10098979A Pending JPS5624922A (en) 1979-08-07 1979-08-07 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5624922A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58166238A (en) * 1982-03-29 1983-10-01 Agency Of Ind Science & Technol Measuring device of quantity of light leakage between optical fiber strands

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58166238A (en) * 1982-03-29 1983-10-01 Agency Of Ind Science & Technol Measuring device of quantity of light leakage between optical fiber strands

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