DE69117582D1 - Epitaktische Siliziumschicht und Verfahren zu deren Abscheidung - Google Patents

Epitaktische Siliziumschicht und Verfahren zu deren Abscheidung

Info

Publication number
DE69117582D1
DE69117582D1 DE69117582T DE69117582T DE69117582D1 DE 69117582 D1 DE69117582 D1 DE 69117582D1 DE 69117582 T DE69117582 T DE 69117582T DE 69117582 T DE69117582 T DE 69117582T DE 69117582 D1 DE69117582 D1 DE 69117582D1
Authority
DE
Germany
Prior art keywords
silicon layer
situ
deposition
type dopant
epitaxial silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69117582T
Other languages
English (en)
Other versions
DE69117582T2 (de
Inventor
Bernard S Meyerson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69117582D1 publication Critical patent/DE69117582D1/de
Publication of DE69117582T2 publication Critical patent/DE69117582T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/925—Fluid growth doping control, e.g. delta doping

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Thin Film Transistor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Vapour Deposition (AREA)
DE69117582T 1990-05-31 1991-04-15 Epitaktische Siliziumschicht und Verfahren zu deren Abscheidung Expired - Lifetime DE69117582T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/531,218 US5316958A (en) 1990-05-31 1990-05-31 Method of dopant enhancement in an epitaxial silicon layer by using germanium

Publications (2)

Publication Number Publication Date
DE69117582D1 true DE69117582D1 (de) 1996-04-11
DE69117582T2 DE69117582T2 (de) 1996-09-12

Family

ID=24116739

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69117582T Expired - Lifetime DE69117582T2 (de) 1990-05-31 1991-04-15 Epitaktische Siliziumschicht und Verfahren zu deren Abscheidung

Country Status (8)

Country Link
US (1) US5316958A (de)
EP (1) EP0459122B1 (de)
JP (1) JPH0744189B2 (de)
AT (1) ATE135139T1 (de)
BR (1) BR9102127A (de)
CA (1) CA2040660C (de)
DE (1) DE69117582T2 (de)
ES (1) ES2084053T3 (de)

Families Citing this family (65)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5607511A (en) * 1992-02-21 1997-03-04 International Business Machines Corporation Method and apparatus for low temperature, low pressure chemical vapor deposition of epitaxial silicon layers
US5177025A (en) * 1992-01-24 1993-01-05 Hewlett-Packard Company Method of fabricating an ultra-thin active region for high speed semiconductor devices
US5489550A (en) * 1994-08-09 1996-02-06 Texas Instruments Incorporated Gas-phase doping method using germanium-containing additive
WO1997023900A1 (en) * 1995-12-21 1997-07-03 Philips Electronics N.V. Method of manufacturing a semiconductor device with a pn junction provided through epitaxy
ATE283549T1 (de) * 1997-06-24 2004-12-15 Massachusetts Inst Technology Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierung
US6723621B1 (en) * 1997-06-30 2004-04-20 International Business Machines Corporation Abrupt delta-like doping in Si and SiGe films by UHV-CVD
US6040225A (en) * 1997-08-29 2000-03-21 The Whitaker Corporation Method of fabricating polysilicon based resistors in Si-Ge heterojunction devices
US6130471A (en) * 1997-08-29 2000-10-10 The Whitaker Corporation Ballasting of high power silicon-germanium heterojunction biploar transistors
US7227176B2 (en) 1998-04-10 2007-06-05 Massachusetts Institute Of Technology Etch stop layer system
WO2000004357A1 (en) * 1998-07-15 2000-01-27 Smithsonian Astrophysical Observatory Epitaxial germanium temperature sensor
US6602613B1 (en) 2000-01-20 2003-08-05 Amberwave Systems Corporation Heterointegration of materials using deposition and bonding
WO2001054175A1 (en) * 2000-01-20 2001-07-26 Amberwave Systems Corporation Low threading dislocation density relaxed mismatched epilayers without high temperature growth
US6555839B2 (en) 2000-05-26 2003-04-29 Amberwave Systems Corporation Buried channel strained silicon FET using a supply layer created through ion implantation
US6573126B2 (en) 2000-08-16 2003-06-03 Massachusetts Institute Of Technology Process for producing semiconductor article using graded epitaxial growth
US6649480B2 (en) 2000-12-04 2003-11-18 Amberwave Systems Corporation Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs
US20020100942A1 (en) * 2000-12-04 2002-08-01 Fitzgerald Eugene A. CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs
US6426265B1 (en) * 2001-01-30 2002-07-30 International Business Machines Corporation Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology
US6703688B1 (en) 2001-03-02 2004-03-09 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6724008B2 (en) 2001-03-02 2004-04-20 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6830976B2 (en) 2001-03-02 2004-12-14 Amberwave Systems Corproation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6723661B2 (en) * 2001-03-02 2004-04-20 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
WO2002082514A1 (en) 2001-04-04 2002-10-17 Massachusetts Institute Of Technology A method for semiconductor device fabrication
US6615615B2 (en) 2001-06-29 2003-09-09 Lightwave Microsystems Corporation GePSG core for a planar lightwave circuit
EP1428262A2 (de) * 2001-09-21 2004-06-16 Amberwave Systems Corporation Halbleiterstrukturen mit verspannten materialschichten und mit definierten verunreinigungsgradienten und diesbezügliche herstellungsverfahren
AU2002341803A1 (en) 2001-09-24 2003-04-07 Amberwave Systems Corporation Rf circuits including transistors having strained material layers
WO2003079415A2 (en) 2002-03-14 2003-09-25 Amberwave Systems Corporation Methods for fabricating strained layers on semiconductor substrates
US6995430B2 (en) * 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US7307273B2 (en) 2002-06-07 2007-12-11 Amberwave Systems Corporation Control of strain in device layers by selective relaxation
US7615829B2 (en) * 2002-06-07 2009-11-10 Amberwave Systems Corporation Elevated source and drain elements for strained-channel heterojuntion field-effect transistors
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US20030227057A1 (en) 2002-06-07 2003-12-11 Lochtefeld Anthony J. Strained-semiconductor-on-insulator device structures
US7335545B2 (en) 2002-06-07 2008-02-26 Amberwave Systems Corporation Control of strain in device layers by prevention of relaxation
US6946371B2 (en) * 2002-06-10 2005-09-20 Amberwave Systems Corporation Methods of fabricating semiconductor structures having epitaxially grown source and drain elements
US6982474B2 (en) 2002-06-25 2006-01-03 Amberwave Systems Corporation Reacted conductive gate electrodes
EP2267762A3 (de) 2002-08-23 2012-08-22 Taiwan Semiconductor Manufacturing Co., Ltd. Halbleiter-Heterostrukturen mit reduzierter Anhäufung von Versetzungen und entsprechende Herstellungsverfahren
US7594967B2 (en) * 2002-08-30 2009-09-29 Amberwave Systems Corporation Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy
US6982214B2 (en) * 2002-10-01 2006-01-03 Applied Materials, Inc. Method of forming a controlled and uniform lightly phosphorous doped silicon film
WO2004068556A2 (en) 2003-01-27 2004-08-12 Amberwave Systems Corporation Semiconductor structures with structural homogeneity
KR100728173B1 (ko) 2003-03-07 2007-06-13 앰버웨이브 시스템즈 코포레이션 쉘로우 트렌치 분리법
WO2004081986A2 (en) * 2003-03-12 2004-09-23 Asm America Inc. Method to planarize and reduce defect density of silicon germanium
WO2004081987A2 (en) * 2003-03-12 2004-09-23 Asm America, Inc. Sige rectification process
JP2006524429A (ja) 2003-03-28 2006-10-26 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ Ｎドープシリコン層のエピタキシャル成長のための方法
JP4954448B2 (ja) * 2003-04-05 2012-06-13 ローム・アンド・ハース・エレクトロニック・マテリアルズ，エル．エル．シー． 有機金属化合物
JP4714422B2 (ja) * 2003-04-05 2011-06-29 ローム・アンド・ハース・エレクトロニック・マテリアルズ，エル．エル．シー． ゲルマニウムを含有するフィルムを堆積させる方法、及び蒸気送達装置
JP4689969B2 (ja) * 2003-04-05 2011-06-01 ローム・アンド・ハース・エレクトロニック・マテリアルズ，エル．エル．シー． Ｉｖａ族およびｖｉａ族化合物の調製
US7393733B2 (en) 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
US20070102729A1 (en) * 2005-11-04 2007-05-10 Enicks Darwin G Method and system for providing a heterojunction bipolar transistor having SiGe extensions
US7439558B2 (en) 2005-11-04 2008-10-21 Atmel Corporation Method and system for controlled oxygen incorporation in compound semiconductor films for device performance enhancement
US7651919B2 (en) * 2005-11-04 2010-01-26 Atmel Corporation Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization
US7300849B2 (en) * 2005-11-04 2007-11-27 Atmel Corporation Bandgap engineered mono-crystalline silicon cap layers for SiGe HBT performance enhancement
US20070154637A1 (en) * 2005-12-19 2007-07-05 Rohm And Haas Electronic Materials Llc Organometallic composition
US7795605B2 (en) * 2007-06-29 2010-09-14 International Business Machines Corporation Phase change material based temperature sensor
US20090267118A1 (en) * 2008-04-29 2009-10-29 International Business Machines Corporation Method for forming carbon silicon alloy (csa) and structures thereof
US8652945B2 (en) 2011-02-08 2014-02-18 Applied Materials, Inc. Epitaxy of high tensile silicon alloy for tensile strain applications
US8994123B2 (en) 2011-08-22 2015-03-31 Gold Standard Simulations Ltd. Variation resistant metal-oxide-semiconductor field effect transistor (MOSFET)
US9053939B2 (en) 2011-11-23 2015-06-09 International Business Machines Corporation Heterojunction bipolar transistor with epitaxial emitter stack to improve vertical scaling
US8728897B2 (en) 2012-01-03 2014-05-20 International Business Machines Corporation Power sige heterojunction bipolar transistor (HBT) with improved drive current by strain compensation
US9373684B2 (en) 2012-03-20 2016-06-21 Semiwise Limited Method of manufacturing variation resistant metal-oxide-semiconductor field effect transistor (MOSFET)
US9190485B2 (en) 2012-07-28 2015-11-17 Gold Standard Simulations Ltd. Fluctuation resistant FDSOI transistor with implanted subchannel
US9263568B2 (en) 2012-07-28 2016-02-16 Semiwise Limited Fluctuation resistant low access resistance fully depleted SOI transistor with improved channel thickness control and reduced access resistance
US9269804B2 (en) 2012-07-28 2016-02-23 Semiwise Limited Gate recessed FDSOI transistor with sandwich of active and etch control layers
US9012276B2 (en) 2013-07-05 2015-04-21 Gold Standard Simulations Ltd. Variation resistant MOSFETs with superior epitaxial properties
CN107430994B (zh) 2015-04-10 2022-02-18 应用材料公司 提高选择性外延生长的生长速率的方法
US11049939B2 (en) 2015-08-03 2021-06-29 Semiwise Limited Reduced local threshold voltage variation MOSFET using multiple layers of epi for improved device operation
US11373696B1 (en) 2021-02-19 2022-06-28 Nif/T, Llc FFT-dram

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4111719A (en) * 1976-12-06 1978-09-05 International Business Machines Corporation Minimization of misfit dislocations in silicon by double implantation of arsenic and germanium
DE2719464A1 (de) * 1977-04-30 1978-12-21 Erich Dr Kasper Verfahren zur herstellung von bipolaren hochfrequenztransistoren
US4133701A (en) * 1977-06-29 1979-01-09 General Motors Corporation Selective enhancement of phosphorus diffusion by implanting halogen ions
US4442449A (en) * 1981-03-16 1984-04-10 Fairchild Camera And Instrument Corp. Binary germanium-silicon interconnect and electrode structure for integrated circuits
US4385938A (en) * 1981-09-10 1983-05-31 The United States Of America As Represented By The Secretary Of The Air Force Dual species ion implantation into GaAs
CA1237824A (en) * 1984-04-17 1988-06-07 Takashi Mimura Resonant tunneling semiconductor device
US4716445A (en) * 1986-01-17 1987-12-29 Nec Corporation Heterojunction bipolar transistor having a base region of germanium
US4717681A (en) * 1986-05-19 1988-01-05 Texas Instruments Incorporated Method of making a heterojunction bipolar transistor with SIPOS
CA1328796C (en) * 1986-09-12 1994-04-26 Bernard Steele Meyerson Method and apparatus for low temperature, low pressure chemical vapor deposition of epitaxial silicon layers
US4695859A (en) * 1986-10-20 1987-09-22 Energy Conversion Devices, Inc. Thin film light emitting diode, photonic circuit employing said diode imager employing said circuits
JPS63137414A (ja) * 1986-11-28 1988-06-09 Nec Corp 半導体薄膜の製造方法
JPS63285923A (ja) * 1987-05-19 1988-11-22 Komatsu Denshi Kinzoku Kk シリコン−ゲルマニウム合金の製造方法
US4870030A (en) * 1987-09-24 1989-09-26 Research Triangle Institute, Inc. Remote plasma enhanced CVD method for growing an epitaxial semiconductor layer
US4891329A (en) * 1988-11-29 1990-01-02 University Of North Carolina Method of forming a nonsilicon semiconductor on insulator structure
US4997776A (en) * 1989-03-06 1991-03-05 International Business Machines Corp. Complementary bipolar transistor structure and method for manufacture

Also Published As

Publication number Publication date
ATE135139T1 (de) 1996-03-15
DE69117582T2 (de) 1996-09-12
JPH0744189B2 (ja) 1995-05-15
JPH04230037A (ja) 1992-08-19
CA2040660C (en) 1996-05-14
ES2084053T3 (es) 1996-05-01
EP0459122A3 (de) 1994-08-03
EP0459122A2 (de) 1991-12-04
CA2040660A1 (en) 1991-12-01
BR9102127A (pt) 1991-12-24
US5316958A (en) 1994-05-31
EP0459122B1 (de) 1996-03-06

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Legal Events

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8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8328 Change in the person/name/address of the agent

Representative=s name: DUSCHER, R., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 7