FR2374817A1 - Arrangement de groupements logiques programmables - Google Patents

Arrangement de groupements logiques programmables

Info

Publication number
FR2374817A1
FR2374817A1 FR7737528A FR7737528A FR2374817A1 FR 2374817 A1 FR2374817 A1 FR 2374817A1 FR 7737528 A FR7737528 A FR 7737528A FR 7737528 A FR7737528 A FR 7737528A FR 2374817 A1 FR2374817 A1 FR 2374817A1
Authority
FR
France
Prior art keywords
rows
arrangement
logic circuit
programmable logic
columns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7737528A
Other languages
English (en)
Other versions
FR2374817B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP14944176A external-priority patent/JPS5373930A/ja
Priority claimed from JP3472677A external-priority patent/JPS53120345A/ja
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Publication of FR2374817A1 publication Critical patent/FR2374817A1/fr
Application granted granted Critical
Publication of FR2374817B1 publication Critical patent/FR2374817B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11801—Masterslice integrated circuits using bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Mathematical Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

L'invention concerne un arrangement de groupements logiques programmables. Selon l'invention, il comprend des cellules 11a, 11d formées sur un substrat semi-conducteur 10, chaque cellule comprenant un certain nombre d'éléments électroniques comme des résistances 22a-22c, 32a-32b et des transistors 21a-21e, 31, nécessaires pour constituer un circuit logique, un certain nombre de lignes de rangées 33a-33b et de lignes de colonnes 34a-34f agencées sous forme d'une matrice, un premier élément de cablage 23a-23h pouvant déterminer le type d'un circuit logique à former, un second élément de cablage 40 pouvant déterminer les conditions d'entrée/sortie du circuit logique, et un groupe d'éléments de commutation 41aa-41ij, 43, entre les cellules, les lignes de rangées et de colonnes et les premier et second éléments de câblage, pour les interconnecter ou les déconnecter. L'invention s'applique aux circuits intégrés logiques à grande échelle.
FR7737528A 1976-12-14 1977-12-13 Arrangement de groupements logiques programmables Granted FR2374817A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP14944176A JPS5373930A (en) 1976-12-14 1976-12-14 Programable logic array master chip
JP3472677A JPS53120345A (en) 1977-03-30 1977-03-30 Master chip of array logic

Publications (2)

Publication Number Publication Date
FR2374817A1 true FR2374817A1 (fr) 1978-07-13
FR2374817B1 FR2374817B1 (fr) 1983-01-21

Family

ID=26373571

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7737528A Granted FR2374817A1 (fr) 1976-12-14 1977-12-13 Arrangement de groupements logiques programmables

Country Status (4)

Country Link
US (1) US4207556A (fr)
DE (1) DE2754354A1 (fr)
FR (1) FR2374817A1 (fr)
GB (1) GB1600623A (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0020116A1 (fr) * 1979-05-24 1980-12-10 Fujitsu Limited Dispositif semiconducteur du type "MASTERSLICE" et procédé de fabrication
EP0023818A2 (fr) * 1979-07-31 1981-02-11 Fujitsu Limited Dispositif semiconducteur à circuit intégré comprenant une plaquette-mère et procédé pour le fabriquer
FR2495834A1 (fr) * 1980-12-05 1982-06-11 Cii Honeywell Bull Dispositif a circuits integres de haute densite
FR2587158A1 (fr) * 1985-09-11 1987-03-13 Pilkington Micro Electronics Circuits et systemes integres a semi-conducteurs

Families Citing this family (62)

* Cited by examiner, † Cited by third party
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JPS558135A (en) * 1978-07-04 1980-01-21 Mamoru Tanaka Rewritable programable logic array
US4314349A (en) * 1979-12-31 1982-02-02 Goodyear Aerospace Corporation Processing element for parallel array processors
US4495590A (en) * 1980-12-31 1985-01-22 International Business Machines Corporation PLA With time division multiplex feature for improved density
JPS57211248A (en) * 1981-06-22 1982-12-25 Hitachi Ltd Semiconductor integrated circuit device
US4458163A (en) * 1981-07-20 1984-07-03 Texas Instruments Incorporated Programmable architecture logic
US4422072A (en) * 1981-07-30 1983-12-20 Signetics Corporation Field programmable logic array circuit
US4414547A (en) * 1981-08-05 1983-11-08 General Instrument Corporation Storage logic array having two conductor data column
US4494017A (en) * 1982-03-29 1985-01-15 International Business Machines Corporation Complementary decode circuit
US4504904A (en) * 1982-06-15 1985-03-12 International Business Machines Corporation Binary logic structure employing programmable logic arrays and useful in microword generation apparatus
US4661922A (en) * 1982-12-08 1987-04-28 American Telephone And Telegraph Company Programmed logic array with two-level control timing
US4525714A (en) * 1982-12-03 1985-06-25 Honeywell Information Systems Inc. Programmable logic array with test capability in the unprogrammed state
US4488230A (en) * 1982-12-08 1984-12-11 At&T Bell Laboratories Programmed logic array with external signals introduced between its AND plane and its OR plane
JPS6091722A (ja) * 1983-10-26 1985-05-23 Hitachi Ltd 半導体集積回路装置
USRE34363E (en) * 1984-03-12 1993-08-31 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
US4609986A (en) * 1984-06-14 1986-09-02 Altera Corporation Programmable logic array device using EPROM technology
US4645953A (en) * 1984-07-03 1987-02-24 Monolithic Memories, Inc. Current source which saves power in programmable logic array circuitry
GB2168840A (en) * 1984-08-22 1986-06-25 Plessey Co Plc Customerisation of integrated logic devices
GB2167621B (en) * 1984-11-27 1988-03-02 Crystalate Electronics Programmed matrix device
US4697241A (en) * 1985-03-01 1987-09-29 Simulog, Inc. Hardware logic simulator
US4814646A (en) * 1985-03-22 1989-03-21 Monolithic Memories, Inc. Programmable logic array using emitter-coupled logic
US5225719A (en) * 1985-03-29 1993-07-06 Advanced Micro Devices, Inc. Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix
US4742252A (en) * 1985-03-29 1988-05-03 Advanced Micro Devices, Inc. Multiple array customizable logic device
US4763020B1 (en) * 1985-09-06 1997-07-08 Ricoh Kk Programmable logic device having plural programmable function cells
JPS62139198A (ja) * 1985-12-11 1987-06-22 Mitsubishi Electric Corp 半導体記憶装置
US4758745B1 (en) * 1986-09-19 1994-11-15 Actel Corp User programmable integrated circuit interconnect architecture and test method
US5451887A (en) * 1986-09-19 1995-09-19 Actel Corporation Programmable logic module and architecture for field programmable gate array device
US5367208A (en) * 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
US5365165A (en) * 1986-09-19 1994-11-15 Actel Corporation Testability architecture and techniques for programmable interconnect architecture
US5341092A (en) * 1986-09-19 1994-08-23 Actel Corporation Testability architecture and techniques for programmable interconnect architecture
US4721868A (en) * 1986-09-23 1988-01-26 Advanced Micro Devices, Inc. IC input circuitry programmable for realizing multiple functions from a single input
USRE34444E (en) * 1988-01-13 1993-11-16 Xilinx, Inc. Programmable logic device
US5023606A (en) * 1988-01-13 1991-06-11 Plus Logic, Inc. Programmable logic device with ganged output pins
US4847612A (en) * 1988-01-13 1989-07-11 Plug Logic, Inc. Programmable logic device
JPH01278041A (ja) * 1988-04-30 1989-11-08 Hitachi Ltd 半導体集積回路装置
US4933576A (en) * 1988-05-13 1990-06-12 Fujitsu Limited Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit
US4937475B1 (en) * 1988-09-19 1994-03-29 Massachusetts Inst Technology Laser programmable integrated circuit
US4910418A (en) * 1988-12-29 1990-03-20 Gazelle Microcircuits, Inc. Semiconductor fuse programmable array structure
US4967107A (en) * 1989-05-12 1990-10-30 Plus Logic, Inc. Programmable logic expander
US5028821A (en) * 1990-03-01 1991-07-02 Plus Logic, Inc. Programmable logic device with programmable inverters at input/output pads
US5322812A (en) * 1991-03-20 1994-06-21 Crosspoint Solutions, Inc. Improved method of fabricating antifuses in an integrated circuit device and resulting structure
US5294846A (en) * 1992-08-17 1994-03-15 Paivinen John O Method and apparatus for programming anti-fuse devices
CA2158467A1 (fr) * 1993-03-17 1994-09-29 Richard D. Freeman Reseaux configurables a memoire vive (ram)
US5457410A (en) * 1993-08-03 1995-10-10 Btr, Inc. Architecture and interconnect scheme for programmable logic circuits
US5742179A (en) * 1994-01-27 1998-04-21 Dyna Logic Corporation High speed programmable logic architecture
US5424655A (en) * 1994-05-20 1995-06-13 Quicklogic Corporation Programmable application specific integrated circuit employing antifuses and methods therefor
US5552720A (en) * 1994-12-01 1996-09-03 Quicklogic Corporation Method for simultaneous programming of multiple antifuses
US5495181A (en) * 1994-12-01 1996-02-27 Quicklogic Corporation Integrated circuit facilitating simultaneous programming of multiple antifuses
US6034547A (en) * 1996-09-04 2000-03-07 Advantage Logic, Inc. Method and apparatus for universal program controlled bus
US6624658B2 (en) * 1999-02-04 2003-09-23 Advantage Logic, Inc. Method and apparatus for universal program controlled bus architecture
JP3420694B2 (ja) * 1996-12-27 2003-06-30 株式会社東芝 スタンダードセル方式の集積回路
US7112994B2 (en) 2002-07-08 2006-09-26 Viciciv Technology Three dimensional integrated circuits
US6992503B2 (en) 2002-07-08 2006-01-31 Viciciv Technology Programmable devices with convertibility to customizable devices
US8643162B2 (en) 2007-11-19 2014-02-04 Raminda Udaya Madurawe Pads and pin-outs in three dimensional integrated circuits
JP2004221231A (ja) * 2003-01-14 2004-08-05 Nec Electronics Corp レイアウトパターン生成のための装置と方法、及びそれを用いた半導体装置の製造方法
US7255437B2 (en) * 2003-10-09 2007-08-14 Howell Thomas A Eyeglasses with activity monitoring
US6897543B1 (en) 2003-08-22 2005-05-24 Altera Corporation Electrically-programmable integrated circuit antifuses
US7030651B2 (en) 2003-12-04 2006-04-18 Viciciv Technology Programmable structured arrays
US7157782B1 (en) 2004-02-17 2007-01-02 Altera Corporation Electrically-programmable transistor antifuses
WO2008112052A1 (fr) * 2007-02-05 2008-09-18 Process Engineering And Manufacturing Épurateur à retournement
US7629812B2 (en) * 2007-08-03 2009-12-08 Dsm Solutions, Inc. Switching circuits and methods for programmable logic devices
US8661394B1 (en) 2008-09-24 2014-02-25 Iowa State University Research Foundation, Inc. Depth-optimal mapping of logic chains in reconfigurable fabrics
US8438522B1 (en) 2008-09-24 2013-05-07 Iowa State University Research Foundation, Inc. Logic element architecture for generic logic chains in programmable devices

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JPS5033754B1 (fr) * 1971-02-24 1975-11-01
JPS5435474B2 (fr) * 1973-03-26 1979-11-02
US3983538A (en) * 1974-05-01 1976-09-28 International Business Machines Corporation Universal LSI array logic modules with integral storage array and variable autonomous sequencing
IT1042852B (it) * 1974-09-30 1980-01-30 Siemens Ag Disposizione di circuiti logici integrata e programmabile

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0020116A1 (fr) * 1979-05-24 1980-12-10 Fujitsu Limited Dispositif semiconducteur du type "MASTERSLICE" et procédé de fabrication
US4500906A (en) * 1979-05-24 1985-02-19 Fujitsu Limited Multilevel masterslice LSI with second metal level programming
EP0023818A2 (fr) * 1979-07-31 1981-02-11 Fujitsu Limited Dispositif semiconducteur à circuit intégré comprenant une plaquette-mère et procédé pour le fabriquer
EP0023818A3 (en) * 1979-07-31 1982-10-20 Fujitsu Limited Semiconductor integrated circuit device including a master slice and method of making the same
FR2495834A1 (fr) * 1980-12-05 1982-06-11 Cii Honeywell Bull Dispositif a circuits integres de haute densite
FR2587158A1 (fr) * 1985-09-11 1987-03-13 Pilkington Micro Electronics Circuits et systemes integres a semi-conducteurs
EP0219221A2 (fr) * 1985-09-11 1987-04-22 Pilkington Micro-Electronics Limited Circuits intégrés à semi-conducteurs
EP0219221A3 (en) * 1985-09-11 1989-01-25 Pilkington Micro-Electronics Limited Semi-conductor integrated circuits/systems
US4935734A (en) * 1985-09-11 1990-06-19 Pilkington Micro-Electronics Limited Semi-conductor integrated circuits/systems

Also Published As

Publication number Publication date
FR2374817B1 (fr) 1983-01-21
GB1600623A (en) 1981-10-21
DE2754354A1 (de) 1978-06-22
US4207556A (en) 1980-06-10

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