Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02367—Substrates
  • H01L21/0237—Materials
  • H01L21/02373—Group 14 semiconducting materials
  • H01L21/02381—Silicon, silicon germanium, germanium
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
  • C23C16/24—Deposition of silicon only
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
  • C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
  • C23C16/48—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
  • C23C16/481—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation by radiant heating of the substrate
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
  • C30B25/02—Epitaxial-layer growth
  • C30B25/08—Reaction chambers; Selection of materials therefor
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
  • C30B25/02—Epitaxial-layer growth
  • C30B25/10—Heating of the reaction chamber or the substrate
  • C30B25/105—Heating of the reaction chamber or the substrate by irradiation or electric discharge
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
  • C30B25/02—Epitaxial-layer growth
  • C30B25/16—Controlling or regulating
  • C30B25/165—Controlling or regulating the flow of the reactive gases
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
  • C30B25/02—Epitaxial-layer growth
  • C30B25/18—Epitaxial-layer growth characterised by the substrate
  • C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
  • C30B29/02—Elements
  • C30B29/06—Silicon
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
  • C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
  • C30B29/68—Crystals with laminate structure, e.g. "superlattices"
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02521—Materials
  • H01L21/02524—Group 14 semiconducting materials
  • H01L21/02532—Silicon, silicon germanium, germanium
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
  • H01L21/02617—Deposition types
  • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
  • H01L21/02617—Deposition types
  • H01L21/02634—Homoepitaxy
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
  • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
  • H01L27/144—Devices controlled by radiation
  • H01L27/146—Imager structures
  • H01L27/14601—Structural or functional details thereof
  • H01L27/14632—Wafer-level processed structures
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
  • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
  • H01L27/144—Devices controlled by radiation
  • H01L27/146—Imager structures
  • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
  • H01L27/14687—Wafer level processing
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
  • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table

Definitions

• the invention relates to an epitaxially coated semiconductor wafer of monocrystalline Siliziunn having a diameter of not less than 300 mm. Furthermore, the invention relates to a method for producing an epitaxially coated semiconductor wafer of monocrystalline silicon having a diameter of not less than 300 mm.
• Epitaxially coated semiconductor wafers made of monocrystalline silicon are required as precursors for the production of electronic components. Because of their superior electrical properties, they are often preferred over polished single crystal silicon wafers. This is true, for example, when it comes to the production of image sensors based on CMOS technology, so-called CMOS image sensors or short CIS components.
• Epitaxially coated single crystal silicon wafers are typically fabricated by gas phase deposition (CVD) of the epitaxial layer on a substrate wafer at temperatures of 1100 ° C to 1250 ° C.
• CVD gas phase deposition
• Substrate wafers of monocrystalline silicon having a diameter of not less than 300 mm are usually coated in an apparatus for coating individual slices.
• the epitaxially coated semiconductor wafer In order to be considered as a precursor for the production of CIS components, the epitaxially coated semiconductor wafer must meet special requirements. The requirements are particularly demanding, what the thickness and the specific resistivity of the epitaxial layer. Both the thickness and the specific electrical resistance, referred to below as resistance, must be as uniform as possible over the radius of the semiconductor wafer. A measure for the description of the non-uniformity is the quotient of the difference of the largest and smallest thickness (highest and lowest resistance) and the sum of the largest and smallest thickness (highest and lowest resistance) multiplied by the factor 100%.
• US 2010/0213168 A1 describes various measures for improving the uniformity of the thickness of an epitaxial layer of monocrystalline silicon.
• US 201 1/01 14017 A1 describes a process for producing an epitaxially coated semiconductor wafer of monocrystalline silicon, wherein an epitaxial layer is deposited, and the unevenness of the resistance is 4% or less.
• Temperature differences occur especially in the edge region as radial and axial temperature gradients in appearance, ie as directed to the edge of the substrate wafer temperature drop and as a temperature difference between the there colder substrate wafer and the warmer there susceptor.
• the inventors of the present invention have taken on the task to further reduce the unevenness of the thickness of the epitaxial layer and the unevenness of the resistance of the epitaxial layer, without the
• Semiconductor wafer is prone to form glides.
• the object of the invention is achieved by a semiconductor wafer
• monocrystalline silicon having a diameter of not less than 300 mm, comprising a substrate wafer of monocrystalline silicon and one on the
• Dopant containing an unevenness of the thickness of the epitaxial layer not more than 0.5% and a non-uniformity of the resistivity of the epitaxial layer is not more than 2%. Thickness and resistance of the epitaxial layer of the semiconductor wafer are therefore particularly uniform.
• the thickness of the epitaxial layer is preferably 1 to 20 ⁇ .
• the substrate wafer preferably also contains a dopant and may additionally be additionally doped with carbon or with nitrogen.
• Semiconductor wafer is preferably a pp + -slice or nn ⁇ slice.
• the semiconductor wafer has in an edge region with a distance of up to 15 mm to the edge of the semiconductor wafer with an edge exclusion of 0.5 mm SIRD Voltages causing a degree of depolarization of preferably not more than 30 depolarization units.
• the object is achieved by a method for producing a coated semiconductor wafer of monocrystalline silicon, comprising
• the apparatus having an upper lid with an annular portion passing through the annular portion
• Radiation source which is arranged above the upper lid of the device
• process gas contains hydrogen, inert gas, and a deposition gas
• deposition gas contains dopant and a silicon source
• the method includes measures which influence the deposition of the epitaxial layer in the problematic edge region in such a way that the influence remains largely localized. This ensures that the resistance in this area increases and the temperature field is adjusted, while avoiding the formation of temperature gradients, which lead to slip.
• the process gas contains not only hydrogen but also inert gas.
• inert gas argon is suitable as the inert gas.
• another noble gas or any mixture of two or more noble gases as an inert gas
• the substrate wafer is passed over a volume ratio of not less than 6 and not more than 20.
• inert gas surprisingly causes an increase in the resistance in the problematic edge region and a certain improvement with a view to equalizing the thickness of the epitaxial layer.
• the thickness of the epitaxial layer in the problematic edge region of the Target substrate selectively improved by the substrate wafer is coated in a device for coating individual slices, the upper lid is structured in a special way. It has an annular region that, in contrast to adjacent regions, bundles transmitted radiation.
• the cross section through the annular region of the upper lid is preferably curved convexly upward or has the contour of a Fresnel lens.
• the collimated radiation impinges in the problematic edge region of the substrate wafer, as a result of which the temperature is selectively increased there.
• the local increase in temperature in the problematic edge region of the substrate disc compensates for the heat loss that occurs there due to heat radiation and leads to
• the thickness of the epitaxial layer in the edge region of the substrate wafer is matched to the thickness of the epitaxial layer in further inner regions of the substrate wafer.
• Fig. 2 shows the influence of argon in the process gas on the equalization of the resistance of the epitaxial layer.
• Fig. 3 shows the cross-section of a device which is suitable for coating individual slices by means of CVD.
• Fig. 4 shows schematically the operation of an upper lid with an annular area which bundles passing radiation.
• Fig. 5 shows the geometric relationship between the position of the annular portion of the upper lid and the peripheral portion of the substrate wafer, in which Radiation is bundled as it passes through the annular portion of the lid.
• FIG. 6 and FIG. 7 show images of SIRD measurements on a semiconductor wafer produced according to the invention (FIG. 6) and on a semiconductor wafer (FIG. 7) which was not produced in accordance with the invention.
• FIG. 8 shows, over the radius R, the profile of the deviation Vth of the layer thickness from a target value in the case of a semiconductor wafer produced according to the invention
• FIG. 9 shows over the radius R the profile of the deviation V r of the resistance of a target value of a semiconductor wafer produced according to the invention
• the epitaxial layer is more uniform in the case of Fig. 1 b than in the case of Fig. 1 a. This difference is attributable to the fact that the process gas additionally contained argon during deposition of the epitaxial layer (FIG. 1 b), or contained no argon (FIG. 1 a).
• Argon was fed at a rate of 3 slm. The proportion of hydrogen was 50 slm in both cases.
• the deposition gas was the same in both cases, as was the deposition temperature, namely 1 1 15 ° C.
• Fig. 2 shows the influence of argon in the process gas on the equalization of the resistance of the epitaxial layer. Shown are two curves showing the course of the resistance p over the diameter d of the semiconductor wafer. The more uniform resistance curve (quadratic data point curve) is due to the fact that the process gas additionally contained argon during the deposition of the epitaxial layer and not in the comparative case (curve with diamond-shaped data points). Argon was fed at a rate of 3 slm. The proportion of hydrogen was 60 slm in both cases.
• the apparatus shown in Fig. 3 comprises a reactor chamber consisting of an upper lid (spine) 1, a lower spout 2 and a
• Radiation sources 6 is emitted.
• the epitaxial layer is deposited from the gas phase on the upper side of the substrate wafer 4 by passing process gas over the heat radiation heated substrate wafer.
• the process gas is supplied through a gas inlet in the side wall 3 and after the
• the device shown represents an embodiment which has a further gas inlet and a further gas outlet, for example, to be able to feed and discharge a purge gas into the volume of the reactor chamber present under the substrate disk.
• the further gas inlet and the further gas outlet carry but nothing to solve the problem at hand.
• the upper cover 1 has an annular region 7 (FIG. 4), which bundles transmitted radiation.
• the thickness of the upper lid 1 is thicker in the annular area 7 than in the adjacent areas.
• the cross section through the annular region of the upper lid is preferably curved convexly upward or has the contour of a Fresnel lens.
• the annular region 7 acts like a converging lens, which focuses the radiation.
• the collimated radiation impinges in the edge region of the substrate wafer, which preferably has a distance of up to 15 mm from the edge of the substrate wafer 4.
• the incident radiation raises in the
• Edge region to a radial temperature drop so that there is an intended amount of material 10 is deposited and the thickness of the epitaxial layer 9 reaches a predetermined value.
• Edge region of the substrate disc correlate according to the rules of the beam optics, as shown in Figure 5 is sketched.
• the length ro denotes the distance of the annular portion 7 of the upper lid 1 to the vertical through the center of the upper
• the length ro can be approximately calculated with predetermined heights b and h, predetermined length a and predetermined angle ⁇ , wherein the height b is the distance of the
• Substrate wafers made of monocrystalline silicon having a diameter of 300 mm were coated with a silicon epitaxial layer in a single-wafer device as shown in FIG. 3 after being cut, ground, etched and polished by a single crystal.
• the device When using the method according to the invention, the device had an upper lid with an annular area which bundled radiation transmitted through in an edge region of the substrate wafer.
• the upper lid When using the deviant method, the upper lid lacks this structure.
• the process gas consisted of hydrogen (70 slm), argon (5 slm) and deposition gas (Tnchlorsilan (6 slm), diborane (50 ppm in hydrogen (180 sccm)) diluted in 4 l of hydrogen), and the epitaxial Layer was deposited at a temperature of 1130 ° C.
• the process gas consisted only of hydrogen (55 slm) and deposition gas (10 slm), diborane (50 ppm in hydrogen (180 sccm) diluted in 4 liters of hydrogen), and the epitaxial layer became at a temperature of 1 125 ° C deposited.
• FIG. 6 shows the recording of an SIRD measurement on a device according to the invention
• the degree of depolarization remained within the preferred range. In none of the measuring cells was the degree of depolarization greater than 30 DU. In the case of the semiconductor wafer prepared by the deviated method, 0.907% of the cells were conspicuous due to a degree of depolarization of more than 30 DU (Fig.7).
• the SIRD measurement was carried out with a SIRD-AB300 instrument from PVA TePla AG
• a depolarization unit DU corresponds to a degree of depolarization of 1.times.10.sup.- 6 .
• the rolled out circumferential area of the semiconductor wafer is shown at a distance of 4.5 mm and less to the edge of the semiconductor wafer
• Peripheral area with a distance of 15 mm to 4.5 mm to the edge of the
• FIG. 8 shows, over the radius R, the profile of the deviation Vth of the layer thickness from a target value in the case of a semiconductor wafer produced according to the invention
• FIG. 9 shows over the radius R the profile of the deviation V r of the resistance from a target value in the case of a semiconductor wafer produced according to the invention

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• 2017
  • 2017-07-26 DE DE102017212799.6A patent/DE102017212799A1/de active Pending
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