EP3659173A1 - Epitaxially coated semiconductor wafer of monocrystalline silicon and method for the production thereof - Google Patents

Epitaxially coated semiconductor wafer of monocrystalline silicon and method for the production thereof

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Publication number
EP3659173A1
EP3659173A1 EP18740798.6A EP18740798A EP3659173A1 EP 3659173 A1 EP3659173 A1 EP 3659173A1 EP 18740798 A EP18740798 A EP 18740798A EP 3659173 A1 EP3659173 A1 EP 3659173A1
Authority
EP
European Patent Office
Prior art keywords
epitaxial layer
substrate wafer
semiconductor wafer
wafer
monocrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP18740798.6A
Other languages
German (de)
French (fr)
Inventor
Reinhard Schauer
Jörg HABERECHT
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siltronic AG
Original Assignee
Siltronic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siltronic AG filed Critical Siltronic AG
Publication of EP3659173A1 publication Critical patent/EP3659173A1/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/48—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
    • C23C16/481—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation by radiant heating of the substrate
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/08—Reaction chambers; Selection of materials therefor
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/10—Heating of the reaction chamber or the substrate
    • C30B25/105—Heating of the reaction chamber or the substrate by irradiation or electric discharge
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/16—Controlling or regulating
    • C30B25/165—Controlling or regulating the flow of the reactive gases
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
    • C30B29/68—Crystals with laminate structure, e.g. "superlattices"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02634—Homoepitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14632—Wafer-level processed structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687—Wafer level processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table

Definitions

  • the invention relates to an epitaxially coated semiconductor wafer of monocrystalline Siliziunn having a diameter of not less than 300 mm. Furthermore, the invention relates to a method for producing an epitaxially coated semiconductor wafer of monocrystalline silicon having a diameter of not less than 300 mm.
  • Epitaxially coated semiconductor wafers made of monocrystalline silicon are required as precursors for the production of electronic components. Because of their superior electrical properties, they are often preferred over polished single crystal silicon wafers. This is true, for example, when it comes to the production of image sensors based on CMOS technology, so-called CMOS image sensors or short CIS components.
  • Epitaxially coated single crystal silicon wafers are typically fabricated by gas phase deposition (CVD) of the epitaxial layer on a substrate wafer at temperatures of 1100 ° C to 1250 ° C.
  • CVD gas phase deposition
  • Substrate wafers of monocrystalline silicon having a diameter of not less than 300 mm are usually coated in an apparatus for coating individual slices.
  • the epitaxially coated semiconductor wafer In order to be considered as a precursor for the production of CIS components, the epitaxially coated semiconductor wafer must meet special requirements. The requirements are particularly demanding, what the thickness and the specific resistivity of the epitaxial layer. Both the thickness and the specific electrical resistance, referred to below as resistance, must be as uniform as possible over the radius of the semiconductor wafer. A measure for the description of the non-uniformity is the quotient of the difference of the largest and smallest thickness (highest and lowest resistance) and the sum of the largest and smallest thickness (highest and lowest resistance) multiplied by the factor 100%.
  • US 2010/0213168 A1 describes various measures for improving the uniformity of the thickness of an epitaxial layer of monocrystalline silicon.
  • US 201 1/01 14017 A1 describes a process for producing an epitaxially coated semiconductor wafer of monocrystalline silicon, wherein an epitaxial layer is deposited, and the unevenness of the resistance is 4% or less.
  • Temperature differences occur especially in the edge region as radial and axial temperature gradients in appearance, ie as directed to the edge of the substrate wafer temperature drop and as a temperature difference between the there colder substrate wafer and the warmer there susceptor.
  • the inventors of the present invention have taken on the task to further reduce the unevenness of the thickness of the epitaxial layer and the unevenness of the resistance of the epitaxial layer, without the
  • Semiconductor wafer is prone to form glides.
  • the object of the invention is achieved by a semiconductor wafer
  • monocrystalline silicon having a diameter of not less than 300 mm, comprising a substrate wafer of monocrystalline silicon and one on the
  • Dopant containing an unevenness of the thickness of the epitaxial layer not more than 0.5% and a non-uniformity of the resistivity of the epitaxial layer is not more than 2%. Thickness and resistance of the epitaxial layer of the semiconductor wafer are therefore particularly uniform.
  • the thickness of the epitaxial layer is preferably 1 to 20 ⁇ .
  • the substrate wafer preferably also contains a dopant and may additionally be additionally doped with carbon or with nitrogen.
  • Semiconductor wafer is preferably a pp + -slice or nn ⁇ slice.
  • the semiconductor wafer has in an edge region with a distance of up to 15 mm to the edge of the semiconductor wafer with an edge exclusion of 0.5 mm SIRD Voltages causing a degree of depolarization of preferably not more than 30 depolarization units.
  • the object is achieved by a method for producing a coated semiconductor wafer of monocrystalline silicon, comprising
  • the apparatus having an upper lid with an annular portion passing through the annular portion
  • Radiation source which is arranged above the upper lid of the device
  • process gas contains hydrogen, inert gas, and a deposition gas
  • deposition gas contains dopant and a silicon source
  • the method includes measures which influence the deposition of the epitaxial layer in the problematic edge region in such a way that the influence remains largely localized. This ensures that the resistance in this area increases and the temperature field is adjusted, while avoiding the formation of temperature gradients, which lead to slip.
  • the process gas contains not only hydrogen but also inert gas.
  • inert gas argon is suitable as the inert gas.
  • another noble gas or any mixture of two or more noble gases as an inert gas
  • the substrate wafer is passed over a volume ratio of not less than 6 and not more than 20.
  • inert gas surprisingly causes an increase in the resistance in the problematic edge region and a certain improvement with a view to equalizing the thickness of the epitaxial layer.
  • the thickness of the epitaxial layer in the problematic edge region of the Target substrate selectively improved by the substrate wafer is coated in a device for coating individual slices, the upper lid is structured in a special way. It has an annular region that, in contrast to adjacent regions, bundles transmitted radiation.
  • the cross section through the annular region of the upper lid is preferably curved convexly upward or has the contour of a Fresnel lens.
  • the collimated radiation impinges in the problematic edge region of the substrate wafer, as a result of which the temperature is selectively increased there.
  • the local increase in temperature in the problematic edge region of the substrate disc compensates for the heat loss that occurs there due to heat radiation and leads to
  • the thickness of the epitaxial layer in the edge region of the substrate wafer is matched to the thickness of the epitaxial layer in further inner regions of the substrate wafer.
  • Fig. 2 shows the influence of argon in the process gas on the equalization of the resistance of the epitaxial layer.
  • Fig. 3 shows the cross-section of a device which is suitable for coating individual slices by means of CVD.
  • Fig. 4 shows schematically the operation of an upper lid with an annular area which bundles passing radiation.
  • Fig. 5 shows the geometric relationship between the position of the annular portion of the upper lid and the peripheral portion of the substrate wafer, in which Radiation is bundled as it passes through the annular portion of the lid.
  • FIG. 6 and FIG. 7 show images of SIRD measurements on a semiconductor wafer produced according to the invention (FIG. 6) and on a semiconductor wafer (FIG. 7) which was not produced in accordance with the invention.
  • FIG. 8 shows, over the radius R, the profile of the deviation Vth of the layer thickness from a target value in the case of a semiconductor wafer produced according to the invention
  • FIG. 9 shows over the radius R the profile of the deviation V r of the resistance of a target value of a semiconductor wafer produced according to the invention
  • the epitaxial layer is more uniform in the case of Fig. 1 b than in the case of Fig. 1 a. This difference is attributable to the fact that the process gas additionally contained argon during deposition of the epitaxial layer (FIG. 1 b), or contained no argon (FIG. 1 a).
  • Argon was fed at a rate of 3 slm. The proportion of hydrogen was 50 slm in both cases.
  • the deposition gas was the same in both cases, as was the deposition temperature, namely 1 1 15 ° C.
  • Fig. 2 shows the influence of argon in the process gas on the equalization of the resistance of the epitaxial layer. Shown are two curves showing the course of the resistance p over the diameter d of the semiconductor wafer. The more uniform resistance curve (quadratic data point curve) is due to the fact that the process gas additionally contained argon during the deposition of the epitaxial layer and not in the comparative case (curve with diamond-shaped data points). Argon was fed at a rate of 3 slm. The proportion of hydrogen was 60 slm in both cases.
  • the apparatus shown in Fig. 3 comprises a reactor chamber consisting of an upper lid (spine) 1, a lower spout 2 and a
  • Radiation sources 6 is emitted.
  • the epitaxial layer is deposited from the gas phase on the upper side of the substrate wafer 4 by passing process gas over the heat radiation heated substrate wafer.
  • the process gas is supplied through a gas inlet in the side wall 3 and after the
  • the device shown represents an embodiment which has a further gas inlet and a further gas outlet, for example, to be able to feed and discharge a purge gas into the volume of the reactor chamber present under the substrate disk.
  • the further gas inlet and the further gas outlet carry but nothing to solve the problem at hand.
  • the upper cover 1 has an annular region 7 (FIG. 4), which bundles transmitted radiation.
  • the thickness of the upper lid 1 is thicker in the annular area 7 than in the adjacent areas.
  • the cross section through the annular region of the upper lid is preferably curved convexly upward or has the contour of a Fresnel lens.
  • the annular region 7 acts like a converging lens, which focuses the radiation.
  • the collimated radiation impinges in the edge region of the substrate wafer, which preferably has a distance of up to 15 mm from the edge of the substrate wafer 4.
  • the incident radiation raises in the
  • Edge region to a radial temperature drop so that there is an intended amount of material 10 is deposited and the thickness of the epitaxial layer 9 reaches a predetermined value.
  • Edge region of the substrate disc correlate according to the rules of the beam optics, as shown in Figure 5 is sketched.
  • the length ro denotes the distance of the annular portion 7 of the upper lid 1 to the vertical through the center of the upper
  • the length ro can be approximately calculated with predetermined heights b and h, predetermined length a and predetermined angle ⁇ , wherein the height b is the distance of the
  • Substrate wafers made of monocrystalline silicon having a diameter of 300 mm were coated with a silicon epitaxial layer in a single-wafer device as shown in FIG. 3 after being cut, ground, etched and polished by a single crystal.
  • the device When using the method according to the invention, the device had an upper lid with an annular area which bundled radiation transmitted through in an edge region of the substrate wafer.
  • the upper lid When using the deviant method, the upper lid lacks this structure.
  • the process gas consisted of hydrogen (70 slm), argon (5 slm) and deposition gas (Tnchlorsilan (6 slm), diborane (50 ppm in hydrogen (180 sccm)) diluted in 4 l of hydrogen), and the epitaxial Layer was deposited at a temperature of 1130 ° C.
  • the process gas consisted only of hydrogen (55 slm) and deposition gas (10 slm), diborane (50 ppm in hydrogen (180 sccm) diluted in 4 liters of hydrogen), and the epitaxial layer became at a temperature of 1 125 ° C deposited.
  • FIG. 6 shows the recording of an SIRD measurement on a device according to the invention
  • the degree of depolarization remained within the preferred range. In none of the measuring cells was the degree of depolarization greater than 30 DU. In the case of the semiconductor wafer prepared by the deviated method, 0.907% of the cells were conspicuous due to a degree of depolarization of more than 30 DU (Fig.7).
  • the SIRD measurement was carried out with a SIRD-AB300 instrument from PVA TePla AG
  • a depolarization unit DU corresponds to a degree of depolarization of 1.times.10.sup.- 6 .
  • the rolled out circumferential area of the semiconductor wafer is shown at a distance of 4.5 mm and less to the edge of the semiconductor wafer
  • Peripheral area with a distance of 15 mm to 4.5 mm to the edge of the
  • FIG. 8 shows, over the radius R, the profile of the deviation Vth of the layer thickness from a target value in the case of a semiconductor wafer produced according to the invention
  • FIG. 9 shows over the radius R the profile of the deviation V r of the resistance from a target value in the case of a semiconductor wafer produced according to the invention

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Abstract

Semiconductor wafer of monocrystalline silicon with a diameter of not less than 300 mm and method for producing a coated semiconductor wafer of monocrystalline silicon. The semiconductor wafer comprises a substrate wafer of monocrystalline silicon and an epitaxial layer of monocrystalline silicon that contains a dopant lying on the substrate wafer, wherein an unevenness of the thickness of the epitaxial layer is no more than 0.5% and an unevenness of the resistivity of the epitaxial layer is no more than 2%.

Description

Epitaktisch beschichtete Halbleiterscheibe aus einkristallinem Silizium und  Epitaxially coated semiconductor wafer of monocrystalline silicon and
Verfahren zu deren Herstellung  Process for their preparation
Gegenstand der Erfindung ist eine epitaktisch beschichtete Halbleiterscheibe aus einkristallinem Siliziunn mit einem Durchmesser von nicht weniger als 300 mm. Des Weiteren betrifft die Erfindung ein Verfahren zur Herstellung einer epitaktisch beschichteten Halbleiterscheibe aus einkristallinem Silizium mit einem Durchmesser von nicht weniger als 300 mm. The invention relates to an epitaxially coated semiconductor wafer of monocrystalline Siliziunn having a diameter of not less than 300 mm. Furthermore, the invention relates to a method for producing an epitaxially coated semiconductor wafer of monocrystalline silicon having a diameter of not less than 300 mm.
Stand der Technik / Probleme State of the art / problems
Epitaktisch beschichtete Halbleiterscheiben aus einkristallinem Silizium werden als Vorprodukte zur Herstellung von elektronischen Bauelementen benötigt. Wegen überlegener elektrischer Eigenschaften werden sie häufig polierten Halbleiterscheiben aus einkristallinem Silizium vorgezogen. Das trifft beispielsweise zu, wenn es um die Herstellung von Bildsensoren geht, die auf CMOS-Technik beruhen, sogenannte CMOS image sensors oder kurz CIS-Bauelemente.  Epitaxially coated semiconductor wafers made of monocrystalline silicon are required as precursors for the production of electronic components. Because of their superior electrical properties, they are often preferred over polished single crystal silicon wafers. This is true, for example, when it comes to the production of image sensors based on CMOS technology, so-called CMOS image sensors or short CIS components.
Epitaktisch beschichtete Halbleiterscheiben aus einkristallinem Silizium werden üblicherweise durch Gasphasenabscheidung (CVD) der epitaktischen Schicht auf einer Substratscheibe bei Temperaturen von 1 100 °C bis 1250 °C hergestellt. Epitaxially coated single crystal silicon wafers are typically fabricated by gas phase deposition (CVD) of the epitaxial layer on a substrate wafer at temperatures of 1100 ° C to 1250 ° C.
Substratscheiben aus einkristallinem Silizium mit einem Durchmesser von nicht weniger als 300 mm werden üblicherweise in einer Vorrichtung zum Beschichten einzelner Scheiben beschichtet. Substrate wafers of monocrystalline silicon having a diameter of not less than 300 mm are usually coated in an apparatus for coating individual slices.
In US 2010/006261 1 A1 ist ein Verfahren zum Dünnen der Rückseite einer In US 2010/006261 1 A1 is a method for thinning the back of a
Halbleiterscheibe beschrieben, das im Zuge der Herstellung von Bildsensoren, die auf der Rückseite beleuchtet werden (backside-illuminated image sensors), eingesetzt werden kann. Semiconductor wafer described in the course of the production of image sensors that are illuminated on the backside (backside-illuminated image sensors), can be used.
Um als Vorprodukt zur Herstellung von CIS-Bauelementen in Frage zu kommen, muss die epitaktisch beschichtete Halbleiterscheibe besonderen Anforderungen genügen. Die Anforderungen sind besonders anspruchsvoll, was die Dicke und den spezifischen elektrischen Widerstand (resistivity) der epitaktischen Schicht betrifft. Sowohl die Dicke als auch der spezifische elektrische Widerstand, nachfolgend Widerstand genannt, müssen über den Radius der Halbleiterscheibe möglichst gleichmäßig sein. Ein Maß zur Beschreibung der Ungleichmaßigkeit ist der Quotient der Differenz von größter und kleinster Dicke (größtem und kleinstem Widerstand) und der Summe von größter und kleinster Dicke (größtem und kleinstem Widerstand) multipliziert mit dem Faktor 100 %. In order to be considered as a precursor for the production of CIS components, the epitaxially coated semiconductor wafer must meet special requirements. The requirements are particularly demanding, what the thickness and the specific resistivity of the epitaxial layer. Both the thickness and the specific electrical resistance, referred to below as resistance, must be as uniform as possible over the radius of the semiconductor wafer. A measure for the description of the non-uniformity is the quotient of the difference of the largest and smallest thickness (highest and lowest resistance) and the sum of the largest and smallest thickness (highest and lowest resistance) multiplied by the factor 100%.
In US 2010/0213168 A1 sind verschiedene Maßnahmen zur Verbesserung der Gleichmäßigkeit der Dicke einer epitaktischen Schicht aus einkristallinem Silizium beschrieben. US 2010/0213168 A1 describes various measures for improving the uniformity of the thickness of an epitaxial layer of monocrystalline silicon.
In US 201 1/01 14017 A1 wird ein Verfahren zur Herstellung einer epitaktisch beschichteten Halbleiterscheibe aus einkristallinem Silizium beschrieben, wobei eine epitaktische Schicht abgeschieden wird, und die Ungleichmäßigkeit des Widerstands 4 % oder weniger ist. US 201 1/01 14017 A1 describes a process for producing an epitaxially coated semiconductor wafer of monocrystalline silicon, wherein an epitaxial layer is deposited, and the unevenness of the resistance is 4% or less.
Ungeachtet solcher Lehren besteht weiterhin ein Bedarf an der Verbesserung der Gleichmäßigkeit von Schichtdicke und Widerstand, insbesondere deshalb, weil es bisher an einer zufriedenstellenden Lösung mangelt, die Schichtdicke und den Widerstand in einem problematischen Randbereich, der einen Abstand bis 15 mm zum Rand der Halbleiterscheibe hat, an die Schichtdicke und den Widerstand von Bereichen mit größerem Abstand zum Rand anzugleichen. Im problematischen Randbereich nimmt die Temperatur der Substratscheibe zum Rand hin ab, weil die Substratscheibe in Randnähe Wärme durch Wärmeabstrahlung verliert. Werden keine Gegenmaßnahmen unternommen, wird die Schichtdicke einer epitaktischen Schicht, die mit einem Dotierstoff vom p-Typ dotiert ist, in diesem Bereich kleiner und der Widerstand größer. Ist der Dotierstoff vom n-Typ, wird der Widerstand kleiner. Notwithstanding such teachings, there continues to be a need to improve the uniformity of film thickness and resistance, particularly because of the lack of a satisfactory solution, the film thickness, and the resistance in a problematic edge region spaced 15 mm from the edge of the wafer , to match the layer thickness and the resistance of areas with greater distance to the edge. In the problematic edge region, the temperature of the substrate disk decreases towards the edge, because the substrate disk loses heat due to heat radiation near the edge. If no countermeasures are taken, the layer thickness of an epitaxial layer doped with a p-type dopant becomes smaller in this range and the resistance becomes larger. If the dopant is n-type, the resistance becomes smaller.
Bekannte Gegenmaßnahmen, wie der Versuch der Einflussnahme auf das Known countermeasures, such as the attempt to influence the
Temperaturfeld, gehen bisher zu Lasten der Gleichmäßigkeit der Dicke der epitaktischen Schicht in Bereichen außerhalb des problematischen Randbereichs und/oder erhöhen die Anfälligkeit der Halbleiterscheibe hinsichtlich des Entstehens von Gleitungen (slip). Gleitungen entstehen insbesondere, wenn Spannungen relaxieren, die durch Temperaturunterschiede hervorgerufen wurden. Solche Temperature field, so far are at the expense of the uniformity of the thickness of the epitaxial layer in areas outside the problematic edge region and / or increase the susceptibility of the semiconductor wafer with regard to the emergence of slip. Glides occur especially when tension Relax, which were caused by temperature differences. Such
Temperaturunterschiede treten vor allem im Randbereich als radiale und axiale Temperaturgradienten in Erscheinung, also als zum Rand der Substratscheibe gerichteter Temperaturabfall und als Temperaturunterschied zwischen der dort kälteren Substratscheibe und dem dort wärmeren Suszeptor. Temperature differences occur especially in the edge region as radial and axial temperature gradients in appearance, ie as directed to the edge of the substrate wafer temperature drop and as a temperature difference between the there colder substrate wafer and the warmer there susceptor.
Spannungen im Kristallgitter können mittels SIRD (scanning infrared depolarization) gemessen werden. US 2012/0007978 A1 enthält eine Beschreibung, wie SIRD- Spannungen gemessen und in Depolarisationseinheiten DU ausgedrückt werden können, sowie einen Verweis auf ein geeignetes Messinstrument. Strains in the crystal lattice can be measured by means of SIRD (scanning infrared depolarization). US 2012/0007978 A1 contains a description of how SIRD voltages can be measured and expressed in depolarization units DU and a reference to a suitable measuring instrument.
Die Erfinder der vorliegenden Erfindung haben es sich zur Aufgabe gemacht, die Ungleichmäßigkeit der Dicke der epitaktischen Schicht und die Ungleichmäßigkeit des Widerstands der epitaktischen Schicht weiter zu verringern, ohne dass die The inventors of the present invention have taken on the task to further reduce the unevenness of the thickness of the epitaxial layer and the unevenness of the resistance of the epitaxial layer, without the
Halbleiterscheibe anfälliger wird, Gleitungen auszubilden. Semiconductor wafer is prone to form glides.
Die Aufgabe der Erfindung wird gelöst durch eine Halbleiterscheibe aus The object of the invention is achieved by a semiconductor wafer
einkristallinem Silizium mit einem Durchmesser von nicht weniger als 300 mm, umfassend eine Substratscheibe aus einkristallinem Silizium und eine auf der monocrystalline silicon having a diameter of not less than 300 mm, comprising a substrate wafer of monocrystalline silicon and one on the
Substratscheibe liegende epitaktische Schicht aus einkristallinem Silizium, die Substrate wafer lying epitaxial layer of single crystal silicon, the
Dotierstoff enthält, wobei eine Ungleichmäßigkeit der Dicke der epitaktischen Schicht nicht mehr als 0,5 % und eine Ungleichmäßigkeit des spezifischen elektrischen Widerstands der epitaktischen Schicht nicht mehr als 2 % beträgt. Dicke und Widerstand der epitaktischen Schicht der Halbleiterscheibe sind demnach besonders gleichmäßig. Die Dicke der epitaktischen Schicht beträgt vorzugsweise 1 bis 20 μιτι. Die Substratscheibe enthält vorzugsweise auch einen Dotierstoff und kann darüber hinaus mit Kohlenstoff oder mit Stickstoff zusätzlich dotiert sein. Die  Dopant containing an unevenness of the thickness of the epitaxial layer not more than 0.5% and a non-uniformity of the resistivity of the epitaxial layer is not more than 2%. Thickness and resistance of the epitaxial layer of the semiconductor wafer are therefore particularly uniform. The thickness of the epitaxial layer is preferably 1 to 20 μιτι. The substrate wafer preferably also contains a dopant and may additionally be additionally doped with carbon or with nitrogen. The
Halbleiterscheibe ist vorzugsweise eine pp+-Scheibe oder eine nn~-Scheibe. Semiconductor wafer is preferably a pp + -slice or nn ~ slice.
Die Halbleiterscheibe hat in einem Randbereich mit einem Abstand bis 15 mm zum Rand der Halbleiterscheibe bei einem Randausschluss von 0,5 mm SIRD- Spannungen, die einen Grad an Depolarisation von vorzugsweise nicht mehr als 30 Depolarisationseinheiten hervorrufen . The semiconductor wafer has in an edge region with a distance of up to 15 mm to the edge of the semiconductor wafer with an edge exclusion of 0.5 mm SIRD Voltages causing a degree of depolarization of preferably not more than 30 depolarization units.
Des Weiteren wird die Aufgabe gelöst durch ein Verfahren zur Herstellung einer beschichteten Halbleiterscheibe aus einkristallinem Silizium, umfassend Furthermore, the object is achieved by a method for producing a coated semiconductor wafer of monocrystalline silicon, comprising
das Bereitstellen einer Substratscheibe aus einkristallinem Silizium mit einem providing a substrate wafer of monocrystalline silicon with a
Durchmesser von nicht weniger als 300 mm; Diameter of not less than 300 mm;
das Ablegen der Substratscheibe auf einem Suszeptor einer Vorrichtung zum depositing the substrate wafer on a susceptor of a device for
Beschichten einzelner Scheiben, wobei die Vorrichtung einen oberen Deckel mit einem ringförmigen Bereich aufweist, der durch den ringförmigen Bereich  Coating individual slices, the apparatus having an upper lid with an annular portion passing through the annular portion
durchgestrahlte Strahlung in einem Randbereich der Substratscheibe bündelt; irradiated radiation bundles in an edge region of the substrate wafer;
das Erhitzen der Substratscheibe auf eine Abscheidetemperatur durch eine heating the substrate wafer to a deposition temperature by a
Strahlungsquelle, die über dem oberen Deckel der Vorrichtung angeordnet ist;  Radiation source, which is arranged above the upper lid of the device;
das Abscheiden einer epitaktischen Schicht aus Silizium durch Leiten von Prozessgas über die erhitze Substratscheibe, wobei das Prozessgas Wasserstoff, Inertgas und ein Abscheidegas enthält, und das Abscheidegas Dotierstoff und eine Siliziumquelle enthält. depositing an epitaxial layer of silicon by passing process gas over the heated substrate wafer, wherein the process gas contains hydrogen, inert gas, and a deposition gas, and the deposition gas contains dopant and a silicon source.
Das Verfahren beinhaltet Maßnahmen, welche das Abscheiden der epitaktischen Schicht im problematischen Randbereich so beeinflussen, dass der Einfluss weitgehend lokal begrenzt bleibt. So wird dafür gesorgt, dass in diesem Bereich der Widerstand ansteigt und das Temperaturfeld angepasst wird, wobei gleichzeitig vermieden wird, dass Temperaturgradienten entstehen, die Gleitungen nach sich ziehen. The method includes measures which influence the deposition of the epitaxial layer in the problematic edge region in such a way that the influence remains largely localized. This ensures that the resistance in this area increases and the temperature field is adjusted, while avoiding the formation of temperature gradients, which lead to slip.
Um das Abscheideergebnis insbesondere hinsichtlich des Widerstands positiv zu beeinflussen, enthält das Prozessgas neben Wasserstoff auch Inertgas. Als Inertgas kommt insbesondere Argon in Frage. Es ist aber auch möglich, ein anderes Edelgas oder eine beliebige Mischung zweier oder mehrerer Edelgase als Inertgas In order to positively influence the separation result, in particular with regard to the resistance, the process gas contains not only hydrogen but also inert gas. In particular, argon is suitable as the inert gas. But it is also possible, another noble gas or any mixture of two or more noble gases as an inert gas
einzusetzen. Vorzugsweise werden Wasserstoff und Inertgas im Volumen-Verhältnis von nicht weniger als 6 und nicht mehr als 20 über die Substratscheibe geleitet. Der zusätzliche Einsatz von Inertgas bewirkt überraschenderweise eine Zunahme des Widerstands im problematischen Randbereich und eine gewisse Verbesserung im Hinblick auf eine Vergleichmäßigung der Dicke der epitaktischen Schicht. Darüber hinaus wird die Dicke der epitaktischen Schicht im problematischen Randbereich der Substratscheibe gezielt verbessert, indem die Substratscheibe in einer Vorrichtung zum Beschichten einzelner Scheiben beschichtet wird, deren oberer Deckel in besonderer Weise strukturiert ist. Er weist einen ringförmigen Bereich auf, der, im Unterschied zu benachbarten Bereichen, durchtretende Strahlung bündelt. Der Querschnitt durch den ringförmigen Bereich des oberen Deckels ist vorzugsweise konvex nach oben gewölbt oder hat die Kontur einer Fresnel-Linse. Die gebündelte Strahlung trifft im problematischen Randbereich der Substratscheibe auf, wodurch dort die Temperatur selektiv erhöht wird. Die lokale Temperaturerhöhung im problematischen Randbereich der Substratscheibe kompensiert den Wärmeverlust, der dort durch Wärmeabstrahlung entsteht, und führt dazu, dass use. Preferably, hydrogen and inert gas are passed over the substrate wafer in a volume ratio of not less than 6 and not more than 20. The additional use of inert gas surprisingly causes an increase in the resistance in the problematic edge region and a certain improvement with a view to equalizing the thickness of the epitaxial layer. In addition, the thickness of the epitaxial layer in the problematic edge region of the Target substrate selectively improved by the substrate wafer is coated in a device for coating individual slices, the upper lid is structured in a special way. It has an annular region that, in contrast to adjacent regions, bundles transmitted radiation. The cross section through the annular region of the upper lid is preferably curved convexly upward or has the contour of a Fresnel lens. The collimated radiation impinges in the problematic edge region of the substrate wafer, as a result of which the temperature is selectively increased there. The local increase in temperature in the problematic edge region of the substrate disc compensates for the heat loss that occurs there due to heat radiation and leads to
Temperaturunterschiede zu weiter innen liegenden Bereichen geringer werden.  Temperature differences to more inward areas are lower.
Letztendlich wird auf diese Weise die Dicke der epitaktischen Schicht im Randbereich der Substratscheibe angeglichen an die Dicke der epitaktischen Schicht in weiter innen liegenden Bereichen der Substratscheibe. Finally, in this way, the thickness of the epitaxial layer in the edge region of the substrate wafer is matched to the thickness of the epitaxial layer in further inner regions of the substrate wafer.
Die Erfindung wird nachfolgend unter Bezugnahme auf Zeichnungen weiter erläutert. The invention will be further explained below with reference to drawings.
Kurzbeschreibung der Zeichnungen Brief description of the drawings
Fig. 1a und Fig.1 b zeigen den Einfluss von Argon im Prozessgas auf die 1a and 1b show the influence of argon in the process gas on the
Vergleichmäßigung der Dicke der epitaktischen Schicht. Equalization of the thickness of the epitaxial layer.
Fig. 2 zeigt den Einfluss von Argon im Prozessgas auf die Vergleichmäßigung des Widerstands der epitaktischen Schicht. Fig. 2 shows the influence of argon in the process gas on the equalization of the resistance of the epitaxial layer.
Fig. 3 zeigt den Querschnitt einer Vorrichtung, die zum Beschichten einzelner Scheiben mittels CVD geeignet ist. Fig. 4 zeigt schematisch die Wirkungsweise eines oberen Deckels mit einem ringförmigen Bereich, der durchtretende Strahlung bündelt. Fig. 3 shows the cross-section of a device which is suitable for coating individual slices by means of CVD. Fig. 4 shows schematically the operation of an upper lid with an annular area which bundles passing radiation.
Fig. 5 zeigt die geometrische Beziehung zwischen der Position des ringförmigen Bereichs des oberen Deckels und des Randbereichs der Substratscheibe, in dem Strahlung gebündelt wird, wenn sie durch den ringförmigen Bereich des Deckels durchtritt. Fig. 5 shows the geometric relationship between the position of the annular portion of the upper lid and the peripheral portion of the substrate wafer, in which Radiation is bundled as it passes through the annular portion of the lid.
Fig. 6 und Fig. 7 zeigen Aufnahmen von SIRD-Messungen an einer erfindungsgemäß hergestellten Halbleiterscheibe (Fig.6) und an einer Halbleiterscheibe (Fig.7), die nicht in erfindungsgemäßer Weise hergestellt wurde. FIG. 6 and FIG. 7 show images of SIRD measurements on a semiconductor wafer produced according to the invention (FIG. 6) and on a semiconductor wafer (FIG. 7) which was not produced in accordance with the invention.
Fig. 8 zeigt über den Radius R den Verlauf der Abweichung Vth der Schichtdicke von einem Zielwert bei einer erfindungsgemäß hergestellten Halbleiterscheibe FIG. 8 shows, over the radius R, the profile of the deviation Vth of the layer thickness from a target value in the case of a semiconductor wafer produced according to the invention
(durchgezogene Linie) mit erfindungsgemäßer Schichtdicke und bei einer (solid line) with inventive layer thickness and at a
Halbleiterscheibe (gestrichelte Linie), die nicht in erfindungsgemäßer Weise Semiconductor wafer (dashed line), not in accordance with the invention
hergestellt wurde. was produced.
Fig. 9 zeigt über den Radius R den Verlauf der Abweichung Vr des Widerstands von einem Zielwert einer erfindungsgemäß hergestellten Halbleiterscheibe FIG. 9 shows over the radius R the profile of the deviation V r of the resistance of a target value of a semiconductor wafer produced according to the invention
(durchgezogene Linie) mit erfindungsgemäßer Schichtdicke und einer (solid line) with inventive layer thickness and a
Halbleiterscheibe (gestrichelte Linie), die nicht in erfindungsgemäßer Weise Semiconductor wafer (dashed line), not in accordance with the invention
hergestellt wurde. Liste der verwendeten Bezugszeichen was produced. List of reference numbers used
1 oberer Deckel 1 upper lid
2 unterer Deckel  2 lower lid
3 Seitenwand  3 side wall
4 Substratscheibe 4 substrate disk
5 Suszeptor  5 susceptor
6 Strahlungsquelle  6 radiation source
7 ringförmiger Bereich des oberen Deckels  7 annular area of the upper lid
8 durchtretende Strahlung  8 passing radiation
9 epitaktische Schicht 9 epitaxial layer
10 Material Fig. 1 a und Fig.1 b zeigen den Einfluss von Argon im Prozessgas auf die Vergleichmäßigung der Dicke der epitaktischen Schicht. Dargestellt ist jeweils ein typischer Verlauf Abweichung der Dicke der epitaktischen Schicht von einer Zieldicke Δ über den Durchmesser d der Substratscheibe. Der Verlauf der Dicke der 10 material 1 a and 1 b show the influence of argon in the process gas on the equalization of the thickness of the epitaxial layer. In each case, a typical curve is shown deviating the thickness of the epitaxial layer from a target thickness Δ over the diameter d of the substrate wafer. The course of the thickness of
epitaktischen Schicht ist im Fall von Fig. 1 b gleichmäßiger als im Fall von Fig. 1 a. Dieser Unterschied ist darauf zurückzuführen, dass das Prozessgas beim Abscheiden der epitaktischen Schicht zusätzlich Argon enthielt (Fig. 1 b), beziehungsweise kein Argon enthielt (Fig. 1 a). Argon wurde mit einem Anteil von 3 slm zugeführt. Der Anteil an Wasserstoff betrug in beiden Fällen 50 slm. Das Abscheidegas war in beiden Fällen dasselbe, ebenso die Abscheidetemperatur, nämlich 1 1 15 °C. epitaxial layer is more uniform in the case of Fig. 1 b than in the case of Fig. 1 a. This difference is attributable to the fact that the process gas additionally contained argon during deposition of the epitaxial layer (FIG. 1 b), or contained no argon (FIG. 1 a). Argon was fed at a rate of 3 slm. The proportion of hydrogen was 50 slm in both cases. The deposition gas was the same in both cases, as was the deposition temperature, namely 1 1 15 ° C.
Fig. 2 zeigt den Einfluss von Argon im Prozessgas auf die Vergleichmäßigung des Widerstands der epitaktischen Schicht. Dargestellt sind zwei Kurven, die den Verlauf des Widerstands p über den Durchmesser d der Halbleiterscheibe zeigen. Der gleichmäßigere Widerstandsverlauf (Kurve mit quadratischen Datenpunkten) ist darauf zurückzuführen, dass das Prozessgas beim Abscheiden der epitaktischen Schicht zusätzlich Argon enthielt und im Vergleichsfall (Kurve mit rautenförmigen Datenpunkten) nicht. Argon wurde mit einem Anteil von 3 slm zugeführt. Der Anteil an Wasserstoff betrug in beiden Fällen 60 slm. Fig. 2 shows the influence of argon in the process gas on the equalization of the resistance of the epitaxial layer. Shown are two curves showing the course of the resistance p over the diameter d of the semiconductor wafer. The more uniform resistance curve (quadratic data point curve) is due to the fact that the process gas additionally contained argon during the deposition of the epitaxial layer and not in the comparative case (curve with diamond-shaped data points). Argon was fed at a rate of 3 slm. The proportion of hydrogen was 60 slm in both cases.
Die in Fig.3 gezeigte Vorrichtung umfasst eine Reaktorkammer, die von einem oberen Deckel („upper dorne") 1 , einem unteren Deckel („lower dorne") 2 und einer The apparatus shown in Fig. 3 comprises a reactor chamber consisting of an upper lid (spine) 1, a lower spout 2 and a
Seitenwand 3 begrenzt wird. Der obere und untere Deckel 1 , 2 sind durchlässig für Wärmestrahlung, die von über und unter der Reaktorkammer angeordneten Side wall 3 is limited. The upper and lower covers 1, 2 are permeable to thermal radiation located above and below the reactor chamber
Strahlungsquellen 6 abgestrahlt wird. Die epitaktische Schicht wird aus der Gasphase auf der oberen Seite der Substratscheibe 4 abgeschieden, indem Prozessgas über die durch Wärmestrahlung erhitzte Substratscheibe geleitet wird. Das Prozessgas wird durch einen Gaseinlass in der Seitenwand 3 zugeführt und das nach der Radiation sources 6 is emitted. The epitaxial layer is deposited from the gas phase on the upper side of the substrate wafer 4 by passing process gas over the heat radiation heated substrate wafer. The process gas is supplied through a gas inlet in the side wall 3 and after the
Reaktion verbleibende Abgas durch einen Gasauslass in der Seitenwand 3 abgeführt. Die dargestellte Vorrichtung repräsentiert eine Ausführungsform, die einen weiteren Gaseinlass und einen weiteren Gasauslass hat, um beispielsweise ein Spülgas in das unter der Substratscheibe vorhandene Volumen der Reaktorkammer ein- und auszuleiten zu können. Der weitere Gaseinlass und der weitere Gasauslass tragen jedoch nichts zur Lösung der vorliegenden Aufgabe bei. Während des Abscheidens der epitaktischen Schicht liegt die Substratscheibe 4 auf der Ablagefläche eines Suszeptors 5 und wird zusannnnen mit dem Suszeptor um eine Drehachse in der Mitte der Substratscheibe gedreht. Reaction remaining exhaust discharged through a gas outlet in the side wall 3. The device shown represents an embodiment which has a further gas inlet and a further gas outlet, for example, to be able to feed and discharge a purge gas into the volume of the reactor chamber present under the substrate disk. The further gas inlet and the further gas outlet carry but nothing to solve the problem at hand. During the deposition of the epitaxial layer, the substrate wafer 4 lies on the deposition surface of a susceptor 5 and is then rotated together with the susceptor about an axis of rotation in the center of the substrate wafer.
Der obere Deckel 1 weist einen ringförmigen Bereich 7 auf (Fig.4), der durchtretende Strahlung bündelt. Die Dicke des oberen Deckels 1 ist im ringförmigen Bereich 7 dicker als in den angrenzenden Bereichen. Der Querschnitt durch den ringförmigen Bereich des oberen Deckels ist vorzugsweise konvex nach oben gewölbt oder hat die Kontur einer Fresnel Linse. Auf die durchtretende Strahlung 8 wirkt der ringförmige Bereich 7 wie eine Sammellinse, die die Strahlung bündelt. Die gebündelte Strahlung trifft im Randbereich der Substratscheibe auf, der vorzugsweise einen Abstand bis 15 mm zum Rand Substratscheibe 4 hat. Die auftreffende Strahlung hebt im The upper cover 1 has an annular region 7 (FIG. 4), which bundles transmitted radiation. The thickness of the upper lid 1 is thicker in the annular area 7 than in the adjacent areas. The cross section through the annular region of the upper lid is preferably curved convexly upward or has the contour of a Fresnel lens. On the penetrating radiation 8, the annular region 7 acts like a converging lens, which focuses the radiation. The collimated radiation impinges in the edge region of the substrate wafer, which preferably has a distance of up to 15 mm from the edge of the substrate wafer 4. The incident radiation raises in the
Randbereich einen radialen Temperaturabfall auf, so dass dort eine vorgesehene Menge an Material 10 abgeschieden wird und die Dicke der epitaktischen Schicht 9 einen vorgesehenen Wert erreicht. Edge region to a radial temperature drop, so that there is an intended amount of material 10 is deposited and the thickness of the epitaxial layer 9 reaches a predetermined value.
Die Position des ringförmigen Bereichs 7 des oberen Deckels und die des The position of the annular portion 7 of the upper lid and that of
Randbereichs der Substratscheibe korrelieren nach den Regeln der Strahlenoptik, wie das in Fig.5 skizziert ist. Die Länge ro bezeichnet den Abstand des ringförmigen Bereichs 7 des oberen Deckels 1 zur Senkrechten durch die Mitte des oberen Edge region of the substrate disc correlate according to the rules of the beam optics, as shown in Figure 5 is sketched. The length ro denotes the distance of the annular portion 7 of the upper lid 1 to the vertical through the center of the upper
Deckels und ergibt sich aus der Differenz der Längen rs und x. Die Länge ro kann mit vorgegebenen Höhen b und h, vorgegebener Länge a und vorgegebenem Winkel α näherungsweise berechnet werden, wobei die Höhe b den Abstand der Cover and results from the difference of the lengths rs and x. The length ro can be approximately calculated with predetermined heights b and h, predetermined length a and predetermined angle α, wherein the height b is the distance of the
Strahlungsquelle zur Ebene der Substratscheibe bezeichnet, die Länge rs den Abstand der Lichtquelle zur Senkrechten durch die Mitte des oberen Deckels, die Höhe h den Abstand des oberen Deckels 1 zur Substratscheibe 4, die Länge x den Abstand des ringförmigen Bereichs 7 zur Höhe b, die Länge a den größten Abstand des Randbereichs der Substratscheibe zur Höhe b und der Winkel α den der Basis gegenüberliegenden Winkel eines Dreiecks mit der Höhe b und der Länge a als Basis. Detaillierte Beschreibung erfindungsgemäßer Ausführungsbeispiele Radiation source to the plane of the substrate disc, the length rs the distance of the light source to the vertical through the center of the upper lid, the height h the distance of the upper lid 1 to the substrate wafer 4, the length x the distance of the annular region 7 to the height b, the Length a is the largest distance of the edge region of the substrate disk to the height b and the angle α is the angle of a triangle opposite the base with the height b and the length a as a base. Detailed description of inventive embodiments
Es wurden Halbleiterscheiben aus einkristallinem Silizium nach dem There were semiconductor wafers of monocrystalline silicon after the
erfindungsgemäßen Verfahren hergestellt und zum Zweck eines Vergleichs auch Halbleiterscheiben nach einem davon abweichenden Verfahren. according to the invention produced and for the purpose of comparison also semiconductor wafers according to a different method.
Substratscheiben aus einkristallinem Silizium mit einem Durchmesser von 300 mm wurden in einer Einzelscheibenvorrichtung gemäß Fig. 3 mit einer epitaktischen Schicht aus Silizium beschichtet, nachdem sie von einem Einkristall abgetrennt, geschliffen, geätzt und poliert worden waren. Substrate wafers made of monocrystalline silicon having a diameter of 300 mm were coated with a silicon epitaxial layer in a single-wafer device as shown in FIG. 3 after being cut, ground, etched and polished by a single crystal.
Bei Anwendung des erfindungsgemäßen Verfahrens hatte die Vorrichtung einen oberen Deckel mit einem ringförmigen Bereich, der durchgestrahlte Strahlung in einem Randbereich der Substratscheibe bündelte. Bei Anwendung des abweichenden Verfahrens fehlt dem oberen Deckel diese Struktur. When using the method according to the invention, the device had an upper lid with an annular area which bundled radiation transmitted through in an edge region of the substrate wafer. When using the deviant method, the upper lid lacks this structure.
Bei Anwendung des erfindungsgemäßen Verfahrens bestand das Prozessgas aus Wasserstoff (70 slm), Argon (5 slm) und Abscheidegas (Tnchlorsilan (6 slm), Diboran (50 ppm in Wasserstoff (180 sccm)) verdünnt in 4 I Wasserstoff ), und die epitaktische Schicht wurde bei einer Temperatur von 1 130 °C abgeschieden. When using the method according to the invention, the process gas consisted of hydrogen (70 slm), argon (5 slm) and deposition gas (Tnchlorsilan (6 slm), diborane (50 ppm in hydrogen (180 sccm)) diluted in 4 l of hydrogen), and the epitaxial Layer was deposited at a temperature of 1130 ° C.
Bei Anwendung des abweichenden Verfahrens bestand das Prozessgas nur aus Wasserstoff (55 slm) und Abscheidegas (Tnchlorsilan (10 slm), Diboran (50 ppm in Wasserstoff (180 sccm)) verdünnt in 4 I Wasserstoff), und die epitaktische Schicht wurde bei einer Temperatur von 1 125 °C abgeschieden. Using the different method, the process gas consisted only of hydrogen (55 slm) and deposition gas (10 slm), diborane (50 ppm in hydrogen (180 sccm) diluted in 4 liters of hydrogen), and the epitaxial layer became at a temperature of 1 125 ° C deposited.
Fig. 6 zeigt die Aufnahme einer SIRD-Messung an einer erfindungsgemäß FIG. 6 shows the recording of an SIRD measurement on a device according to the invention
hergestellten Halbleiterscheibe. Der Grad der Depolarisation blieb im bevorzugten Umfang. In keiner der Messzellen war der Grad an Depolarisation größer als 30 DU. Im Fall der Halbleiterscheibe, die nach dem abweichenden Verfahren hergestellt wurde, waren 0,907 % der Messzellen wegen eines Grads an Depolarisation von mehr als 30 DU auffällig (Fig.7). Die SIRD-Messung wurde mit einem Instrument SIRD-AB300 der PVA TePla AG durchgeführt, wobei zur Auswertung ein produced semiconductor wafer. The degree of depolarization remained within the preferred range. In none of the measuring cells was the degree of depolarization greater than 30 DU. In the case of the semiconductor wafer prepared by the deviated method, 0.907% of the cells were conspicuous due to a degree of depolarization of more than 30 DU (Fig.7). The SIRD measurement was carried out with a SIRD-AB300 instrument from PVA TePla AG
Polarkoordinaten-Gitter mit einer Zellgröße von 1 mm (Radius) und 2 mm (Azimut) über die Messfläche gelegt wurde. Für jede Zelle des Gitters wurde der Grad der Depolarisation bestimmt. Eine Depolarisationseinheit DU entspricht einem Grad an Depolarisation von 1 x 10"6. Dargestellt ist jeweils der ausgerollte Umfangsbereich der Halbleiterscheibe mit einem Abstand von 4,5 mm und weniger zum Rand der Polar coordinates grid with a cell size of 1 mm (radius) and 2 mm (azimuth) was placed over the measuring surface. For each cell of the grid, the degree of depolarization was determined. A depolarization unit DU corresponds to a degree of depolarization of 1.times.10.sup.- 6 . The rolled out circumferential area of the semiconductor wafer is shown at a distance of 4.5 mm and less to the edge of the semiconductor wafer
Halbleiterscheibe und mit der Notch-Position (pos = 0°) in der Mitte. Der Semiconductor disk and with the Notch position (pos = 0 °) in the middle. The
Umfangsbereich mit einem Abstand von 15 mm bis 4,5 mm zum Rand der Peripheral area with a distance of 15 mm to 4.5 mm to the edge of the
Halbleiterscheibe ist nicht dargestellt, weil dort in beiden Fällen die SIRD-Spannung unauffällig war. Fig. 8 zeigt über den Radius R den Verlauf der Abweichung Vth der Schichtdicke von einem Zielwert bei einer erfindungsgemäß hergestellten Halbleiterscheibe Semiconductor wafer is not shown because in both cases the SIRD voltage was inconspicuous. FIG. 8 shows, over the radius R, the profile of the deviation Vth of the layer thickness from a target value in the case of a semiconductor wafer produced according to the invention
(durchgezogene Linie) und bei einer Halbleiterscheibe (gestrichelte Linie), die nach dem abweichenden Verfahren hergestellt wurde. Nur die erfindungsgemäß (solid line) and a semiconductor wafer (dashed line), which was prepared by the deviating method. Only the invention
hergestellte Halbleiterscheibe erfüllte das erfindungsgemäße Kriterium bezüglich der Schichtdicke. produced semiconductor wafer met the criterion according to the invention with respect to the layer thickness.
Fig. 9 zeigt über den Radius R den Verlauf der Abweichung Vr des Widerstands von einem Zielwert bei einer erfindungsgemäß hergestellten Halbleiterscheibe FIG. 9 shows over the radius R the profile of the deviation V r of the resistance from a target value in the case of a semiconductor wafer produced according to the invention
(durchgezogene Linie) und bei einer Halbleiterscheibe (gestrichelte Linie), die nach dem abweichenden Verfahren hergestellt wurde. Nur die erfindungsgemäß (solid line) and a semiconductor wafer (dashed line), which was prepared by the deviating method. Only the invention
hergestellte Halbleiterscheibe erfüllte das erfindungsgemäße Kriterium bezüglich des Widerstands. produced semiconductor wafer met the criterion according to the invention in terms of resistance.
Die vorstehende Beschreibung beispielhafter Ausführungsformen ist exemplarisch zu verstehen. Die damit erfolgte Offenbarung ermöglicht es dem Fachmann einerseits, die vorliegende Erfindung und die damit verbundenen Vorteile zu verstehen, und umfasst andererseits im Verständnis des Fachmanns auch offensichtliche The above description of exemplary embodiments is to be understood by way of example. The disclosure thus made makes it possible for the skilled person, on the one hand, to understand the present invention and the associated advantages, and on the other hand, in the understanding of the person skilled in the art, also includes obvious ones
Abänderungen und Modifikationen der beschriebenen Strukturen und Verfahren. Daher sollen alle derartigen Abänderungen und Modifikationen sowie Äquivalente durch den Schutzbereich der Ansprüche abgedeckt sein. Modifications and Modifications of the Structures and Methods Described. It is therefore intended that all such alterations and modifications as well as equivalents be covered by the scope of the claims.

Claims

Patentansprüche claims
1 . Halbleiterscheibe aus einkristallinem Siliziunn mit einem Durchmesser von nicht weniger als 300 mm, umfassend 1 . Single crystal silicon wafer having a diameter of not less than 300 mm, comprising
eine Substratscheibe aus einkristallinem Silizium und eine auf der Substratscheibe liegende epitaktische Schicht aus einkristallinem Silizium, die Dotierstoff enthält, wobei eine Ungleichmäßigkeit der Dicke der epitaktischen Schicht nicht mehr als 0,5 % und eine Ungleichmäßigkeit des spezifischen elektrischen Widerstands der epitaktischen Schicht nicht mehr als 2 % beträgt. a monocrystalline silicon substrate wafer and a monocrystalline silicon epitaxial layer containing dopant on the substrate wafer, wherein epitaxial layer thickness nonuniformity is not more than 0.5% and non-uniformity of the epitaxial layer resistivity is not more than 2 % is.
2. Halbleiterscheibe nach Anspruch 1 , wobei die Dicke der epitaktischen Schicht nicht weniger als 1 μιτι und nicht mehr als 20 μιτι beträgt. 2. A semiconductor wafer according to claim 1, wherein the thickness of the epitaxial layer is not less than 1 μιτι and not more than 20 μιτι.
3. Halbleiterscheibe nach Anspruch 1 oder Anspruch 2, wobei die Halbleiterscheibe in einem Randbereich mit einem Abstand bis 15 mm zum Rand der Halbleiterscheibe bei einem Randausschluss von 0,5 mm SIRD-Spannungen aufweist, die einen Grad an Depolarisation von nicht mehr als 30 Depolarisationseinheiten hervorrufen. 3. A semiconductor wafer according to claim 1 or claim 2, wherein the semiconductor wafer in an edge region with a distance of up to 15 mm to the edge of the semiconductor wafer with an edge exclusion of 0.5 mm SIRD voltages having a degree of depolarization of not more than 30 Depolarisationseinheiten cause.
4. Verfahren zur Herstellung einer beschichteten Halbleiterscheibe aus einkristallinem Silizium, umfassend 4. A process for producing a coated semiconductor wafer of monocrystalline silicon, comprising
das Bereitstellen einer Substratscheibe aus einkristallinem Silizium mit einem providing a substrate wafer of monocrystalline silicon with a
Durchmesser von nicht weniger als 300 mm; Diameter of not less than 300 mm;
das Ablegen der Substratscheibe auf einem Suszeptor einer Vorrichtung zum depositing the substrate wafer on a susceptor of a device for
Beschichten einzelner Scheiben, wobei die Vorrichtung einen oberen Deckel mit einem ringförmigen Bereich aufweist, der durch den ringförmigen Bereich  Coating individual slices, the apparatus having an upper lid with an annular portion passing through the annular portion
durchgestrahlte Strahlung in einem Randbereich der Substratscheibe bündelt; irradiated radiation bundles in an edge region of the substrate wafer;
das Erhitzen der Substratscheibe auf eine Abscheidetemperatur durch eine heating the substrate wafer to a deposition temperature by a
Strahlungsquelle, die über dem oberen Deckel der Vorrichtung angeordnet ist;  Radiation source, which is arranged above the upper lid of the device;
das Abscheiden einer epitaktischen Schicht aus Silizium durch Leiten von Prozessgas über die erhitze Substratscheibe, wobei das Prozessgas Wasserstoff, Inertgas und ein Abscheidegas enthält, und das Abscheidegas Dotierstoff und eine Siliziumquelle enthält. depositing an epitaxial layer of silicon by passing process gas over the heated substrate wafer, wherein the process gas contains hydrogen, inert gas, and a deposition gas, and the deposition gas contains dopant and a silicon source.
5. Verfahren nach Anspruch 4, wobei der Randbereich der Substratscheibe einen Abstand bis 15 mm zu einem Rand der Substratscheibe hat. 5. The method of claim 4, wherein the edge region of the substrate wafer has a distance of up to 15 mm from an edge of the substrate wafer.
6. Verfahren nach Anspruch 4 oder Anspruch 5, umfassend das Leiten von Wasserstoff und Inertgas im Volumen-Verhältnis von nicht weniger als 6 und nicht mehr als 20 über die erhitzte Substratscheibe. 6. The method of claim 4 or claim 5, comprising passing hydrogen and inert gas in a volume ratio of not less than 6 and not more than 20 over the heated substrate wafer.
7. Verfahren nach einem der Ansprüche 4 bis 6, wobei der Querschnitt durch den ringförmigen Bereich des oberen Deckels konvex nach oben gewölbt ist oder die Kontur einer Fresnel-Linse hat. 7. The method according to any one of claims 4 to 6, wherein the cross section through the annular portion of the upper lid is convexly curved upward or has the contour of a Fresnel lens.
EP18740798.6A 2017-07-26 2018-07-12 Epitaxially coated semiconductor wafer of monocrystalline silicon and method for the production thereof Pending EP3659173A1 (en)

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