CN110998787A - 由单晶硅构成的外延涂覆的半导体晶片及其制造方法 - Google Patents

由单晶硅构成的外延涂覆的半导体晶片及其制造方法 Download PDF

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CN110998787A
CN110998787A CN201880050070.4A CN201880050070A CN110998787A CN 110998787 A CN110998787 A CN 110998787A CN 201880050070 A CN201880050070 A CN 201880050070A CN 110998787 A CN110998787 A CN 110998787A
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R·绍尔
J·哈贝雷希特
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Abstract

一种由直径不小于300mm的单晶硅构成的半导体晶片，以及一种用于制造由直径不小于300mm的单晶硅构成的涂覆的半导体晶片的方法。所述半导体晶片包括由单晶硅构成的衬底晶片以及位于所述衬底晶片上的由硅构成的外延层，所述外延层包含掺杂剂，其中，所述外延层的厚度的不均匀性不超过0.5％，且所述外延层的电阻率的不均匀性不超过2％。

Description

由单晶硅构成的外延涂覆的半导体晶片及其制造方法
技术领域
本发明的主题是由直径不小于300mm的单晶硅构成的外延涂覆的半导体晶片。此外，本发明涉及一种用于制造由直径不小于300mm的单晶硅构成的外延涂覆的半导体晶片的方法。
背景技术
为了制造电子构件，需要由单晶硅构成的外延涂覆的半导体晶片作为初级产品。由于优越的电特性，其通常优选由单晶硅构成的抛光半导体晶片。例如这适用于涉及制造图像传感器时的情况，所述图像传感器基于CMOS技术，所谓的CMOS图像传感器或简称CIS构件。
通常通过在1100℃至1250℃的温度下在衬底晶片上进行外延层的气相沉积(CVD)来制造由单晶硅构成的外延涂覆的半导体晶片。通常将由直径不小于300mm的单晶硅构成的衬底晶片涂覆在用于涂覆各个晶片的设备中。
US 2010/0062611 A1描述一种用于使半导体晶片的背侧变薄的方法，该方法可以在制造在背侧照明的图像传感器(英语：backside-illuminated imagesensors，背照式图像传感器)的过程中使用。
为了可以考虑作为制造CIS构件的初级产品，外延涂覆的半导体晶片必须满足特别的要求。该要求特别苛刻，其涉及外延层的厚度和电阻率(英语resistivity)。不仅厚度而且电阻率(以下称为电阻)必须在半导体晶片的整个半径上尽可能地均匀。描述不均匀性的度量是最大厚度和最小厚度(最大和最小电阻)之差与最大厚度和最小厚度(最大电阻和最小电阻)之和的商乘以因子100％。
US 2010/0213168 A1描述用于改善由单晶硅构成的外延层的厚度的均匀性的各种措施。
US 2011/0114017 A1描述一种用于制造由单晶硅构成的外延涂覆的半导体晶片的方法，其中，使外延层沉积并且电阻的不均匀性为4％或更小。
尽管有这样的原理，仍然存在改善层厚度和电阻的均匀性的需求，尤其因为对以下问题迄今缺乏令人满意的解决方案：使有问题的边缘区域(其具有距半导体晶片的边缘直至15mm的间距)中的层厚度和电阻适合于距边缘较大间距的区域的层厚度和电阻。在有问题的边缘区域中，衬底晶片的温度朝向边缘降低，这是因为衬底晶片在边缘附近由于热辐射而损失热量。如果不采取对策，则掺杂有p型掺杂剂的外延层的层厚度在该区域中变小，而电阻变大。如果掺杂剂是n型，则电阻变小。迄今，已知的对策(如对温度场施加影响)不利于有问题的边缘区域以外的区域中的外延层的厚度的均匀性，和/或提高半导体晶片在发生滑动(英语slip)方面的易受影响性。当由于温度差引起应力松弛时，尤其发生滑动。这样的温度差主要在边缘区域中作为径向和轴向的温度梯度出现，也就是说，作为朝向衬底晶片的边缘的温度下降出现，或作为在那里较冷的衬底晶片与在那里较热的基座(Suszeptor)之间的温度差出现。
可以借助SIRD(英语：scanning infrared depolarization，扫描红外去极化)来测量晶格中的应力。US 2012/0007978 A1包含如何测量SIRD应力和以去极化单位来表示的描述，以及对合适的测量仪器的参考。
发明内容
本发明的发明人将自己的任务设定为，在半导体晶片不会更易于形成滑动的情况下，进一步减小外延层的厚度的不均匀性和外延层的电阻的不均匀性。
本发明的任务通过一种由直径不小于300mm的单晶硅构成的半导体晶片来实现，该半导体晶片包括由单晶硅构成的衬底晶片和位于该衬底晶片上的由单晶硅构成的外延层，外延层包含掺杂剂，其中，外延层的厚度的不均匀性不超过0.5％并且外延层的电阻率的不均匀性不超过2％。
因此，半导体晶片的外延层的厚度和电阻特别均匀。外延层的厚度优选为1至20μm。衬底晶片优选还包含掺杂剂，并且还可以附加地掺杂有碳或氮。半导体晶片优选是pp+晶片或nn-晶片。
在具有距半导体晶片的边缘直至15mm的间距的边缘区域中，半导体晶片在0.5mm的边缘除外区域(Randausschluss)处具有SIRD应力，该SIRD应力导致去极化程度优选不超过30个去极化单位。
此外，该任务通过一种用于制造由单晶硅构成的涂覆的半导体晶片的方法来实现，该方法包括：提供由直径不小于300mm的单晶硅构成的衬底晶片；将衬底晶片置于用于涂覆单个晶片的设备的基座上，其中，该设备具有拥有环状区域的上盖，该上盖通过环状区域将辐射通过的辐射聚束在衬底晶片的边缘区域中；通过布置在设备的上盖的上方的辐射源将衬底晶片加热到沉积温度；通过引导过程气体(Prozessgas)通过经加热的衬底晶片来沉积由硅构成的外延层，其中，过程气体包含氢气、惰性气体和沉积气体，并且沉积气体包含掺杂剂和硅源。
该方法包括如下措施：该措施如此影响有问题的边界区域中的外延层的沉积，使得影响在很大程度上保持限制在局部。如此确保在该区域中电阻增加并且匹配温度场，其中，同时避免产生引起滑动的温度梯度。
为了尤其在电阻方面积极地影响沉积结果，过程气体除氢气外还包含惰性气体。尤其可以考虑氩气作为惰性气体。然而同样能够使用另一稀有气体、或两个或多个稀有气体的任意混合物作为惰性气体。优选以不小于6且不大于20的体积比来引导氢气和惰性气体通过衬底晶片。令人惊讶的是，附加地使用惰性气体实现有问题的边缘区域中的电阻增大，以及实现外延层的厚度的均匀性方面的一定改善。此外，有针对性地改善衬底晶片的有问题的边缘区域中的外延层的厚度，其方式是：将衬底晶片涂覆在用于涂覆各个晶片的设备中，该设备的上盖以特别的方式构造。上盖具有环状区域，与相邻的区域不同，该环状区域对进行穿透的辐射进行聚束。上盖的环状区域的横截面优选向上凸起地拱曲或具有菲涅耳透镜的轮廓。所聚束的辐射照射到衬底晶片的有问题的边缘区域，由此在那里选择性地升高温度。衬底晶片的有问题的边缘区域中的局部温度升高补偿在那里通过热辐射产生的热量损失，并且导致与位于更内部的区域的温度差变小。最终，以这种方式使衬底晶片的边缘区域中的外延层的厚度适合于衬底晶片的位于更内部的区域中的外延层的厚度。
附图说明
以下参考附图进一步阐述本发明。
图1a和图1b示出过程气体中氩气对外延层厚度的均匀性的影响；
图2示出过程气体中氩气对外延层的电阻的均匀性的影响；
图3示出适用于借助CVD涂覆各个晶片的设备的横截面；
图4示意性地示出具有环状区域的上盖的作用方式，该环状区域对进行穿透的辐射进行聚束；
图5示出上盖的环状区域的位置与衬底晶片的边缘区域的位置之间的几何关系，在该边缘区域中在辐射穿透上盖的环状区域时对该辐射进行聚束；
图6和图7示出在根据本发明制造的半导体晶片(图6)处和在未以根据本发明的方式制造的半导体晶片(图7)处的SIRD测量的记录；
图8示出在根据本发明制造的半导体晶片(实线)的情况下和在未以根据本发明的方法制造的半导体晶片(虚线)的情况下层厚度与目标值的偏差Vth随半径R的变化过程；
图9示出在根据本发明制造的半导体晶片(实线)的情况下和在未以根据本发明的方法制造的半导体晶片(虚线)的情况下电阻与目标值的偏差Vr随半径R的变化过程。
所使用的附图标记列表
1 上盖
2 下盖
3 侧壁
4 衬底晶片
5 基座
6 辐射源
7 上盖的环状区域
8 进行穿透的辐射
9 外延层
10 材料
具体实施方式
图1a和1b示出过程气体中的氩气对外延层厚度均匀性的影响。分别示出外延层的厚度与目标厚度的偏差Δ随衬底晶片直径d的典型的变化过程。与图1a的情况相比，在图1b的情况下外延层的厚度的变化过程更加均匀。该差异归因于以下事实：在沉积外延层时，过程气体附加地包含氩气(图1b)或不包含氩气(图1a)。以3slm的含量供应氩气。在两种情况下氢气的含量均为50slm。在两种情况下沉积气体相同，沉积温度同样也相同，即1115℃。
图2示出过程气体中的氩气对外延层的电阻的均匀性的影响。示出两个曲线，其表示电阻ρ随半导体晶片的直径d的变化过程。更均匀的电阻变化过程(具有方形数据点的曲线)归因于如下：在沉积外延层时过程气体附加地包含氩气，而在对比情况下(具有菱形数据点的曲线)不包含氩气。氩气的供应含量为3slm。在两种情况下氢气的含量均为60slm。
图3中示出的设备包括反应器室，该反应器室由上盖(英语“upper dome”)1、下盖(英语“lower dome”)2和侧壁3限界。上盖和下盖1、2允许从布置在反应器室的上方和下方的辐射源6辐射出的热辐射通过。外延层由气相沉积在衬底晶片4的上侧上，其方式是：将过程气体引导穿过通过热辐射加热的衬底晶片。过程气体通过进气口输送入侧壁3，并且通过侧壁3中的出气口排出在反应后剩余的废气。所示出的设备代表一种实施方式，该实施方式具有其他进气口和其他出气口，用以例如能够将冲吹气体(Spülgas)引入和引出反应器室的存在于衬底晶片以下的体积中。然而，其他进气口和其他出气口对解决本任务没有贡献。在沉积外延层期间，衬底晶片4位于基座5的存放面上并且与基座一起绕着衬底晶片的中心的旋转轴线旋转。
上盖1具有环状区域7(图4)，该环状区域对进行穿透的辐射进行聚束。上盖1的厚度在环状区域7中比在相邻区域中更厚。上盖的环状区域的横截面优选向上凸起地拱曲或具有菲涅耳透镜的轮廓。对于进行穿透的辐射8，环状区域7如对辐射进行聚束的会聚透镜(Sammellinse)那样地起作用。所聚束的辐射照射衬底晶片的边缘区域，所述边缘区域优选具有距衬底晶片4的边缘直至15mm的间距。照射的辐射在边缘区域中消除径向温度下降，使得在此沉积所设置的量的材料10，并且外延层9的厚度达到所设置的值。
如图5所描绘的那样，上盖的环状区域7的位置与衬底晶片的边缘区域的位置根据辐射光学的规则相关。长度rD表示上盖1的环状区域7至通过上盖的中心的垂线的间距，并且可以由长度rS和x的差得出。在预给定高度b和h、预给定长度a并且预给定角度α的情况下，可以近似计算长度rD，其中，高度b表示辐射源至衬底晶片平面的间距，长度rS表示光源至通过上盖的中心的垂线的间距，高度h表示上盖1至衬底晶片4的间距，长度x表示环状区域7至高度b的间距，长度a表示衬底晶片的边缘区域至高度b的最大间距，角度α表示以下三角形的相对于底边的角度：该三角形具有高度b且具有长度a作为底边。
根据本发明的实施例的详细描述
参照根据本发明的方法制造由单晶硅构成的半导体晶片，并且出于比较的目的，也参照与其不同的方法来制造半导体晶片。
在根据图3的单晶片设备中，在对由直径300mm的单晶硅构成的衬底晶片与单晶进行分离、磨光、蚀刻和抛光之后，给该衬底晶片涂覆由硅构成的外延层。
在应用根据本发明的方法时，设备具有上盖，上盖具有环状区域，环状区域将辐射通过的辐射聚束在衬底晶片的边缘区域中。在应用不同的方法时，这些结构缺少上盖。
在应用根据本发明的方法时，过程气体由氢气(70slm)、氩气(5slm)和沉积气体(三氯硅烷(6slm)、乙硼烷(在氢气(180sccm)中占50ppm)，用4l氢气稀释)构成，并且在1130℃的温度下沉积外延层。
在应用不同的方法时，过程气体仅由氢气(55slm)和沉积气体(三氯硅烷(10slm)、乙硼烷(在氢气(180sccm)中占50ppm)，用4l氢气稀释)并且在1125℃的温度下沉积外延层。
图6示出在根据本发明制造的半导体晶片上的SIRD测量的记录。去极化程度保持在优选的范围内。在任何测量单元中，去极化程度均不大于30DU。在根据不同方法制造的半导体晶片的情况下，测量单元格中的0.907％由于去极化程度大于30DU而突出(图7)。借助PVA TePla AG的SIRD-AB300仪器实施SIRD测量，其中，在测量区域上方放置一个单元尺寸为1mm(半径)和2mm(方位角)的极坐标网格，以进行分析处理。确定网格的每个单元的去极化程度。去极化单位DU相应于1×10-6的去极化程度。分别示出半导体晶片的展开的周边区域(Umfangsbereich)，其中，距半导体晶片的边缘的间距为4.5mm或更少并且凹口位置(pos＝0°)位于中间。至半导体晶片的边缘的间距为15mm至4.5mm的周边区域未示出，因为在那里在两种情况下SIRD应力都不突出。
图8示出，在根据本发明制造的半导体晶片(实线)的情况下和在根据不同方法制造的半导体晶片(虚线)的情况下，层厚度与目标值的偏差Vth随半径R的变化过程。在层厚度方面，仅根据本发明制造的半导体晶片满足根据本发明的标准。
图9示出，在根据本发明制造的半导体晶片(实线)的情况下和在根据不同方法制造的半导体晶片(虚线)的情况下电阻与目标值的偏差Vr随半径R的变化过程。在电阻方面，仅根据本发明制造的半导体晶片满足根据本发明的标准。
示例性的实施方式的以上描述应理解为示范性的。借此实现的公开一方面使得本领域技术人员能够理解本发明及与其相关的优点，并且另一方面在本领域技术人员的理解中，还包括对所描述的结构和方法的显而易见的改变和修改。因此，通过权利要求的保护范围应覆盖所有这种类型的改变、修改以及等效方案。

Claims (7)

1.一种半导体晶片，所述半导体晶片由直径不小于300mm的单晶硅构成，所述半导体晶片包括衬底晶片和外延层，所述衬底晶片由单晶硅构成，所述外延层处在所述衬底晶片上并且由单晶硅构成并且包含掺杂剂，其中，所述外延层的厚度的不均匀性不超过0.5％，并且所述外延层的电阻率的不均匀性不超过2％。
2.根据权利要求1所述的半导体晶片，其中，所述外延层的厚度不小于1μm且不大于20μm。
3.根据权利要求1或2所述的半导体晶片，其中，在具有距所述半导体晶片的边缘直至15mm的间距的边缘区域中，所述半导体晶片在0.5mm的边缘除外区域处具有SIRD应力，所述SIRD应力导致去极化程度不超过30个去极化单位。
4.一种用于制造由单晶硅构成的涂覆的半导体晶片的方法，所述方法包括，
提供由直径不小于300mm的单晶硅构成的衬底晶片；
将所述衬底晶片置于用于涂覆各个晶片的设备的基座上，其中，所述设备具有上盖，所述上盖具有环状区域，所述上盖通过所述环状区域将辐射通过的辐射聚束在所述衬底晶片的边缘区域中；
通过辐射源将所述衬底晶片加热到沉积温度，所述辐射源布置在所述设备的上盖的上方；
通过引导过程气体通过所加热的衬底晶片来沉积由硅构成的外延层，其中，所述过程气体包含氢气、惰性气体和沉积气体，并且所述沉积气体包含掺杂剂和硅源。
5.根据权利要求4所述的方法，其中，所述衬底晶片的边缘区域具有距所述衬底晶片的边缘直至15mm的间距。
6.根据权利要求4或5所述的方法，所述方法包括以下步骤：以不小于6且不大于20的体积比来引导氢气和惰性气体通过所加热的衬底晶片。
7.根据权利要求4至6中任一项所述的方法，其中，所述上盖的环状区域的横截面向上凸起地拱曲或具有菲涅耳透镜的轮廓。
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IL271984B2 (en) 2023-04-01
TWI672402B (zh) 2019-09-21
US20210087705A1 (en) 2021-03-25
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TW201910571A (zh) 2019-03-16
JP2020529127A (ja) 2020-10-01
IL271984B (en) 2022-12-01
IL271984A (en) 2020-02-27
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