EP2894678A1 - Procédé de fabrication d'un élément semi-conducteur - Google Patents

Procédé de fabrication d'un élément semi-conducteur Download PDF

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Publication number
EP2894678A1
EP2894678A1 EP14190109.0A EP14190109A EP2894678A1 EP 2894678 A1 EP2894678 A1 EP 2894678A1 EP 14190109 A EP14190109 A EP 14190109A EP 2894678 A1 EP2894678 A1 EP 2894678A1
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EP
European Patent Office
Prior art keywords
semiconductor layer
substrate
laser pulses
carrier
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP14190109.0A
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German (de)
English (en)
Inventor
Stephan Kaiser
Volker HÄRLE
Berthold Hahn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram International GmbH
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Osram Opto Semiconductors GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE10303977A external-priority patent/DE10303977A1/de
Application filed by Osram Opto Semiconductors GmbH filed Critical Osram Opto Semiconductors GmbH
Publication of EP2894678A1 publication Critical patent/EP2894678A1/fr
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate

Definitions

  • the invention relates to a method for producing a semiconductor device, in which a semiconductor layer is separated from a substrate by irradiation with a laser beam.
  • Such a method is used, for example, in the production of substrateless light emission diodes (luminescence diodes) based on GaN.
  • Such devices include a semiconductor body and a support portion on which the semiconductor body is mounted.
  • a semiconductor layer is first produced on a suitable substrate, subsequently connected to a carrier and then detached from the substrate.
  • the carrier With the semiconductor layer arranged thereon, a plurality of semiconductor bodies is produced, which are each fastened on the corresponding carrier part. It is essential here that the substrate used for the production of the semiconductor layer is removed from the semiconductor layer and does not at the same time serve as a carrier or carrier part in the component.
  • This manufacturing method has the advantage that different materials are used for the substrate and the carrier.
  • the respective materials can be adapted to the different requirements for the production of the semiconductor layer on the one hand and the operating conditions on the other hand largely independently. So the wearer can, according to his mechanical, thermal and optical properties are chosen independently of the requirements of the substrate for manufacturing the semiconductor layer.
  • the epitaxial production of a semiconductor layer presents many special requirements for the epitaxial substrate.
  • the lattice constants of the substrate and the semiconductor layer to be applied must be matched to each other.
  • the substrate should withstand the epitaxial conditions, in particular temperatures of more than 1000 ° C., and be suitable for the epitaxial growth and growth of a highly homogeneous layer of the relevant semiconductor material.
  • the carrier For further processing of the semiconductor body and the operation, however, are other properties of the carrier such as electrical and thermal conductivity and radiation transmission in optoelectronic devices in the foreground.
  • the suitable materials for an epitaxial substrate are therefore only partially suitable as a carrier part in the component.
  • the detachment of the semiconductor layer from the substrate is essential.
  • This detachment can be achieved by irradiation of the semiconductor-substrate interface with laser radiation.
  • the laser radiation is absorbed in the vicinity of the interface and causes a decomposition of the semiconductor material there.
  • the separation of the semiconductor layer from the substrate may be accomplished, for example, by laser ablation, as disclosed in US Pat WO 98/14986 described, done.
  • the frequency-tripled radiation of a Q-switch Nd: YAG laser with a pulse duration between 1 ns and 10 ns and a wavelength of 355 nm is used.
  • the sapphire substrate is transparent to radiation of this wavelength.
  • the radiation energy is absorbed in an about 50 nm to 300 nm thick boundary layer at the junction between the sapphire substrate and the GaN semiconductor layer.
  • pulse energies above 200 mJ / cm 2 temperatures of more than 850 ° C are reached at the interface.
  • the GaN interface decomposes at this temperature to release nitrogen, the bond between the semiconductor layer and the substrate is separated.
  • a mechanical stabilization of the semiconductor layer to be detached is required because the layer thickness is so low that otherwise there is a risk of damage, in particular a fracture or crack of the layer.
  • the semiconductor layer can be connected to a suitable carrier.
  • a suitable carrier such a compound should be at least so far temperature stable that it survives unscathed the temperatures occurring at subsequent manufacturing steps. Furthermore, this compound should remain stable even with thermal cycling, which can occur in particular during operation of the device.
  • the individual laser parameters are of decisive importance for the result of the detachment process.
  • the laser parameters must be coordinated so that on the one hand, the semiconductor layer as completely as possible and residue-free is replaced, on the other hand, the connection with said carrier is not affected.
  • the invention is based on the finding that for a complete and residue-free detachment of the semiconductor layer from the substrate for a given energy for the decomposition of the semiconductor material in particular the pulse duration and the beam profile are to be matched.
  • the pulse duration is to be chosen so that the temperature required for the thermal decomposition of the semiconductor layer at the interface with the substrate is achieved for a short time.
  • the total energy input into the semiconductor layer and the associated increase in temperature of the semiconductor layer as a whole must be kept so low that the connection with the carrier is not impaired.
  • a melting of a solder joint between the carrier and the semiconductor layer is to be avoided, since otherwise there is a risk that the substrate is detached from the semiconductor layer during the detachment process and not as desired.
  • a spatially Gaussian beam profile is advantageous in a separation with laser pulses having a pulse duration less than or equal to 10 ns.
  • a temperature difference arises in the semiconductor layer between the irradiated area within the laser pulse and the non-irradiated area, which leads to mechanical stresses due to the correspondingly different thermal expansion in the lateral direction.
  • the slope of the spatial beam profile increases, so does the thermal gradient and, ultimately, the risk that the mechanical stresses cause cracks in the semiconductor layer.
  • a Gaussian spatial beam profile has proven to be advantageous, wherein the edge steepness is to be chosen so that cracks in the semiconductor layer can be avoided.
  • a Lorentz profile, a Hypergaußprofil each with a corresponding edge steepness or further a profile with gaussian, lorentz- or hypergaußianon flanks could be used as a beam profile.
  • a semiconductor layer is separated from a substrate by irradiation with laser pulses whose pulse duration is less than or equal to 10 ns, the laser pulses having a spatial beam profile, preferably a Gaussian beam profile, whose edge steepness is chosen so small that in the separation of semiconductor layer and substrate cracks in the semiconductor layer, which are caused by thermally induced lateral stresses, are avoided.
  • the laser pulses are preferably generated by a solid-state laser with an Nd-doped laser-active medium, in particular Nd: YAG or else Nd: YLF or Nd: KGW.
  • the main emission wavelength is about 1060nm (e.g., 1064nm for Nd: YAG), so that a wavelength for the ablation-favorable wavelength in the ultraviolet spectral region can be achieved by frequency tripling by means of a nonlinear optical element.
  • the wavelength of the laser pulses used for the separation is preferably between 200 nm and 400 nm, particularly preferably between 300 nm and 400 nm.
  • the laser pulses can also be generated by means of an excimer laser.
  • excimer lasers with a noble gas-halogen compound as the laser medium are characterized by a favorable emission wavelength in the ultraviolet spectral range and a high peak pulse power, which is typically between 1 kW and 100 MW.
  • a corresponding beam shaper is to be provided which converts the beam profile into a spatial beam profile with sufficiently flat flanks, preferably a Gaussian beam profile.
  • the direct interface region between the semiconductor layer and the substrate is preferably irradiated with the laser pulses, so that the radiation energy is absorbed close to the surface and leads there to material decomposition.
  • the absorption of the laser radiation in the semiconductor layer is generally much greater than in the substrate, so that the laser beam penetrates the substrate almost lossless and is absorbed near the surface in the semiconductor layer due to the high absorption.
  • the radiation absorption need not necessarily occur at the site of material decomposition.
  • the decomposition of the material may also be effected by first absorbing the radiation at another location and subsequently carrying out an energy transport of the absorbed radiant energy to the site of decomposition of the material.
  • the radiation could also be absorbed in the substrate and subsequently the radiant energy be transported to the semiconductor layer.
  • a preferred development of the invention is the semiconductor layer before the separation from the substrate be structured such that the semiconductor layer is divided into a plurality of individual semiconductor body.
  • trench-shaped depressions may be formed in the semiconductor layer which laterally surround the semiconductor bodies to be formed and preferably extend to the substrate in the depth.
  • Such depressions can be produced, for example, by means of a suitable etching process.
  • the semiconductor layer is advantageously at least partially interrupted in the lateral direction. This allows mechanical stresses in the semiconductor layer to be reduced.
  • the semiconductor layer or the semiconductor bodies are subsequently provided with a passivation layer.
  • This passivation layer protects the side surfaces of the semiconductor bodies exposed by the structuring.
  • an electrically nonconducting passivation layer is advantageous in order to avoid a short circuit of the semiconductor layer due to electrically conductive material which can reach the exposed side surfaces of the semiconductor bodies during subsequent processing steps.
  • the semiconductor layer with the side remote from the substrate applied to a support preferably soldered
  • a solder joint is characterized by a high thermal and electrical conductivity compared to conventional adhesive compounds.
  • the solder used is preferably a gold-containing solder, for example a gold-tin solder.
  • a gold-tin solder for example a gold-tin solder.
  • gold-tin solders with a high gold content for example between 65% by weight and 85% by weight.
  • the melting temperature of such a solder is typically 278 ° C and is thus greater than the temperature that usually arises when soldering an electrical component.
  • the soldering temperature when soldering to a printed circuit board is usually less than 260 ° C. This prevents the semiconductor body from becoming detached from the carrier part during soldering of the component.
  • solder for example, a palladium-indium solder whose constituents mix at a relatively low initial temperature of about 200 ° C, and having an advantageous high melting temperature of about 660 ° C after mixing.
  • Such a compound can be produced, for example, by depositing a gold layer on the semiconductor layer and a gold-tin layer on the carrier, and subsequently joining the carrier and the semiconductor layer together.
  • further layers can be provided between the semiconductor layer and the metal layer, which ensure, for example, protection of the semiconductor layer or good adhesion.
  • the semiconductor layer on the side facing the carrier with a contact metallization before being soldered onto the carrier.
  • a contact metallization for example, a platinum-gold metallization is suitable for this purpose.
  • the coefficient of thermal expansion of the carrier is selected in accordance with the thermal expansion coefficient of the semiconductor layer and / or the thermal expansion coefficient of the substrate and the pulse duration of the laser pulses.
  • a coordination of the coefficients of thermal expansion means that their difference is so small that no damage to the semiconductor layer and the carrier occurs in the temperature range occurring during production or in operation.
  • stresses between substrate, semiconductor layer and carrier during production can thereby be significantly reduced. The risk of cracking in the carrier and in the semiconductor layer is thus greatly reduced.
  • temperatures reached at the semiconductor surface drop significantly over the layer thickness of the semiconductor layer, temperatures of about 200 ° C. to 400 ° C. are still reached on the carrier side of the semiconductor layer in the region of the laser pulse.
  • temperatures of about 200 ° C. to 400 ° C. are still reached on the carrier side of the semiconductor layer in the region of the laser pulse.
  • the invention preferably uses support materials whose thermal properties are specially adapted to the release process.
  • the carrier material such that the coefficient of thermal expansion of the carrier is closer to the coefficient of thermal expansion of the semiconductor layer than to the thermal expansion coefficient of the substrate. With such a choice, the formation of cracks in the semiconductor layer can be effectively reduced or avoided altogether.
  • the adaptation of the thermal properties of substrate, carrier and semiconductor layer is advantageous for as complete and residue-free detachment.
  • the invention also has the advantage that due to the short pulse duration less than or equal to 10 ns, the requirements for this adjustment of the thermal properties are lower than in conventional methods with a longer pulse duration.
  • the invention can serve on the one hand to achieve the best possible detachment.
  • carrier materials may advantageously be used which are suitable, although not optimal, in their thermal properties, but have other desirable properties such as easier processability for further process steps, easier availability in larger dimensions or lower costs.
  • Nitride compound semiconductors are, for example, nitride compounds of elements of the third and / or fifth main group of the periodic table of the chemical elements such as GaN, AlGaN, InGaN, AlInGaN, InN or AlN.
  • the semiconductor layer may also comprise a plurality of individual layers of different nitride compound semiconductors.
  • the semiconductor layer may have a conventional pn junction, a double heterostructure, a single quantum well structure (SQW structure) or a multiple quantum well structure (MQW structure).
  • SQW structure single quantum well structure
  • MQW structure multiple quantum well structure
  • supports which contain gallium arsenide, silicon, germanium, copper, iron, nickel, molybdenum, cobalt or tungsten or an alloy, for example based on iron, nickel and / or cobalt, are suitable.
  • silicon, silicon carbide or aluminum oxide or sapphire substrates are suitable substrates for the epitaxial production of nitride compound semiconductor layers, with sapphire substrates advantageously being permeable to the laser radiation used for separating the semiconductor layer, in particular in the ultraviolet spectral range. This allows for the replacement of the half liter layer one Irradiation of the semiconductor layer through the substrate.
  • the method according to the invention can be advantageously applied to thin-film chips (synonym: thin-film chips), which typically have a semiconductor layer with a thickness below about 50 ⁇ m.
  • the thin-film chip may be, for example, an optoelectronic chip, in particular a radiation-generating chip, such as a light-emitting diode chip.
  • a basic principle of a thin-film light-emitting diode chip is, for example, in I. Schnitzer et al., Appl. Phys. Lett. 63 (16), 18 October 1993, 2174-2176 described, the disclosure of which is hereby incorporated by reference. It should be noted that while the present invention particularly pertains to, but is not limited to, thin film light emitting diode chips. Rather, the present invention is suitable in addition to thin-film light-emitting diode chips for all other thin-film semiconductor body.
  • a semiconductor layer 2 is applied to a substrate 1.
  • This may be a nitride compound semiconductor layer, for example, an InGaN layer epitaxially grown on a sapphire substrate.
  • the semiconductor layer 2 may also include a plurality of single layers, which may include, for example, GaN, AlN, AlGaN, InGaN, InN, or InAlGaN and grown successively on the substrate 1.
  • the semiconductor layer 2 is provided with a contact metallization 3 on the side facing away from the substrate.
  • the contact metallization 3 can, for example, be vapor-deposited or sputtered in the form of a thin layer containing gold and / or platinum.
  • the solder 5 used is preferably a gold-containing solder, for example a gold-tin solder having a gold content of between 65% by weight and 85% by weight, preferably 75% by weight.
  • a solder joint is characterized by a high thermal conductivity and high stability under thermal cycling.
  • gallium arsenide wafer having a coefficient of thermal expansion similar to that of sapphire can be used as carrier 4.
  • a carrier 4 is provided in the form of a bonding wafer made of molybdenum.
  • molybdenum is sufficiently tough so that cracks in the molybdenum bond wafer do not occur during bonding and cooling from the bonding temperature to room temperature.
  • a germanium wafer can also be used in the invention.
  • the coefficient of thermal expansion of germanium is similar to that of gallium arsenide, so that there is little difference in this regard.
  • a germanium wafer has the advantage over a gallium arsenide wafer that it can be sawn more easily, with no arsenic-containing, toxic sawing waste occurring in particular.
  • germanium wafers are mechanically more stable. Thus, for example, with a 200 ⁇ m thick germanium wafer already sufficient stability is achieved, whereas the thickness of a corresponding Galliumarsenid wafer is greater than 600 ⁇ m.
  • germanium wafer in a further process step by To thin out loops.
  • germanium wafers are generally much less expensive than gallium arsenide wafers.
  • a gold-containing solder or gold itself is used as the solder.
  • a gold-doped germanium wafer which may optionally be provided with a gold-antimony surface layer provided.
  • the semiconductor layer 2 is irradiated through the substrate 1 with laser pulses 6.
  • the radiation energy is mainly absorbed in the semiconductor layer 2 and causes a material decomposition at the interface between the semiconductor layer 2 and the substrate 1, so that subsequently the substrate 1 can be lifted off
  • Figure 1e The laser pulses 6 are generated by a Q-switched Nd: YAG laser and frequency-tripled by means of a non-linear optical element, so that laser pulses 6 having a wavelength of about 355 nm are irradiated onto the semiconductor layer 2.
  • the pulse duration of the laser pulses is 7 ns or in a variant 10 ns.
  • the energy of the laser pulses is so dimensioned that the energy density in the spatial center of the laser pulse is between 100 mJ / cm 2 and 1000 mJ / cm 2 , preferably between 200 mJ / cm 2 and 400 mJ / cm 2 .
  • the irradiated and near the surface absorbed in the semiconductor layer radiation energy is chosen so that locally at the interface between the substrate 1 and the semiconductor layer 2, a high, sufficient for decomposition of the material temperature is formed over the layer thickness the semiconductor layer falls so far that the connection 5 between the carrier 4 and that of the semiconductor layer is not impaired, for example melts.
  • This is achieved by the short pulse duration of the laser pulses of less than or equal to 10 ns.
  • the beam profile is to be adapted so that no cracks occur in the layer to be detached.
  • the transverse beam profile of the laser pulses is in FIG. 2 shown. Plotted is the beam intensity along the line AA.
  • the beam profile is approximately Gaussian. In connection with said short pulse duration, such a beam profile has proven to be advantageous, since the lateral flanks do not drop too abruptly and thus a smooth transition between the irradiated and the adjacent, non-irradiated region arises. This reduces the lateral temperature gradient and, as a consequence, mechanical stresses and cracking in the semiconductor layer.
  • the edge steepness of the beam profile is chosen so low that during the separation cracks due to thermally induced mechanical stresses are avoided.
  • a suitable edge steepness can be determined experimentally, for example, in that the edge steepness, for example by means of the diameter of the laser pulse, is varied stepwise at a constant energy density in the center of the laser pulse and is assessed in each case on the basis of a sample irradiated therewith, as desired, cracks during the detachment process are avoided. If necessary, several experiments should be carried out and evaluated statistically.
  • FIG. 3 another embodiment of the invention is shown.
  • a semiconductor layer 2 is first applied to a substrate 1.
  • the semiconductor layer 2 may include one or more nitride compound semiconductors as in the first embodiment, comprise a plurality of single layers, and may be grown on a sapphire substrate.
  • This semiconductor layer preferably serves to generate radiation and has a corresponding active radiation-generating zone 11.
  • the semiconductor layer is first provided on top with contact metallization 9.
  • the semiconductor layer is subsequently structured, wherein a plurality of depressions 8 are formed up to the substrate in the semiconductor layer. These recesses 8 laterally surround the semiconductor bodies 7 to be formed. For example, such depressions 8 can be etched into the semiconductor layer.
  • This chip structuring has the advantage that a certain flexibility arises through the recesses 8 in the lateral direction and thus mechanical stresses in the semiconductor layer can be reduced.
  • a preferably electrically insulating passivation layer 10, for example a silicon nitride layer, for protecting the semiconductor surfaces is applied to the semiconductor layer 2 or the semiconductor bodies 7.
  • this passivation layer 10 also covers the side surfaces of the semiconductor bodies exposed by the depressions. This prevents that in subsequent steps electrically conductive material reaches the exposed side surfaces and short-circuits, for example, the active layer. Otherwise, during subsequent soldering of the carrier solder, the side surfaces could become wet, or residues on subsequent detachment of the substrate, such as metallic gallium in GaN-based layers, could adhere to the side surfaces and cause such a short circuit.
  • the passivation layer 10 is preferably dimensioned so that a layer-like covering of the exposed side surfaces and substrate regions takes place, wherein a complete filling of the recesses is avoided. A covering of the contact metallization (not shown) with the passivation layer is removed again.
  • the semiconductor layer 2 or the semiconductor body 7 and the optionally intermediate regions 8 as in the Figure 1d shown embodiment with laser pulses of a pulse duration less than or equal to 10 ns and a sufficiently low edge steepness in the beam profile steels.
  • FIG. 3e the substrate is already related to Figure 1e described lifted and removed.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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EP14190109.0A 2003-01-31 2004-01-27 Procédé de fabrication d'un élément semi-conducteur Ceased EP2894678A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10303977A DE10303977A1 (de) 2002-01-31 2003-01-31 Verfahren zur Herstellung eines Halbleiterbauelements
EP04705373.1A EP1588414B1 (fr) 2003-01-31 2004-01-27 Procede de separation d'une couche semiconductrice au moyen de pulses laser

Related Parent Applications (2)

Application Number Title Priority Date Filing Date
EP04705373.1A Division EP1588414B1 (fr) 2003-01-31 2004-01-27 Procede de separation d'une couche semiconductrice au moyen de pulses laser
EP04705373.1A Division-Into EP1588414B1 (fr) 2003-01-31 2004-01-27 Procede de separation d'une couche semiconductrice au moyen de pulses laser

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EP2894678A1 true EP2894678A1 (fr) 2015-07-15

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EP14190109.0A Ceased EP2894678A1 (fr) 2003-01-31 2004-01-27 Procédé de fabrication d'un élément semi-conducteur

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US (1) US8524573B2 (fr)
EP (2) EP1588414B1 (fr)
JP (1) JP4662918B2 (fr)
KR (1) KR101247727B1 (fr)
CN (1) CN100530705C (fr)
TW (1) TWI247368B (fr)
WO (1) WO2004068572A2 (fr)

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US8524573B2 (en) 2013-09-03
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