EP2600390B1 - Chip manufacturing method - Google Patents

Chip manufacturing method Download PDF

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Publication number
EP2600390B1
EP2600390B1 EP11812308.2A EP11812308A EP2600390B1 EP 2600390 B1 EP2600390 B1 EP 2600390B1 EP 11812308 A EP11812308 A EP 11812308A EP 2600390 B1 EP2600390 B1 EP 2600390B1
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EP
European Patent Office
Prior art keywords
modified region
modified
laser light
silicon
main face
Prior art date
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EP11812308.2A
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German (de)
English (en)
French (fr)
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EP2600390A4 (en
EP2600390A1 (en
Inventor
Hideki Shimoi
Keisuke Araki
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Hamamatsu Photonics KK
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Hamamatsu Photonics KK
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/04—Automatically aligning, aiming or focusing the laser beam, e.g. using the back-scattered light
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4885—Wire-like parts or pins
    • H01L21/4896—Mechanical treatment, e.g. cutting, bending
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate

Definitions

  • the present invention relates to a method for manufacturing a chip constituted by a functional device formed on a substrate.
  • WO 2005/094320 A2 relates to a method of separating layers of material using a lift off process.
  • JP 2004 259846 A relates to a method of separation of elements formed on a substrate.
  • Patent Literature 1 Japanese Patent Application Laid-Open No. 2004-343008
  • the above-mentioned prior art thins the object by polishing it as mentioned above and thus is very hard to handle the object when manufacturing very thin chips, for example. Further, since the polished object has flexibility because of its thinness, the object is not easy to flatten when forming functional devices on the object, which also makes it hard to handle the object. Therefore, it is strongly desired for the above-mentioned prior art to be able to manufacture chips having a desirable thickness easily.
  • This chip manufacturing method forms the first and second modified regions in the object and selectively advances etching along the first and second modified regions, so as to cut out a part of the object and form the substrate. As a result, a chip having a desirable thickness is formed without thinning the object by polishing. This can make it easier to handle the object and easily manufacture chips having a desirable thickness.
  • the etching step cuts out a part of the object on the one main face side as the substrate.
  • the first and second modified region forming steps may be performed after the functional device forming step, and the first and second modified region forming steps may cause the laser light to enter the object from the other main face on the opposite side from the one main face and converge. This can inhibit the functional device from being irradiated with the laser light when forming the first and second modified regions and thus can restrain the irradiation with the laser light from influencing the functional device (i.e., the presence of the functional device from influencing the laser beam).
  • the functional device forming step may be performed after the first and second modified region forming steps. This forms the first and second modified regions before forming the functional device, whereby the irradiation with the laser light becomes easier when forming the first and second modified regions.
  • the functional device forming step may be performed after the first modified region forming step, and the second modified region forming step may be performed after the functional device forming step.
  • the etching step cuts the other main face side on the opposite side from the one main face in the object so as to thin the object and severs the thinned object along the second modified region so as to form the substrate.
  • the present invention can easily manufacture chips having a desirable thickness.
  • the chip manufacturing method in accordance with an embodiment converges a laser light into a object to be processed, so as to form a modified region. Therefore, the forming of the modified region will firstly be explained in the following with reference to Figs. 1 to 6 .
  • a laser processing device 100 comprises a laser light source 101 which causes a laser light (processing laser beam) L to oscillate in a pulsating manner, a dichroic mirror 103 arranged such as to change the direction of the optical axis of the laser light L by 90°, and a condenser lens 105 for converging the laser light L.
  • a laser light source 101 which causes a laser light (processing laser beam) L to oscillate in a pulsating manner
  • a dichroic mirror 103 arranged such as to change the direction of the optical axis of the laser light L by 90°
  • a condenser lens 105 for converging the laser light L.
  • the laser processing device 100 also comprises a support table 107 for supporting a object to be processed 1 irradiated with the laser light L converged by the condenser lens 105, a stage 111 for moving the support table 107, a laser light source controller 102 for controlling the laser light source 101 in order to regulate the output, pulse width, and the like of the laser light L, and a stage controller 115 for controlling the movement of the stage 111.
  • the laser light L emitted from the laser light source 101 changes the direction of its optical axis by 90° with the dichroic mirror 103 and then is converged by the condenser lens 105 into the object 1 mounted on the support table 107.
  • the stage 111 is shifted, so that the object 1 moves relative to the laser light L along a line to form a modified region 5. This forms a modified region in the object 1 along the line 5.
  • the line 5 is set in the object 1, for which a semiconductor material, a piezoelectric material, or the like is used.
  • the line 5 is a virtual line extending straight.
  • the laser light L is relatively moved along the line 5 (i.e., in the direction of arrow A in Fig. 2 ) while locating a converging point P within the object 1 as illustrated in Fig. 3 .
  • This forms a modified region 7 within the object 1 along the line 5 as illustrated in Figs. 4 to 6 , whereby the modified region 7 becomes a removing region 8 to be removed by etching which will be explained later.
  • the converging point P is a position at which the laser light L is converged.
  • the line 5 may be curved instead of being straight, shaped into a three-dimensional form combining them, or specified in terms of coordinates.
  • the modified region 7 may be formed either continuously or intermittently.
  • the modified region 7 may be formed like lines or dots. It will be sufficient if the modified region 7 is formed at least within the object 1. There are cases where fractures are formed from the modified region 7 acting as a start point, and the fractures and modified region 7 may be exposed at outer surfaces (the front face, rear face, and side faces) of the object 1.
  • the laser light L is absorbed in particular in the vicinity of the converging point within the object 1 while being transmitted therethrough, whereby the modified region 7 is formed in the object 1 (i.e., internal absorption type laser processing).
  • the processing region gradually progresses from the front face 3 side to the rear face side in general.
  • the modified region 7 in accordance with this embodiment means regions whose physical characteristics such as density, refractive index, and mechanical strength have attained states different from those of their surroundings.
  • Examples of the modified region 7 include molten processed regions, crack regions, dielectric breakdown regions, refractive index changed regions, and their mixed regions.
  • Further examples of the modified region 7 include an area where the density has changed from that of an unmodified region in a material of the object 1 and an area formed with a lattice defect (which may collectively be referred to as a high-density transitional region).
  • the molten processed regions, refractive index changed regions, areas where the modified region has a density different from that of the unmodified region, or areas formed with a lattice defect may further incorporate a fracture (cut or microcrack) therewithin or at an interface between the modified region 7 and an unmodified region.
  • the incorporated fracture may be formed over the whole surface of the modified region 7 or in only a part or a plurality of parts thereof. Examples of the object 1 include those containing or constituted by silicon.
  • this embodiment forms the modified region 7 in the object 1 and then etches the object 1, so as to advance the etching selectively along the modified region 7 (i.e., along the modified region 7, fractures included in the modified region 7, or fractures from the modified region 7), thereby removing a part extending along the modified region 7 in the object 1.
  • fractures are also known as cracks, microcracks, fractures, and the like (hereinafter simply referred to as "fractures").
  • etching for example, a capillary action or the like is utilized so that fractures included in the modified region 7 of the object 1 or fractures from the modified region 7 are impregnated with an etchant, so as to advance (develop) the etching along fracture surfaces.
  • etching rate of the modified region 7 itself is high, the etching is selectively advanced along the modified region 7, so as to remove it.
  • etching examples include a case where the object 1 is immersed in the etchant (dipping) and a case where the object 1 is coated with the etchant while being rotated (spin etching).
  • the etching herein includes isotropic etching and anisotropic etching.
  • the etchant examples include KOH (potassium hydroxide), TMAH (aqueous tetramethylammonium hydroxide solution), EDP (ethylenediamine pyrocatechol), NaOH (sodium hydroxide), CsOH (cesium hydroxide), NH 4 OH (ammonium hydroxide), and hydrazine.
  • the etchant to be used is not limited to liquids but may be in the form of a gel (jelly or semisolid).
  • the etchant is used at a temperature ranging from ambient temperature to about 100°C, which is set appropriately according to a required etching rate or the like.
  • the temperature is preferably about 60°C.
  • the isotropic etching is applicable to relatively thin objects (having a thickness of 10 ⁇ m to 100 ⁇ m, for example), so that the etching can advance isotropically independent of the crystal orientation and the modified region.
  • the etchant travels through the fracture to wet the inside, so that the whole surface in the thickness direction becomes a start point for the modified region, whereby a chip etched such that its cut surface is depressed into a semicircular form can be taken out.
  • the anisotropic etching is applicable not only to relatively thin objects but also to thick ones (having a thickness of 800 ⁇ m to 100 ⁇ m, for example).
  • the etching can be advanced along the modified region. That is, the anisotropic etching herein enables not only the etching of the plane direction in conformity to the crystal orientation, but also the etching independent of the crystal orientation.
  • Figs. 7 to 9 are flow diagrams for explaining this embodiment. As illustrated in Figs. 7 to 9 , this embodiment converges the laser light L into the object 1, so as to form modified regions 7, forms functional devices 15 and protective films 16 on a front face (one main face) 3 of the object 1, and then selectively advances etching along the modified regions 7, so as to cut out a part of the object 1 as substrates 11, thereby producing a plurality of chips 10 having a desirable thickness.
  • each chip 10 is an IC chip used for an IC tag, for example, and comprises the substrate 11, the functional device 15 formed on the front face 11a of the substrate 11, and the protective film 16.
  • the substrate 11 has an outer form shaped like a rectangular sheet with a predetermined thickness H, an example of its size being 5 mm (L) ⁇ 5 mm (W) ⁇ 150 ⁇ m (H) here.
  • the functional device 15 include semiconductor operating layers formed by crystal growth, light-receiving devices such as photodiodes, light-emitting devices such as laser diodes, and circuit devices formed as circuits.
  • the protective film 16 is an etch-resistant film such as an SiN (silicon nitride) film which is resistant to etching.
  • the object 1 is a silicon substrate which is transparent to the wavelength (e.g., 1064 nm) of the laser light L with which it is irradiated and has a thickness of 300 ⁇ m, for example, here.
  • the object 1 has the front face 3 and the rear face (the other main face) 21 on the opposite side from the front face 3, which are (100) planes.
  • a line to form a modified region is programmably set as being specified by three-dimensional coordinates in conformity to the outer forms of the substrates 11.
  • the thickness direction of the object 1 (the irradiation direction of the laser light L) to be the Z direction
  • one direction extending along the front face 3 of the object 1 to be the X direction
  • the direction orthogonal to the X and Z directions to be the Y direction.
  • the object 1 is mounted and held on a mount table with the front face 3 of the object 1 facing up. Subsequently, the object is irradiated (scanned) with the laser light L incident on the front face 3 in an on/off mode while locating the converging point of the laser light L (hereinafter simply referred to as "converging point") at a predetermined thickness H from the front face 3 and moving the converging point in the X direction. This scan is repeatedly performed while changing the position of the converging point in the Y direction.
  • the modified region 7a extending like a plane parallel to the front face 3 is formed at the predetermined thickness H from the front face 3 within the object 1 as one corresponding to the rear faces 11b of the substrates 11 (see Fig. 9 ).
  • modified regions (second modified regions) 7b extending such as to correspond to side edges of the substrates 11 as seen from the front face 3 and being exposed to the front face 3 are formed so as to join with the modified region 7a along the Z direction.
  • the modified regions 7b extending like grids as seen from the front face 3 are formed along the Z direction so as to reach the predetermined thickness H from the front face 3 as those corresponding to the side faces 11c of the substrates 11 (see Fig. 9 ).
  • the resulting modified regions 7a, 7b are constituted by modified spots.
  • the modified regions 7a, 7b and modified spots are formed such as to incorporate therein fractures generated from the modified regions 7a, 7b and modified spots (ditto in the following).
  • a plurality of functional devices 15 are formed on the front face 3 of the object 1, and a plurality of protective films 16 are formed so as to cover the functional devices 15.
  • the plurality of functional devices 15 are formed into a matrix on the front face 3 such that each of them is surrounded by the grid-like modified regions 7b when seen from the front face 3.
  • the plurality of protective films 16 are laid on the functional devices 15 at such intervals that the modified regions 7b are exposed to the front face 3 between the adjacent protective films 16.
  • the object 1 is etched. Specifically, as illustrated in Fig. 9 , the object 1 is immersed for about 60 min in an etchant 17, an example of which is KOH at 85°C (so-called wet etching). This lets the etchant enter and wet the modified regions 7b from the front face 3 side, so as to advance the etching inward selectively along the modified region 7a. Then, the etchant is caused to enter and wet the modified region 7a, so as to advance the etching selectively along the modified region 7a.
  • an etchant 17 an example of which is KOH at 85°C
  • the modified regions 7a, 7b are formed in the object 1, and the etching is selectively advanced along the modified regions 7a, 7b, so that only necessary parts of the object 1 are cut out as the substrates 11 of the chips 10, whereby the chips 10 having a desirable thickness are formed. Therefore, this embodiment can reduce the necessity for thinning the object 1 by polishing and the like, so as to make it easier to handle the object 1, whereby the chips 10 having a desirable thickness can be manufactured easily.
  • the form and thickness of the chips 10 can easily be controlled by regulating the positions at which the modified regions 7 are formed, the chips 10 can easily be made thinner and lighter, whereby very thin chips 10, for example, can also be manufactured easily. Since the chips 10 can be separated into individual pieces without any external stress applied thereto, the object 1 can be inhibited from breaking or lowering the strength upon application of external stresses. Since no cutting dust occurs upon processing as in the case of cutting, an environment-friendly processing method can be achieved. Further, it can shorten the processing time, thereby making it possible to provide inexpensive chips 10.
  • the polishing thickness becomes 50 ⁇ m or less at the time of processing the object 1 by polishing
  • its handling may be so difficult in particular that the object 1 is likely to break during the polishing step.
  • the modified regions 7a, 7b are formed before making the functional devices 15, irradiation with the laser light L becomes easier when forming the modified regions 7a, 7b.
  • Producing the functional devices 15 after forming the modified regions 7a, 7b can also inhibit the irradiation with the laser light L from adversely affecting the functional devices 15 (or the presence of the functional devices 15 from adversely affecting or restricting the laser light L) when forming the modified regions 7a, 7b.
  • this embodiment forms one modified region 7a at the predetermined thickness H from the front face 3 and the modified regions 7b extending along the Z direction and joining with the modified region 7a, this is not restrictive, whereby the modified regions 7a, 7b may be formed as follows, for example.
  • a plurality of modified regions 7a are formed at the predetermined depth H in the object 1 so as to be separated from each other.
  • the plurality of modified regions 7a are shaped into rectangular forms corresponding to the rear faces 11b of the substrates 11 as seen from the front face 3 here.
  • a plurality of modified regions 7b are formed such as to join with edge parts of their corresponding modified regions 7a and reach the front face 3 along the thickness direction.
  • each of the plurality of modified regions 7b is formed into a rectangular frame corresponding to the outer periphery of the substrate 11 when seen from the front face 3.
  • a plurality of chips 10 having a fixed thickness are manufactured so as to be cut out simultaneously from the object 1, this is not restrictive, whereby a plurality of chips 10 having thicknesses different from each other may be manufactured so as to be cut out simultaneously from the object 1.
  • forming the modified region 7a changing its thickness from the surface 3 stepwise so as to correspond to the individual chips 10 makes it possible to manufacture a plurality of chips 10 having desirable thicknesses different from each other from a single object 1.
  • Fig. 11 is a flow diagram for explaining this embodiment.
  • this embodiment forms a plurality of functional devices 15 on the front face 3 of the object and a plurality of protective films 16 so as to cover the functional devices 15.
  • the object 1 is irradiated with the laser light L from the rear face 21 while moving the converging point, so as to form the modified regions 7a, 7b.
  • this embodiment also yields an effect similar to that mentioned above, i.e., the effect of easily manufacturing chips 10 having a desirable thickness.
  • this embodiment converges the laser light L while making it incident on the rear face 21 when forming the modified regions 7a, 7b and thus can restrain the functional devices 15 from being irradiated with the laser light L even when forming the modified regions 7a, 7b after making the functional devices 15, thereby inhibiting the irradiation with the laser light L from adversely affecting the functional devices 15 (or the presence of the functional devices 15 from adversely affecting or restricting the laser light L).
  • Fig. 12 is a flow diagram for explaining this embodiment.
  • this embodiment converges the laser light L at the object 1 while moving the converging point, so as to form the modified region 7a.
  • a plurality of functional devices 15 are formed on the front face 3 of the object 1, and a plurality of protective films 16 are produced so as to cover the functional devices 15.
  • the laser light L is converged at the object 1 while moving the converging point, so as to form the modified regions 7b.
  • this embodiment also yields an effect similar to that mentioned above, i.e., the effect of easily manufacturing chips 10 having a desirable thickness.
  • this embodiment forms the modified regions 7b after making the functional devices 15 and thus can inhibit the object 1 from being unintentionally cut along the modified regions 7b by an external force, for example, when forming the functional devices 15.
  • forming the modified regions 7b after making the modified region 7a can restrain the object 1 from being unintentionally cut along the modified regions 7b when producing the modified region 7a.
  • this embodiment can favorably attain a gettering effect by the modified region 7a, i.e., the effect of trapping and anchoring impurities of the object 1 by the modified region 7a.
  • Fig. 13 is a flow diagram for explaining this embodiment. As illustrated in Fig. 13(a) , this embodiment converges the laser light L at the object 1 while moving the converging point, so as to form modified regions 7a', 7b'.
  • the modified region (first modified region) 7a' is continuously formed at a predetermined depth corresponding to the predetermined thickness H from the front face 3 in the object 1 along the front face 3 so as to be exposed at a side face 23 of the object 1.
  • the modified region 7a' has a planar form parallel to the front face 3 so as to reach the side face 23 while being located at the predetermined thickness H from the front face 3 within the object 1.
  • the modified regions 7b' extend like grids when seen from the front face 3.
  • the modified regions 7b' are formed along the Z direction such as to be exposed to the front face 3 and rear face 21 and join with the modified region 7a'.
  • a plurality of functional devices 15 are formed on the front face 3 of the object 1, and a protective film 16' is produced so as to cover the functional devices 15.
  • the protective film 16' which is an etch-resistant film resistant to etching, is formed throughout the front face 3 of the object 1.
  • the object 1 is mounted and held on a tape material 19 such as an expandable tape with the rear face 21 facing up.
  • the object 1 is etched.
  • This causes the etchant to enter the modified region 7a' from the side face 23 side and the modified regions 7b' from the rear face 21 side, so as to advance the etching selectively along the modified regions 7a', 7b'.
  • the part of the object 1 extending along the modified region 7a' is removed, so that the object 1 is cut away (cut out) and thinned on the rear face 21 side.
  • the parts extending along the modified regions 7b' in the thinned object 1 are removed, whereby the object 1 is cut into a plurality of substrates 11.
  • the tape material 19 is expanded, so that the protective film 16' is cut such as to separate a plurality of chips 10 into individual pieces, whereby the plurality of chips 10 are manufactured.
  • this embodiment also yields an effect similar to that mentioned above, i.e., the effect of easily manufacturing chips 10 having a desirable thickness.
  • this embodiment can also manufacture the chips 10 by cutting out and thinning the object 1 on the rear face 21 side by etching alone.
  • the laser light entrance surface for forming the modified regions 7 is not limited to the front face 3 of the object 1, but may be the rear face 21 of the object 1.
  • any of the modified regions 7a, 7b may be formed earlier, i.e., the modified regions 7a, 7b may be formed in any order.
  • the on/off irradiation with the laser light L in the above-mentioned embodiments may be performed not only by controlling the on/off of the emission of the laser light L, but also by opening/closing a shutter disposed on the optical path of the laser light L or by masking on/off the front face 3 of the object 1, for example.
  • the intensity of the laser light L may be controlled between an intensity at a threshold for forming the modified region 7 (processing threshold) or higher and an intensity lower than the processing threshold.
  • the above-mentioned embodiments are also applicable to processing a substrate into a desirable form, for example, manufacturing a mount board 50 in which wiring layers 53 are mounted within depressions 52a, 52b of a substrate 51 as illustrated in Fig. 14 .
  • the laser light L is converged at the object 1 while moving the converging point as illustrated in Fig. 14(a) .
  • This forms modified regions 7d, 7e along the front face 3 at predetermined depths corresponding to the respective depths of the depressions 52a, 52b from the front face 3 in the object 1.
  • modified regions 7f extending so as to correspond to side edges of the depressions 52a, 52b when seen from the front face 3 are formed on the front face 3 side of the object 1 so as to join with the modified regions 7d, 7e along the Z direction.
  • the object 1 is etched, so as to advance the etching selectively along the modified regions 7d to 7f, thereby cutting away a part of the object 1 so as to form the depressions 52a, 52b in the object 1, and thereafter the wiring layers 53 are mounted within the depressions 52a, 52b.
  • This can easily produce the mount board 50 in which the wiring layers 53 are formed in the depressions 52a, 52b having desirable depths and forms.
  • the present invention can easily manufacture chips having a desirable thickness.
EP11812308.2A 2010-07-26 2011-07-19 Chip manufacturing method Active EP2600390B1 (en)

Applications Claiming Priority (2)

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JP2010167440A JP5653110B2 (ja) 2010-07-26 2010-07-26 チップの製造方法
PCT/JP2011/066344 WO2012014716A1 (ja) 2010-07-26 2011-07-19 チップの製造方法

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EP2600390A1 EP2600390A1 (en) 2013-06-05
EP2600390A4 EP2600390A4 (en) 2016-05-18
EP2600390B1 true EP2600390B1 (en) 2019-08-21

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JP (1) JP5653110B2 (zh)
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Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120299219A1 (en) * 2011-05-27 2012-11-29 Hamamatsu Photonics K.K. Laser processing method
US20130344684A1 (en) * 2012-06-20 2013-12-26 Stuart Bowden Methods and systems for using subsurface laser engraving (ssle) to create one or more wafers from a material
US9499921B2 (en) 2012-07-30 2016-11-22 Rayton Solar Inc. Float zone silicon wafer manufacturing system and related process
US9404198B2 (en) * 2012-07-30 2016-08-02 Rayton Solar Inc. Processes and apparatuses for manufacturing wafers
US8809166B2 (en) * 2012-12-20 2014-08-19 Nxp B.V. High die strength semiconductor wafer processing method and system
US20150158117A1 (en) * 2013-12-05 2015-06-11 David Callejo Muñoz System and method for obtaining laminae made of a material having known optical transparency characteristics
ITAN20130231A1 (it) * 2013-12-05 2015-06-06 Munoz David Callejo Procedimento per ottenere una pluralita' di lamine da un lingotto di materiale con struttura monocristallina
JP2017071074A (ja) * 2015-10-05 2017-04-13 国立大学法人埼玉大学 内部加工層形成単結晶基板の製造方法、および、単結晶基板の製造方法
SG11201810376PA (en) 2016-05-27 2018-12-28 Hamamatsu Photonics Kk Production method for fabry-perot interference filter
JP6341959B2 (ja) 2016-05-27 2018-06-13 浜松ホトニクス株式会社 ファブリペロー干渉フィルタの製造方法
WO2018204206A2 (en) 2017-05-01 2018-11-08 Icu Medical, Inc. Medical fluid connectors and methods for providing additives in medical fluid lines
US11517732B2 (en) 2018-11-07 2022-12-06 Icu Medical, Inc. Syringe with antimicrobial properties
US20220044935A1 (en) * 2018-12-21 2022-02-10 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
KR102637161B1 (ko) * 2018-12-21 2024-02-16 도쿄엘렉트론가부시키가이샤 기판 처리 장치 및 기판 처리 방법
DE102019201438A1 (de) * 2019-02-05 2020-08-06 Disco Corporation Verfahren zum Herstellen eines Substrats und System zum Herstellen eines Substrats
JP7230650B2 (ja) * 2019-04-05 2023-03-01 Tdk株式会社 無機材料基板の加工方法、デバイス、およびデバイスの製造方法
WO2020213479A1 (ja) * 2019-04-19 2020-10-22 東京エレクトロン株式会社 処理装置及び処理方法
JP7427189B2 (ja) * 2020-01-31 2024-02-05 国立大学法人東海国立大学機構 レーザ加工方法、半導体部材製造方法、及び、レーザ加工装置
JP7405365B2 (ja) * 2020-01-31 2023-12-26 国立大学法人東海国立大学機構 レーザ加工方法、半導体部材製造方法、及び、レーザ加工装置
DE102020108247A1 (de) 2020-03-25 2021-09-30 Trumpf Laser- Und Systemtechnik Gmbh Grossvolumiges entfernen von material durch laser-unterstütztes ätzen

Family Cites Families (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04150212A (ja) 1990-10-09 1992-05-22 Seiko Epson Corp 水晶基板のエッチング加工方法
JP2873937B2 (ja) 1996-05-24 1999-03-24 工業技術院長 ガラスの光微細加工方法
JP4659300B2 (ja) 2000-09-13 2011-03-30 浜松ホトニクス株式会社 レーザ加工方法及び半導体チップの製造方法
JP4880820B2 (ja) 2001-01-19 2012-02-22 株式会社レーザーシステム レーザ支援加工方法
ATE362653T1 (de) 2002-03-12 2007-06-15 Hamamatsu Photonics Kk Methode zur trennung von substraten
CA2428187C (en) 2002-05-08 2012-10-02 National Research Council Of Canada Method of fabricating sub-micron structures in transparent dielectric materials
JP4150212B2 (ja) 2002-05-17 2008-09-17 パナソニック コミュニケーションズ株式会社 印刷システム
JP4329374B2 (ja) 2002-07-29 2009-09-09 パナソニック電工株式会社 発光素子およびその製造方法
JP4158481B2 (ja) 2002-10-21 2008-10-01 セイコーエプソン株式会社 レーザー加工方法およびその装置、並びにその装置を用いた穴あけ加工方法
JP2004160618A (ja) 2002-11-15 2004-06-10 Seiko Epson Corp マイクロマシン及びマイクロマシンの製造方法
JP4334864B2 (ja) 2002-12-27 2009-09-30 日本電波工業株式会社 薄板水晶ウェハ及び水晶振動子の製造方法
JP2004223586A (ja) 2003-01-24 2004-08-12 Institute Of Physical & Chemical Research 透明材料内部の処理方法
JP2004259846A (ja) * 2003-02-25 2004-09-16 Ogura Jewel Ind Co Ltd 基板上形成素子の分離方法
JP2004304130A (ja) 2003-04-01 2004-10-28 Seiko Epson Corp 半導体装置の製造方法
JP2004343008A (ja) 2003-05-19 2004-12-02 Disco Abrasive Syst Ltd レーザ光線を利用した被加工物分割方法
JP2004351494A (ja) 2003-05-30 2004-12-16 Seiko Epson Corp レーザーに対して透明な材料の穴あけ加工方法
JP2004359475A (ja) 2003-06-02 2004-12-24 Seiko Epson Corp 光学素子の製造方法及び光学装置
JP4182841B2 (ja) * 2003-08-28 2008-11-19 セイコーエプソン株式会社 単結晶基板の加工方法
JP2005086175A (ja) 2003-09-11 2005-03-31 Hamamatsu Photonics Kk 半導体薄膜の製造方法、半導体薄膜、半導体薄膜チップ、電子管、及び光検出素子
JP2005121915A (ja) 2003-10-16 2005-05-12 Seiko Epson Corp マイクロレンズ用凹部付き基板の製造方法、マイクロレンズ用凹部付き基板、マイクロレンズ基板、液晶パネル用対向基板、液晶パネルおよび投射型表示装置
JP2005121916A (ja) 2003-10-16 2005-05-12 Seiko Epson Corp レンチキュラレンズ用凹部付き基板の製造方法、レンチキュラレンズ用凹部付き基板、レンチキュラレンズ基板、透過型スクリーンおよびリア型プロジェクタ
JP2005144586A (ja) 2003-11-13 2005-06-09 Seiko Epson Corp 構造体の製造方法、液滴吐出ヘッド、液滴吐出装置
JP2005144622A (ja) 2003-11-18 2005-06-09 Seiko Epson Corp 構造体の製造方法、液滴吐出ヘッド、液滴吐出装置
JP2005152693A (ja) 2003-11-20 2005-06-16 Seiko Epson Corp 構造体の製造方法、液滴吐出ヘッド、液滴吐出装置
JP2005208175A (ja) 2004-01-20 2005-08-04 Seiko Epson Corp 光部品及びその製造方法、光モジュール、光通信装置、電子機器
JP2005206401A (ja) 2004-01-21 2005-08-04 Seiko Epson Corp 構造体の製造方法、液滴吐出ヘッド及び液滴吐出装置
US7202141B2 (en) * 2004-03-29 2007-04-10 J.P. Sercel Associates, Inc. Method of separating layers of material
JP2005294325A (ja) 2004-03-31 2005-10-20 Sharp Corp 基板製造方法及び基板製造装置
JP2005306702A (ja) 2004-04-26 2005-11-04 Namiki Precision Jewel Co Ltd テーパー形状を有する微小穴の形成方法
JP4694795B2 (ja) * 2004-05-18 2011-06-08 株式会社ディスコ ウエーハの分割方法
JP2005351774A (ja) 2004-06-10 2005-12-22 Seiko Epson Corp マイクロアレイ作製用ヘッドの製造方法、マイクロアレイ作製用ヘッドおよびマイクロアレイ作製用装置
JP4634089B2 (ja) 2004-07-30 2011-02-16 浜松ホトニクス株式会社 レーザ加工方法
JP4630971B2 (ja) 2004-12-21 2011-02-09 並木精密宝石株式会社 パルスレーザによる微小構造の形成方法
JP2006290630A (ja) 2005-02-23 2006-10-26 Nippon Sheet Glass Co Ltd レーザを用いたガラスの加工方法
JP2007036758A (ja) 2005-07-27 2007-02-08 Seiko Epson Corp Ａｔカット水晶振動片、その製造方法、及び水晶デバイス
JP2007101833A (ja) 2005-10-04 2007-04-19 Seiko Epson Corp マイクロレンズの製造方法、マイクロレンズ、空間光変調装置、スクリーン及びプロジェクタ
JP2007165850A (ja) * 2005-11-16 2007-06-28 Denso Corp ウェハおよびウェハの分断方法
US7838331B2 (en) * 2005-11-16 2010-11-23 Denso Corporation Method for dicing semiconductor substrate
WO2008146744A1 (ja) * 2007-05-25 2008-12-04 Hamamatsu Photonics K.K. 切断用加工方法
JP4612024B2 (ja) * 2007-07-27 2011-01-12 株式会社アマチ 回転表示装置
JP5225639B2 (ja) * 2007-09-06 2013-07-03 浜松ホトニクス株式会社 半導体レーザ素子の製造方法
JP5198887B2 (ja) * 2008-01-24 2013-05-15 株式会社ディスコ 積層型半導体装置の製造方法
JP2010021398A (ja) * 2008-07-11 2010-01-28 Disco Abrasive Syst Ltd ウェーハの処理方法
JP2010153590A (ja) * 2008-12-25 2010-07-08 Hamamatsu Photonics Kk 切断用加工方法
JP5614738B2 (ja) * 2010-01-26 2014-10-29 国立大学法人埼玉大学 基板加工方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

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CN103026468B (zh) 2015-11-25
JP2012028646A (ja) 2012-02-09
KR20130088746A (ko) 2013-08-08
TWI527101B (zh) 2016-03-21
CN103026468A (zh) 2013-04-03
TW201220378A (en) 2012-05-16
KR101914146B1 (ko) 2018-11-02
US20120135585A1 (en) 2012-05-31
EP2600390A4 (en) 2016-05-18
EP2600390A1 (en) 2013-06-05
JP5653110B2 (ja) 2015-01-14
US8802544B2 (en) 2014-08-12
WO2012014716A1 (ja) 2012-02-02

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