EP0055578A2 - Baugruppe für integrierte Schaltung - Google Patents

Baugruppe für integrierte Schaltung Download PDF

Info

Publication number
EP0055578A2
EP0055578A2 EP81306016A EP81306016A EP0055578A2 EP 0055578 A2 EP0055578 A2 EP 0055578A2 EP 81306016 A EP81306016 A EP 81306016A EP 81306016 A EP81306016 A EP 81306016A EP 0055578 A2 EP0055578 A2 EP 0055578A2
Authority
EP
European Patent Office
Prior art keywords
chip
pad
substrate
heat sink
thermal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP81306016A
Other languages
English (en)
French (fr)
Other versions
EP0055578A3 (de
Inventor
Chandler H. Mciver
Richard J. Banach
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of EP0055578A2 publication Critical patent/EP0055578A2/de
Publication of EP0055578A3 publication Critical patent/EP0055578A3/de
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736—Metallic materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3737—Organic materials with or without a thermoconductive filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09572—Solder filled plated through-hole in the final product
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10681—Tape Carrier Package [TCP]; Flexible sheet connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305—Affixing by adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections

Definitions

  • thermosetting plastic which is positioned between the chip and the chip pad of the substrate protects the active face of the chip and the inner lead bonds between the inner lead bonding sites and the I/O terminals of the chip from chemical and physical attack, as well as increasing the mechanical strengths of the inner lead bonds.
  • the thermal conductivity of the thermosetting plastic is improved significantly by including in the thermoplastic material a material that is thermally conductive but electrically a good insulator, such as alumina Al 2 O 3 , or beryllium oxide B O.
  • an I.C. package comprising a substrate, a chip pad formed on a surface of the substrate, a plurality of outer lead pads associated with the chip pad, and a heat sink pad formed on a surface of the substrate substantially opposite the chip pad; an I.C. chip having an active face and a plurality of I/0 terminals located on the active face; a plurality of flexible beam leads bonding the I/0 terminals to the outer lead pads characterized by means forming a thermal passage through the substrate interconnecting the chip pad with the heat sink pad; a thermal conductive material substantially filling the thermal passage; an electrically insulating thermally conductive thermosetting plasticspreform positioned on and substantially covering the chip pad, said I.C.
  • chip being positioned on the preform with its active face and the portions of the leads proximate the I/O terminals of the chip being encapsulated in the plastic material of the preform, said plastic material also being located between the leads and the outer edges of the face of the chip; and a heat sink bonded to the heat sink pad.
  • package 10 comprises a substrate 12, a preform 14, and an I.C. chip, or die, 16.
  • I.C. chip 16 is provided with a plurality of flexible beam leads 18, the number of leads 18 of a chip 16 varies as a function of the number of gates, the complexity or the degree of integration of chip 16, and ranges from 20 - 400 leads per chip, for example, for chips that are being produced at the present time, with the naximum number of leads per chip tending to increase with time.
  • I.C. chip L6 has a front, or active, face 20 with a plurality of I/O terminals, or bumps, 22, which is made of a good electrical conductor, such as gold or copper, for example. I/O terminals 22 are commonly located near the outer perimeter 24 of active face 20.
  • Each flexible beam lead 18 is provided with an inner lead bonding site.26 and an outer lead bonding site 28.
  • Beam leads 18 are made of a good electrical conductor, such as copper by a photolithographic technique, from a thin layer of copper foil which has been bonded or laminated to a segment of a strip of film.
  • leads 18 Prior to an I.C. chip 16 being mounted on substrate 12, leads 18 are bonded to the I/O terminals 22 on active face 20 with the inner lead bonding site 26 of each lead 18 being bonded by conventional thermocompression processes, or soldering, to an I/O terminal 22.
  • the bond, the electrical and mechanical connection, between an I/O terminal 22 and an inner lead bonding site 26 of lead 18 is defined as an inner lead bond.
  • Substrate 12 is preferably a multilayer printed circuit board having multiple lamina of a glass fiber filled plastic material on which electrically conductive runs are . photolithographically produced.
  • substrate 12 could be a multilayer substrate having an alumina base and a plurality of alternating layers of electrical conductors and dielectric layers. With an alumina base the conductor layers and lielectric layers are conventionally screen printed onto the base of the substrate or onto the immediately previously formed layer.
  • the top surface 32 of substrate 12 has formed on it a chip site or chip pad 34.
  • Associated Outer lead with chip pad 34 is a plurality of outer lead (CL) pads 30 which are positioned around the perimeter of chip pad 34.
  • OL pads 30 are made of a good electrical :onductor, such as gold or copper, in the preferred embodiment.
  • the naterial from which chip pad 34 is made is preferably a good thermal conductor, gold, copper, or aluminum, for example, to aid in dissipating heat produced by I.C. chip 16 which is mounted on pad 34.
  • Preform 14 is a small segment of a web of fiber glass, each of which segments has been coated with a suitable thermosetting plastic resin, such as a B-stage epoxy.
  • the web is made of one-mil diameter glass fiber filaments.
  • Sheets of the material from which the preform 14 is cut, or formed, are commercially available from Ablestik Laboratories of Gardena, CA, under the trade name Able Film 550K.
  • Preform 14 is sized so that it is substantially equal to, congruent with, chip pad 34 on which it is placed, or positioned. In the preferred embodiment, preform 14 has a thickness in the range of from 3-5 mils.
  • heat sink pad 38 On the back surface 36 of printed circuit board 12 a heat sink pad 38 is formed. Heat sink pad 38 is positioned so that it is substantially opposite chip pad 34. A plurality of thermal conduits, or thermal passages, 40 is formed through substrate 12 to interconnect chip pad 34 with heat sink pad 38. Typically, each passage is provided with a plated copper lining. In the preferred embodiment, five thermal passages 40 are provided or formed through substrate 12. Bonded to heat sink pad 38 is a heat sink 42 of a good thermal conductor, such as copper, aluminum, or the like. Heat sink pad 38 and the heat sink 42 are made so that they are substantially equal in area, or heat sink 42 substantially coincides with and covers heat sink pad 38 when positioned thereon. In the embodiment..
  • heat sink 42 which is partially broken away, is bonded to heat sink pad 38 by a thermally conductive plastic material which preferably is substantially the same type of material as the epoxy material of preform 14.
  • a thin layer of the epoxy bonding material is placed between heat sink 42 and heat sink pad 38.
  • Substrate 12 is heated to a temperature of substantially 180 0 C for substantially 30 minutes to finally cure the epoxy.
  • the epoxy substantially fills the thermal conduits, or passages, 40 and secures heat sink 42 to the heat sink pad 38.
  • Heat sink 42 is normally secured to the heat sink pad 38 and passages 40 filled with a suitable thermally conductive material prior to chip 16 being mounted on pad 34.
  • heat sink 42 on heat sink pad 38 as the initial step in the process of fabricating package 10.
  • a thin sheet of B-stage epoxy without a web of fiber glass filaments is cut to a size approximating that of heat sink pad 38 and heat sink 42.
  • Substrate 12 is heated to a temperature in the range of from 110° - 1200 C, at which temperature the thermosetting plastic material is tacky so that it will adhere to pad 38 when brought in contact with it.
  • Heat sink 42 is placed in contact with the tacky thermosetting plastic material to which the heat sink 42 will also-adhere.
  • Substrate 12 with heat sink 42 attached is then heated to a temperature of substantially 170° for approximately 20 minutes to partially cure the B-stage epoxy.
  • heat sink 42 is positioned so that it substantially directly overlies heat sink pad 38, which reduces the thermal impedance- ' between them, and the thermosetting plastic material flows into and substantially fills thermal passages 40 in substrate 30. Partial curing of the epoxy also prevents bubbles from being produced in the material, which is frequently the case if the substrate is heated immediately to a final curing temperature of substantially 180° C. The presence of bubbles in the thermosetting plastic material is obviously not desirable since their presence increases the thermal impedance of the material. After the partial curing of the thermoplastic material has been accomplished, there are then two courses of action with respect to bonding heat sink 42 to the heat sink pad 36 using a thermally conductive thermoplastic material.
  • One course of action is to wait and conduct the final cure of the epoxy binding heat sink 42 to heat sink pad 38 at the same time that the epoxy of preform 14 bonding chip 16 to chip pad 34.
  • the other is to finally cure the epoxy bonding heat sink 42 to pad 34 before mounting I.C. chip 16 on pad 34.
  • substrate 12 Prior to placing preform 14 on chip pad 34 of substrate 12, substrate 12 is preheated to a temperature in the range of from 110 0 to 120° C, at which temperature the thermosetting plastic material coating preform 14 becomes tacky so that it will adhere to the chip pad 34 on which it is placed.
  • Chip 16 is next placed on preform 14, with its active face 20 down or in contact with preform 14 and is pushed into the preform with a force in the range of from 25 to 50 grams to initiate encapsulation of active face 20 and the portions of leads 18 near or proximate chip 16 in the thermosetting plastic of preform 14.
  • the presence of the glass filaments of the web of preform 14 minimizes the possibility that the active face 20 of chip 16 will be forced into electrical, or mechanical, contact with the chip site 34 on which it is mounted, which could cause electrical shorts between the active face 20 of chip 16 or between chip face 20 and substrate 12.
  • Substrate 12 is then preheated to a temperature to partially cure the thermosetting plastic material of the preform to encapsulate the front face 20 as well as to bond chip 16 to chip site 34 and to cause the thermosetting plastic material to flow into any unoccupied portion of the thermal conductive passages 40 to make good low thermal impedance contact with the plastic material substantially filling them. While the viscosity of the thermosetting plastic is still sufficiently low, chip 16.
  • thermosetting plastic material of preform 14 is positioned so that the outer lead bonding site 28 of each flexible beam lead 18 will substantially overlie the OL pad 30 to which it is to be bonded. While the thermosetting plastic material of preform 14 is being partially cured, it will flow around the inner portions of the leads 18 between the active face 20 of each chip 16 with the result that the leads 18 will be physically isolated, or separated, from the outer edge or perimeter 24 of chip 16. Since the thermosetting plastic material of preform 14 is a good electrical insulator, its presence between the leads 18 and the front face 20 of chip 16 prevents edge shorts.
  • the outer lead bonding sites 28 of each lead 18 of chip 16 are preferably bonded to their corresponding OL pad 30 by the application of heat and pressure, thermocampression bonding, using a suitable tool as is well known Ln the art.
  • the outer lead bonding sites 28 have been pretinned with a solder compatible with the metal from which the OL pads 30 are Fabricated so that when the assembly is heated slightly above the temperature at which the solder melts, or reflows, a good solder bond is.. formed between outer lead bonding site 28 of a lead 18 and the OL pad 30 to wnich it. is bonded.
  • leads 18 to their corresponding OL pads 30 places leads 18 under slight compression which in turn causes the exposed portions of leads 18 to be slightly curved, or bent, away from the surface 32 of substrate 12.
  • package 10 is heated to a temperature of 180°C for substantially 30 minutes, which causes the thermosetting plastic of preform 14 to become completely, or finally, cured.
  • the plastic material of preform 14 which is the same material as that used to bond heat sink 42 to heat sink pad 38 and to fill conduits 40 is made a thermal conductor by loading, or mixing, with the thermosetting plastic, a good thermal conductor which is not a good electrical conductor, such as powdered alumina or beryllium oxide, as is well known in the art.
  • thermal passages 40 interconnecting the chip pad 34 and the heat sink pad 38 are copper plated.
  • Heat sink 42 is soldered to chip pad 38 by placing a thin sheet of a tin/lead solder, for example, between them.
  • Substrate 10 is heated to a temperature at which solder 44 will reflow to bond or solder heat sink 42 to heat sink pad 38. Since solder 44 will wet the copper plating of passages 40, solder 44 will flow into and substantially fill thermal passages 40.
  • the thermoplastic i material of the preform 14 will, while being cured, flow into the upper portions of the passages 40 to make contact with the upper surfaces of solder 44 filling the passages 40 to minimize the thermal impedance between then.
  • the embedment of Figure 2 is substantially the sane as that of the embodiment of Figure 1.
  • the method of mounting a chip 16 on a chip pad 34 is the same as that described with respect to Figure 1.
  • thermal passages 40 can be filled with copper so that each passage 40 will be essentially all copper.
  • the I.C. chip package ' - provides a path having minimal thermal impedance from chip face 20 of chip 16 to heat sink 42 so that the ability of package 10 to dissipate heat produced by chip 16 is maximized.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)
EP81306016A 1980-12-29 1981-12-22 Baugruppe für integrierte Schaltung Ceased EP0055578A3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/221,104 US4396936A (en) 1980-12-29 1980-12-29 Integrated circuit chip package with improved cooling means
US221104 1994-03-31

Publications (2)

Publication Number Publication Date
EP0055578A2 true EP0055578A2 (de) 1982-07-07
EP0055578A3 EP0055578A3 (de) 1983-02-16

Family

ID=22826371

Family Applications (1)

Application Number Title Priority Date Filing Date
EP81306016A Ceased EP0055578A3 (de) 1980-12-29 1981-12-22 Baugruppe für integrierte Schaltung

Country Status (6)

Country Link
US (1) US4396936A (de)
EP (1) EP0055578A3 (de)
JP (1) JPS57134953A (de)
KR (1) KR900004636B1 (de)
AU (1) AU545035B2 (de)
CA (1) CA1167571A (de)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2555812A1 (fr) * 1983-11-30 1985-05-31 Nec Corp Bloc de puces de circuits integres
WO1985005496A1 (en) * 1984-05-24 1985-12-05 Mbm Technology Limited Mounting semi-conductor chips
US4682270A (en) * 1984-05-18 1987-07-21 British Telecommunications Public Limited Company Integrated circuit chip carrier
EP0129966B1 (de) * 1983-04-22 1988-03-02 Cray Research, Inc. Schaltkreismodul mit Kühleinrichtung von hoher Wirksamkeit
EP0273556A1 (de) * 1986-12-22 1988-07-06 Trw Inc. Bauweise für Gehäuse eines integrierten Schaltkreises
EP0338447A2 (de) * 1988-04-21 1989-10-25 Bodenseewerk Gerätetechnik GmbH Vorrichtung zur Wärmeabfuhr von Bauelementen auf einer Leiterplatte
GB2219133A (en) * 1988-05-26 1989-11-29 Bergquist Company The Thermally conductive mounting for a semiconductor component
EP0376100A2 (de) * 1988-12-24 1990-07-04 Alcatel SEL Aktiengesellschaft Verfahren und Leiterplatte zum Montieren eines Halbleiter-Bauelements
EP0391057A2 (de) * 1989-04-07 1990-10-10 Motorola Inc. Thermischer Nebenschluss für einen elektronischen Schaltkreis
US5014904A (en) * 1990-01-16 1991-05-14 Cray Research, Inc. Board-mounted thermal path connector and cold plate
US5343359A (en) * 1992-11-19 1994-08-30 Cray Research, Inc. Apparatus for cooling daughter boards
EP0994640A2 (de) * 1998-09-17 2000-04-19 DaimlerChrysler AG Verfahren zur Herstellung von Schaltungsanordnungen
GB2352872A (en) * 1999-08-02 2001-02-07 Delphi Tech Inc Cooling a component mounted on a PCB
US6929975B2 (en) 2001-01-13 2005-08-16 Conti Temic Microelectronic Gmbh Method for the production of an electronic component
EP2390912A1 (de) * 2010-05-25 2011-11-30 Sunonwealth Electric Machine Industry Co., Ltd. Verfahren zum Zusammenbauen eines Kühlmoduls

Families Citing this family (99)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2512990B1 (fr) * 1981-09-11 1987-06-19 Radiotechnique Compelec Procede pour fabriquer une carte de paiement electronique, et carte realisee selon ce procede
US4483067A (en) * 1981-09-11 1984-11-20 U.S. Philips Corporation Method of manufacturing an identification card and an identification manufactured, for example, by this method
FR2519508A1 (fr) * 1981-12-31 1983-07-08 Thomson Csf Dispositif de refroidissement pour carte de circuit imprime et procede de fabrication d'un tel dispositif
FR2524712B1 (fr) * 1982-03-31 1985-06-07 Radiotechnique Compelec Circuit hyperfrequence a condensateur integre et application a un circuit d'alimentation
JPS5947746A (ja) * 1982-09-10 1984-03-17 Mitsubishi Electric Corp 混成集積回路装置
JPS5979417A (ja) * 1982-10-28 1984-05-08 Sony Corp 磁気ヘツド装置
CH660551GA3 (de) * 1982-12-27 1987-05-15
US4630096A (en) * 1984-05-30 1986-12-16 Motorola, Inc. High density IC module assembly
US4618739A (en) * 1985-05-20 1986-10-21 General Electric Company Plastic chip carrier package
US4835598A (en) * 1985-06-13 1989-05-30 Matsushita Electric Works, Ltd. Wiring board
US4750092A (en) * 1985-11-20 1988-06-07 Kollmorgen Technologies Corporation Interconnection package suitable for electronic devices and methods for producing same
US4684975A (en) * 1985-12-16 1987-08-04 National Semiconductor Corporation Molded semiconductor package having improved heat dissipation
US4771294A (en) * 1986-09-10 1988-09-13 Harris Corporation Modular interface for monolithic millimeter wave antenna array
IT1202657B (it) 1987-03-09 1989-02-09 Sgs Microelettronica Spa Procedimento di fabbricazione di un dispositivo modulare di potenza a semiconduttore e dispositivo con esso ottenento
KR970007840B1 (ko) * 1987-06-26 1997-05-17 미다 가쓰시게 반도체 장치
DE3738506A1 (de) * 1987-11-13 1989-06-01 Dornier System Gmbh Antennenstruktur
US4970579A (en) * 1988-09-21 1990-11-13 International Business Machines Corp. Integrated circuit package with improved cooling means
US5057903A (en) * 1989-07-17 1991-10-15 Microelectronics And Computer Technology Corporation Thermal heat sink encapsulated integrated circuit
US5559369A (en) * 1989-10-02 1996-09-24 Advanced Micro Devices, Inc. Ground plane for plastic encapsulated integrated circuit die packages
US5139973A (en) * 1990-12-17 1992-08-18 Allegro Microsystems, Inc. Method for making a semiconductor package with the distance between a lead frame die pad and heat spreader determined by the thickness of an intermediary insulating sheet
US5218215A (en) * 1990-12-19 1993-06-08 Vlsi Technology, Inc. Semiconductor device package having a thermal dissipation means that allows for lateral movement of the lead frame with respect to the housing without breakage of the thermal dissipation path
DE4107312A1 (de) * 1991-03-07 1992-09-10 Telefunken Electronic Gmbh Montageanordnung von halbleiterbauelementen auf einer leiterplatte
DE4111247C3 (de) * 1991-04-08 1996-11-21 Export Contor Ausenhandelsgese Schaltungsanordnung
US6111308A (en) * 1991-06-05 2000-08-29 Advanced Micro Devices, Inc. Ground plane for plastic encapsulated integrated circuit die packages
US5213868A (en) * 1991-08-13 1993-05-25 Chomerics, Inc. Thermally conductive interface materials and methods of using the same
EP0529837B1 (de) * 1991-08-26 1996-05-29 Sun Microsystems, Inc. Verfahren und Apparat zum Kühlen von Mehrchip-Moduln durch die vollständige Wärmerohr-Technologie
DE69225896T2 (de) * 1992-12-15 1998-10-15 Sgs Thomson Microelectronics Träger für Halbleitergehäuse
CA2120468A1 (en) * 1993-04-05 1994-10-06 Kenneth Alan Salisbury Electronic module containing an internally ribbed, integral heat sink and bonded, flexible printed wiring board with two-sided component population
US5390734A (en) * 1993-05-28 1995-02-21 Lytron Incorporated Heat sink
JP3030201B2 (ja) * 1994-04-26 2000-04-10 富士通株式会社 半導体装置の製造方法及び半導体装置の製造装置
JP2531382B2 (ja) * 1994-05-26 1996-09-04 日本電気株式会社 ボ―ルグリッドアレイ半導体装置およびその製造方法
US6169328B1 (en) 1994-09-20 2001-01-02 Tessera, Inc Semiconductor chip assembly
US5659952A (en) * 1994-09-20 1997-08-26 Tessera, Inc. Method of fabricating compliant interface for semiconductor chip
US5915170A (en) * 1994-09-20 1999-06-22 Tessera, Inc. Multiple part compliant interface for packaging of a semiconductor chip and method therefor
US6870272B2 (en) * 1994-09-20 2005-03-22 Tessera, Inc. Methods of making microelectronic assemblies including compliant interfaces
US5561322A (en) * 1994-11-09 1996-10-01 International Business Machines Corporation Semiconductor chip package with enhanced thermal conductivity
US6046076A (en) * 1994-12-29 2000-04-04 Tessera, Inc. Vacuum dispense method for dispensing an encapsulant and machine therefor
US5625227A (en) * 1995-01-18 1997-04-29 Dell Usa, L.P. Circuit board-mounted IC package cooling apparatus
US5616958A (en) * 1995-01-25 1997-04-01 International Business Machines Corporation Electronic package
US6175084B1 (en) 1995-04-12 2001-01-16 Denki Kagaku Kogyo Kabushiki Kaisha Metal-base multilayer circuit substrate having a heat conductive adhesive layer
US6252179B1 (en) * 1995-04-27 2001-06-26 International Business Machines Corporation Electronic package on metal carrier
JP3004578B2 (ja) * 1995-05-12 2000-01-31 財団法人工業技術研究院 熱放散増強のための多熱導伝路とパッケージ統合性及び信頼性向上のための縁の周りを囲むキャップからなる集積回路パッケージ
US5652463A (en) * 1995-05-26 1997-07-29 Hestia Technologies, Inc. Transfer modlded electronic package having a passage means
JPH0955459A (ja) * 1995-06-06 1997-02-25 Seiko Epson Corp 半導体装置
US5963796A (en) * 1996-07-29 1999-10-05 Lg Semicon Co., Ltd. Fabrication method for semiconductor package substrate and semiconductor package
US5877561A (en) * 1995-07-28 1999-03-02 Lg Semicon Co., Ltd. Plate and column type semiconductor package having heat sink
US6211572B1 (en) * 1995-10-31 2001-04-03 Tessera, Inc. Semiconductor chip package with fan-in leads
US6284563B1 (en) * 1995-10-31 2001-09-04 Tessera, Inc. Method of making compliant microelectronic assemblies
US5773895A (en) * 1996-04-03 1998-06-30 Intel Corporation Anchor provisions to prevent mold delamination in an overmolded plastic array package
JP2790122B2 (ja) * 1996-05-31 1998-08-27 日本電気株式会社 積層回路基板
US5708566A (en) * 1996-10-31 1998-01-13 Motorola, Inc. Solder bonded electronic module
US6686015B2 (en) 1996-12-13 2004-02-03 Tessera, Inc. Transferable resilient element for packaging of a semiconductor chip and method therefor
KR100244965B1 (ko) * 1997-08-12 2000-02-15 윤종용 인쇄회로기판과 볼 그리드 어레이 패키지의 제조 방법
US6265769B1 (en) 1997-11-13 2001-07-24 Texas Instruments Incorporated Double-sided chip mount package
US5939783A (en) * 1998-05-05 1999-08-17 International Business Machines Corporation Electronic package
US6350952B1 (en) * 1998-05-12 2002-02-26 Mitsubishi Gas Chemical Company, Inc. Semiconductor package including heat diffusion portion
JP3196762B2 (ja) 1999-04-20 2001-08-06 日本電気株式会社 半導体チップ冷却構造
DE19919781A1 (de) * 1999-04-30 2000-11-09 Wuerth Elektronik Gmbh Leiterplatte und Verfahren zu ihrer Anbringung
FR2796801B1 (fr) * 1999-07-23 2001-10-05 Valeo Electronique Assemblage du type comportant une carte a circuit imprime et une semelle formant drain thermique disposes sur une embase formant radiateur
JP3573034B2 (ja) * 1999-11-17 2004-10-06 日本電気株式会社 多層プリント配線板およびその放熱構造
JP3830726B2 (ja) * 2000-04-26 2006-10-11 松下電器産業株式会社 熱伝導基板とその製造方法およびパワーモジュール
DE10035399A1 (de) * 2000-07-19 2002-01-31 Alcatel Sa Subträger, elektronische Baugruppe und Verfahren zur Herstellung derselben
KR20020074073A (ko) * 2001-03-16 2002-09-28 엘지전자 주식회사 아이씨 방열구조
US6900383B2 (en) * 2001-03-19 2005-05-31 Hewlett-Packard Development Company, L.P. Board-level EMI shield that adheres to and conforms with printed circuit board component and board surfaces
US20030095388A1 (en) * 2001-11-16 2003-05-22 Jinbao Jiao Method and apparatus for securing a circuit board to a rigid surface
DE10214363A1 (de) * 2002-03-30 2003-10-16 Bosch Gmbh Robert Kühlanordnung und Elektrogerät mit einer Kühlanordnung
US6825817B2 (en) * 2002-08-01 2004-11-30 Raytheon Company Dielectric interconnect frame incorporating EMI shield and hydrogen absorber for tile T/R modules
JP2006518944A (ja) * 2003-02-25 2006-08-17 テッセラ，インコーポレイテッド バンプを有するボールグリッドアレー
TW200419752A (en) * 2003-03-18 2004-10-01 United Test Ct Inc Semiconductor package with heat sink
JP2005191536A (ja) * 2003-12-04 2005-07-14 Sharp Corp マイクロ波モノリシック集積回路実装基板、マイクロ波帯通信の送信専用のトランスミッタ装置および送受信用のトランシーバ装置
WO2006090847A1 (ja) * 2005-02-25 2006-08-31 Fujitsu Limited 光送受信装置
WO2006091793A1 (en) * 2005-02-25 2006-08-31 Tessera, Inc. Microelectronic assemblies having compliancy
DE102005022062A1 (de) * 2005-05-12 2006-11-16 Conti Temic Microelectronic Gmbh Leiterplatte
KR20060126070A (ko) * 2005-06-03 2006-12-07 삼성전자주식회사 구동 집적 회로칩 패키지 및 이를 구비한 표시 장치
KR100790990B1 (ko) * 2006-05-22 2008-01-03 삼성전자주식회사 냉각통로를 갖는 적층형 반도체 소자
US7749886B2 (en) 2006-12-20 2010-07-06 Tessera, Inc. Microelectronic assemblies having compliancy and methods therefor
JP4962228B2 (ja) * 2006-12-26 2012-06-27 株式会社ジェイテクト 多層回路基板およびモータ駆動回路基板
US20080218979A1 (en) * 2007-03-08 2008-09-11 Jong-Ho Park Printed circuit (PC) board module with improved heat radiation efficiency
KR100924554B1 (ko) * 2007-11-30 2009-11-02 주식회사 하이닉스반도체 플립 칩 패키지 및 이의 제조 방법
US8166650B2 (en) * 2008-05-30 2012-05-01 Steering Solutions IP Holding Company Method of manufacturing a printed circuit board
JP4789997B2 (ja) * 2008-11-20 2011-10-12 三菱電機株式会社 電子基板装置
JP2010245174A (ja) 2009-04-02 2010-10-28 Denso Corp 電子制御ユニット及びその製造方法
US8009429B1 (en) 2010-03-22 2011-08-30 Honeywell International Inc. Electrical component thermal management
JP4825919B1 (ja) * 2010-05-31 2011-11-30 株式会社東芝 電子機器
JP6079461B2 (ja) * 2013-06-12 2017-02-15 富士通株式会社 伝熱構造板、伝熱構造板モジュール及び海中機器
JP6307093B2 (ja) * 2013-11-20 2018-04-04 日立オートモティブシステムズ株式会社 電子制御装置、電子制御装置の製造方法
JP6316731B2 (ja) * 2014-01-14 2018-04-25 新光電気工業株式会社 配線基板及びその製造方法、並びに半導体パッケージ
US20150214179A1 (en) * 2014-01-28 2015-07-30 Infineon Technologies Ag Semiconductor device including flexible leads
JP2015177004A (ja) * 2014-03-14 2015-10-05 ミネベア株式会社 フレキシブルプリント基板
RU2599187C2 (ru) * 2014-12-08 2016-10-10 Открытое акционерное общество "Машиностроительный завод "Арсенал" (ОАО "МЗ "Арсенал") Артиллерийский автомат корабельной артиллерийской установки
RU2607700C2 (ru) * 2014-12-31 2017-01-10 Открытое акционерное общество "Машиностроительный завод "Арсенал" (ОАО "МЗ "Арсенал") Магазин корабельной артиллерийской установки
US9585257B2 (en) * 2015-03-25 2017-02-28 Globalfoundries Inc. Method of forming a glass interposer with thermal vias
KR102411999B1 (ko) * 2015-04-08 2022-06-22 삼성전기주식회사 회로기판
JP6537748B2 (ja) * 2016-12-28 2019-07-03 三菱電機株式会社 電源装置
EP3817529B1 (de) 2018-06-27 2023-10-04 Mitsubishi Electric Corporation Stromversorgungsvorrichtung
CN111200899B (zh) * 2018-11-20 2023-09-15 奥特斯科技(重庆)有限公司 部件承载件及制造该部件承载件的方法
CN111372369B (zh) * 2018-12-25 2023-07-07 奥特斯科技(重庆)有限公司 具有部件屏蔽的部件承载件及其制造方法
RU201560U1 (ru) * 2020-08-11 2020-12-21 Открытое акционерное общество "Машиностроительный завод "АРСЕНАЛ" Магазин боеприпасов корабельной артиллерийской установки
CN118231267A (zh) * 2024-03-23 2024-06-21 江苏晟驰微电子有限公司 一种适用于功率gpp芯片的dfn快速封装工艺

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2231282A1 (de) * 1972-06-08 1973-12-20 Bbc Brown Boveri & Cie Einrichtung zur absorption thermischer impulse
DE2818080A1 (de) * 1977-04-26 1978-11-09 Tokyo Shibaura Electric Co Verkapselte halbleitereinrichtung
FR2396263A1 (fr) * 1977-06-29 1979-01-26 Semi Alloys Inc Plaque de transmission de la chaleur, metallique, composite et prefabriquee
DE2855494A1 (de) * 1978-12-22 1980-07-17 Bbc Brown Boveri & Cie Elektrisch isolierende waermeableitscheibe

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3296501A (en) * 1962-11-07 1967-01-03 Westinghouse Electric Corp Metallic ceramic composite contacts for semiconductor devices
US3594619A (en) * 1967-09-30 1971-07-20 Nippon Electric Co Face-bonded semiconductor device having improved heat dissipation
DE2742882C2 (de) * 1977-09-23 1986-10-09 Blaupunkt-Werke Gmbh, 3200 Hildesheim Elektronisches Bauelement

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2231282A1 (de) * 1972-06-08 1973-12-20 Bbc Brown Boveri & Cie Einrichtung zur absorption thermischer impulse
DE2818080A1 (de) * 1977-04-26 1978-11-09 Tokyo Shibaura Electric Co Verkapselte halbleitereinrichtung
FR2396263A1 (fr) * 1977-06-29 1979-01-26 Semi Alloys Inc Plaque de transmission de la chaleur, metallique, composite et prefabriquee
DE2855494A1 (de) * 1978-12-22 1980-07-17 Bbc Brown Boveri & Cie Elektrisch isolierende waermeableitscheibe

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0129966B1 (de) * 1983-04-22 1988-03-02 Cray Research, Inc. Schaltkreismodul mit Kühleinrichtung von hoher Wirksamkeit
FR2555812A1 (fr) * 1983-11-30 1985-05-31 Nec Corp Bloc de puces de circuits integres
US4682270A (en) * 1984-05-18 1987-07-21 British Telecommunications Public Limited Company Integrated circuit chip carrier
WO1985005496A1 (en) * 1984-05-24 1985-12-05 Mbm Technology Limited Mounting semi-conductor chips
EP0273556A1 (de) * 1986-12-22 1988-07-06 Trw Inc. Bauweise für Gehäuse eines integrierten Schaltkreises
US5012387A (en) * 1988-04-21 1991-04-30 Bodenseewerk Geratetechnik Gmbh Printed circuit board with heat dissipating device
EP0338447A3 (de) * 1988-04-21 1990-10-03 Bodenseewerk Gerätetechnik GmbH Vorrichtung zur Wärmeabfuhr von Bauelementen auf einer Leiterplatte
EP0338447A2 (de) * 1988-04-21 1989-10-25 Bodenseewerk Gerätetechnik GmbH Vorrichtung zur Wärmeabfuhr von Bauelementen auf einer Leiterplatte
GB2219133A (en) * 1988-05-26 1989-11-29 Bergquist Company The Thermally conductive mounting for a semiconductor component
GB2219133B (en) * 1988-05-26 1991-11-20 Bergquist Company The Thermally conductive mounting for a semiconductor component
EP0376100A3 (de) * 1988-12-24 1991-07-31 Alcatel SEL Aktiengesellschaft Verfahren und Leiterplatte zum Montieren eines Halbleiter-Bauelements
EP0376100A2 (de) * 1988-12-24 1990-07-04 Alcatel SEL Aktiengesellschaft Verfahren und Leiterplatte zum Montieren eines Halbleiter-Bauelements
EP0391057A3 (de) * 1989-04-07 1992-04-15 Motorola Inc. Thermischer Nebenschluss für einen elektronischen Schaltkreis
EP0391057A2 (de) * 1989-04-07 1990-10-10 Motorola Inc. Thermischer Nebenschluss für einen elektronischen Schaltkreis
US5014904A (en) * 1990-01-16 1991-05-14 Cray Research, Inc. Board-mounted thermal path connector and cold plate
US5343359A (en) * 1992-11-19 1994-08-30 Cray Research, Inc. Apparatus for cooling daughter boards
EP0994640A2 (de) * 1998-09-17 2000-04-19 DaimlerChrysler AG Verfahren zur Herstellung von Schaltungsanordnungen
EP0994640A3 (de) * 1998-09-17 2000-05-31 DaimlerChrysler AG Verfahren zur Herstellung von Schaltungsanordnungen
US6190941B1 (en) 1998-09-17 2001-02-20 Daimlerchrysler Ag Method of fabricating a circuit arrangement with thermal vias
GB2352872A (en) * 1999-08-02 2001-02-07 Delphi Tech Inc Cooling a component mounted on a PCB
US6929975B2 (en) 2001-01-13 2005-08-16 Conti Temic Microelectronic Gmbh Method for the production of an electronic component
EP2390912A1 (de) * 2010-05-25 2011-11-30 Sunonwealth Electric Machine Industry Co., Ltd. Verfahren zum Zusammenbauen eines Kühlmoduls

Also Published As

Publication number Publication date
US4396936A (en) 1983-08-02
AU7908081A (en) 1982-07-22
KR900004636B1 (ko) 1990-06-30
KR830007367A (ko) 1983-10-19
EP0055578A3 (de) 1983-02-16
AU545035B2 (en) 1985-06-27
JPS6142431B2 (de) 1986-09-20
CA1167571A (en) 1984-05-15
JPS57134953A (en) 1982-08-20

Similar Documents

Publication Publication Date Title
US4396936A (en) Integrated circuit chip package with improved cooling means
US4363076A (en) Integrated circuit package
US4437235A (en) Integrated circuit package
US4381602A (en) Method of mounting an I.C. chip on a substrate
US5519936A (en) Method of making an electronic package with a thermally conductive support member having a thin circuitized substrate and semiconductor device bonded thereto
US9153562B2 (en) Stacked packaging improvements
US5086018A (en) Method of making a planarized thin film covered wire bonded semiconductor package
US5773884A (en) Electronic package with thermally conductive support member having a thin circuitized substrate and semiconductor device bonded thereto
US5208188A (en) Process for making a multilayer lead frame assembly for an integrated circuit structure and multilayer integrated circuit die package formed by such process
JP2769491B2 (ja) 電気的装置
US6223429B1 (en) Method of production of semiconductor device
US6395582B1 (en) Methods for forming ground vias in semiconductor packages
US6406938B2 (en) Semiconductor and flip chip packages and method having a back-side connection
US6389689B2 (en) Method of fabricating semiconductor package
US5633533A (en) Electronic package with thermally conductive support member having a thin circuitized substrate and semiconductor device bonded thereto
US5147210A (en) Polymer film interconnect
JP3506211B2 (ja) 絶縁性配線基板及び樹脂封止型半導体装置
US5457071A (en) Stackable vertical thin package/plastic molded lead-on-chip memory cube
US7498195B2 (en) Multi-chip semiconductor connector assembly method
US5757068A (en) Carrier film with peripheral slits
US6894384B1 (en) Semiconductor device and method of manufacturing the same
JPS5821350A (ja) 半導体集積回路の実装構造
JP3314574B2 (ja) 半導体装置の製造方法
JPH1084055A (ja) 半導体装置及びその製造方法
US6410860B2 (en) Electronic circuit package assembly with solder interconnection sheet

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Designated state(s): BE DE FR GB IT NL

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Designated state(s): BE DE FR GB IT NL

17P Request for examination filed

Effective date: 19830108

R18R Application refused (corrected)

Effective date: 19860512

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED

RIN1 Information on inventor provided before grant (corrected)

Inventor name: BANACH, RICHARD J.

Inventor name: MCIVER, CHANDLER H.