DK139208B - LSI-kredsløb samt fremgangsmåde til fremstilling af samme. - Google Patents

LSI-kredsløb samt fremgangsmåde til fremstilling af samme.

Info

Publication number
DK139208B
DK139208B DK380473AA DK380473A DK139208B DK 139208 B DK139208 B DK 139208B DK 380473A A DK380473A A DK 380473AA DK 380473 A DK380473 A DK 380473A DK 139208 B DK139208 B DK 139208B
Authority
DK
Denmark
Prior art keywords
manufacture
same
lsi circuits
lsi
circuits
Prior art date
Application number
DK380473AA
Other languages
English (en)
Other versions
DK139208C (da
Inventor
Fred Karl Buelow
John Joseph Zasio
Original Assignee
Amdahl Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amdahl Corp filed Critical Amdahl Corp
Publication of DK139208B publication Critical patent/DK139208B/da
Application granted granted Critical
Publication of DK139208C publication Critical patent/DK139208C/da

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11801—Masterslice integrated circuits using bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
DK380473AA 1972-07-10 1973-07-09 LSI-kredsløb samt fremgangsmåde til fremstilling af samme. DK139208B (da)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00270449A US3808475A (en) 1972-07-10 1972-07-10 Lsi chip construction and method

Publications (2)

Publication Number Publication Date
DK139208B true DK139208B (da) 1979-01-08
DK139208C DK139208C (da) 1979-07-16

Family

ID=23031365

Family Applications (1)

Application Number Title Priority Date Filing Date
DK380473AA DK139208B (da) 1972-07-10 1973-07-09 LSI-kredsløb samt fremgangsmåde til fremstilling af samme.

Country Status (17)

Country Link
US (1) US3808475A (da)
JP (1) JPS5531624B2 (da)
AT (1) AT371628B (da)
AU (1) AU467309B2 (da)
BE (1) BE801909A (da)
BR (1) BR7305011D0 (da)
CA (1) CA990414A (da)
CH (2) CH599679A5 (da)
DE (1) DE2334405B2 (da)
DK (1) DK139208B (da)
ES (1) ES417198A1 (da)
FR (1) FR2192383B1 (da)
GB (3) GB1443365A (da)
IT (1) IT991086B (da)
NL (1) NL7309342A (da)
NO (2) NO141623C (da)
SE (1) SE409628B (da)

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US4969029A (en) * 1977-11-01 1990-11-06 Fujitsu Limited Cellular integrated circuit and hierarchial method
CA1102009A (en) * 1977-09-06 1981-05-26 Algirdas J. Gruodis Integrated circuit layout utilizing separated active circuit and wiring regions
JPS60953B2 (ja) * 1977-12-30 1985-01-11 富士通株式会社 半導体集積回路装置
JPS5493376A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Semiconductor integrated circuit device
US4259935A (en) * 1978-04-05 1981-04-07 Toyota Jidosha Kogyo Kabushiki Kaisha Fuel injection type throttle valve
FR2426334A1 (fr) * 1978-05-19 1979-12-14 Fujitsu Ltd Dispositif de connexion de semi-conducteurs et son procede de fabrication
JPS5555541A (en) * 1978-10-20 1980-04-23 Hitachi Ltd Semiconductor element
GB2035688A (en) * 1978-11-13 1980-06-18 Hughes Aircraft Co A multi-function large scale integrated circuit
US4278897A (en) * 1978-12-28 1981-07-14 Fujitsu Limited Large scale semiconductor integrated circuit device
DE3066941D1 (en) * 1979-05-24 1984-04-19 Fujitsu Ltd Masterslice semiconductor device and method of producing it
US4320438A (en) * 1980-05-15 1982-03-16 Cts Corporation Multi-layer ceramic package
JPS57153464A (en) * 1981-03-18 1982-09-22 Toshiba Corp Injection type semiconductor integrated logic circuit
US4413271A (en) * 1981-03-30 1983-11-01 Sprague Electric Company Integrated circuit including test portion and method for making
US4475119A (en) * 1981-04-14 1984-10-02 Fairchild Camera & Instrument Corporation Integrated circuit power transmission array
JPS5844743A (ja) * 1981-09-10 1983-03-15 Fujitsu Ltd 半導体集積回路
JPS5884445A (ja) * 1981-11-16 1983-05-20 Hitachi Ltd 大規模集積回路
EP0087979B1 (en) * 1982-03-03 1989-09-06 Fujitsu Limited A semiconductor memory device
DE3382726D1 (de) * 1982-06-30 1994-01-27 Fujitsu Ltd Integrierte Halbleiterschaltungsanordnung.
US4511914A (en) * 1982-07-01 1985-04-16 Motorola, Inc. Power bus routing for providing noise isolation in gate arrays
US4549262A (en) * 1983-06-20 1985-10-22 Western Digital Corporation Chip topography for a MOS disk memory controller circuit
EP0130262B1 (fr) * 1983-06-30 1987-11-19 International Business Machines Corporation Circuits logiques permettant de constituer des réseaux logiques très denses
US4593205A (en) * 1983-07-01 1986-06-03 Motorola, Inc. Macrocell array having an on-chip clock generator
JPS6030152A (ja) * 1983-07-28 1985-02-15 Toshiba Corp 集積回路
US4583111A (en) * 1983-09-09 1986-04-15 Fairchild Semiconductor Corporation Integrated circuit chip wiring arrangement providing reduced circuit inductance and controlled voltage gradients
US4575744A (en) * 1983-09-16 1986-03-11 International Business Machines Corporation Interconnection of elements on integrated circuit substrate
US4737836A (en) * 1983-12-30 1988-04-12 International Business Machines Corporation VLSI integrated circuit having parallel bonding areas
JPS60152039A (ja) * 1984-01-20 1985-08-10 Toshiba Corp ＧａＡｓゲ−トアレイ集積回路
JPS61501533A (ja) * 1984-03-22 1986-07-24 モステック・コ−ポレイション 集積回路の付加部品
JPS61501538A (ja) * 1984-03-22 1986-07-24 エスジーエス―トムソン　マイクロエレクトロニクス　インコーポレイテッド 集積回路に電気リードを取付ける方法
JPS6112042A (ja) * 1984-06-27 1986-01-20 Toshiba Corp マスタ−スライス型半導体装置
GB2168840A (en) * 1984-08-22 1986-06-25 Plessey Co Plc Customerisation of integrated logic devices
JPS61241964A (ja) * 1985-04-19 1986-10-28 Hitachi Ltd 半導体装置
US4789889A (en) * 1985-11-20 1988-12-06 Ge Solid State Patents, Inc. Integrated circuit device having slanted peripheral circuits
US4959751A (en) * 1988-08-16 1990-09-25 Delco Electronics Corporation Ceramic hybrid integrated circuit having surface mount device solder stress reduction
US5121298A (en) * 1988-08-16 1992-06-09 Delco Electronics Corporation Controlled adhesion conductor
JPH0727968B2 (ja) * 1988-12-20 1995-03-29 株式会社東芝 半導体集積回路装置
EP1179848A3 (en) * 1989-02-14 2005-03-09 Koninklijke Philips Electronics N.V. Supply pin rearrangement for an I.C.
US5126822A (en) * 1989-02-14 1992-06-30 North American Philips Corporation Supply pin rearrangement for an I.C.
NL8901822A (nl) * 1989-07-14 1991-02-01 Philips Nv Geintegreerde schakeling met stroomdetectie.
GB9007492D0 (en) * 1990-04-03 1990-05-30 Pilkington Micro Electronics Semiconductor integrated circuit
JPH04132252A (ja) * 1990-09-21 1992-05-06 Hitachi Ltd 半導体集積回路装置
US5446410A (en) * 1992-04-20 1995-08-29 Matsushita Electric Industrial Co.,Ltd. Semiconductor integrated circuit
JPH0824177B2 (ja) * 1992-11-13 1996-03-06 セイコーエプソン株式会社 半導体装置
US6675361B1 (en) * 1993-12-27 2004-01-06 Hyundai Electronics America Method of constructing an integrated circuit comprising an embedded macro
US5671397A (en) * 1993-12-27 1997-09-23 At&T Global Information Solutions Company Sea-of-cells array of transistors
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US5757041A (en) * 1996-09-11 1998-05-26 Northrop Grumman Corporation Adaptable MMIC array
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Also Published As

Publication number Publication date
CA990414A (en) 1976-06-01
DE2334405B2 (de) 1980-08-14
FR2192383A1 (da) 1974-02-08
BR7305011D0 (pt) 1974-08-22
DE2334405A1 (de) 1974-01-31
NO141623C (no) 1980-04-16
DE2334405C3 (da) 1987-01-22
ATA594873A (de) 1982-11-15
BE801909A (fr) 1973-11-05
GB1443365A (en) 1976-07-21
AU467309B2 (en) 1975-11-27
IT991086B (it) 1975-07-30
DK139208C (da) 1979-07-16
JPS5531624B2 (da) 1980-08-19
CH599679A5 (da) 1978-05-31
GB1443363A (en) 1976-07-21
SE409628B (sv) 1979-08-27
NO141623B (no) 1980-01-02
NL7309342A (da) 1974-01-14
AU5794673A (en) 1975-02-06
JPS4939388A (da) 1974-04-12
US3808475A (en) 1974-04-30
CH600568A5 (da) 1978-06-15
FR2192383B1 (da) 1978-09-08
AT371628B (de) 1983-07-11
GB1443361A (en) 1976-07-21
NO783892L (no) 1974-01-11
ES417198A1 (es) 1976-06-16

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