DE69915153D1 - Spannungserhöhungsschaltung für Speicheranordnung - Google Patents

Spannungserhöhungsschaltung für Speicheranordnung

Info

Publication number
DE69915153D1
DE69915153D1 DE69915153T DE69915153T DE69915153D1 DE 69915153 D1 DE69915153 D1 DE 69915153D1 DE 69915153 T DE69915153 T DE 69915153T DE 69915153 T DE69915153 T DE 69915153T DE 69915153 D1 DE69915153 D1 DE 69915153D1
Authority
DE
Germany
Prior art keywords
booster circuit
memory arrangement
memory
arrangement
booster
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69915153T
Other languages
English (en)
Other versions
DE69915153T2 (de
Inventor
Miki Atsunori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Publication of DE69915153D1 publication Critical patent/DE69915153D1/de
Application granted granted Critical
Publication of DE69915153T2 publication Critical patent/DE69915153T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Read Only Memory (AREA)
DE69915153T 1998-03-31 1999-03-30 Spannungserhöhungsschaltung für Speicheranordnung Expired - Lifetime DE69915153T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8661598 1998-03-31
JP8661598A JP3223504B2 (ja) 1998-03-31 1998-03-31 昇圧回路

Publications (2)

Publication Number Publication Date
DE69915153D1 true DE69915153D1 (de) 2004-04-08
DE69915153T2 DE69915153T2 (de) 2004-12-30

Family

ID=13891937

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69915153T Expired - Lifetime DE69915153T2 (de) 1998-03-31 1999-03-30 Spannungserhöhungsschaltung für Speicheranordnung
DE69919045T Expired - Fee Related DE69919045T2 (de) 1998-03-31 1999-03-30 Spannungserhöhungsschaltung für Speicheranordnung

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69919045T Expired - Fee Related DE69919045T2 (de) 1998-03-31 1999-03-30 Spannungserhöhungsschaltung für Speicheranordnung

Country Status (6)

Country Link
US (1) US6121821A (de)
EP (2) EP1315169B1 (de)
JP (1) JP3223504B2 (de)
KR (1) KR100286721B1 (de)
CN (2) CN1196134C (de)
DE (2) DE69915153T2 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2773012B1 (fr) * 1997-12-24 2001-02-02 Sgs Thomson Microelectronics Dispositif a pompe de charges negatives
JP3303823B2 (ja) * 1999-02-23 2002-07-22 日本電気株式会社 電源回路
JP2001145334A (ja) * 1999-11-15 2001-05-25 Nec Corp 昇圧回路
US6927441B2 (en) * 2001-03-20 2005-08-09 Stmicroelectronics S.R.L. Variable stage charge pump
US6455896B1 (en) * 2001-04-25 2002-09-24 Macronix International Co., Ltd. Protection circuit for a memory array
EP1262998B1 (de) * 2001-05-28 2008-02-06 Infineon Technologies AG Ladungspumpenschaltung und Verwendung einer Ladungspumpenschaltung
US6888399B2 (en) * 2002-02-08 2005-05-03 Rohm Co., Ltd. Semiconductor device equipped with a voltage step-up circuit
JP4223270B2 (ja) * 2002-11-19 2009-02-12 パナソニック株式会社 昇圧回路およびそれを内蔵した不揮発性半導体記憶装置
US6980045B1 (en) * 2003-12-05 2005-12-27 Xilinx, Inc. Merged charge pump
JP2005267734A (ja) * 2004-03-18 2005-09-29 Renesas Technology Corp 昇圧回路及びそれを用いた不揮発性メモリ
KR100587683B1 (ko) * 2004-06-07 2006-06-08 삼성전자주식회사 불휘발성 반도체 메모리 장치에서의 고전압 발생회로
US7595682B2 (en) * 2005-02-24 2009-09-29 Macronix International Co., Ltd. Multi-stage charge pump without threshold drop with frequency modulation between embedded mode operations
JP2007096036A (ja) * 2005-09-29 2007-04-12 Matsushita Electric Ind Co Ltd 昇圧回路
KR100673022B1 (ko) * 2005-12-26 2007-01-24 삼성전자주식회사 챠지 펌프
US7777557B2 (en) 2007-01-17 2010-08-17 Panasonic Corporation Booster circuit
JP5125569B2 (ja) * 2008-02-08 2013-01-23 ソニー株式会社 ブートストラップ回路
JP4963504B2 (ja) * 2009-06-08 2012-06-27 日本電信電話株式会社 センサ回路およびセンサノード
JP2011118967A (ja) * 2009-12-01 2011-06-16 Toshiba Corp 半導体記憶装置および昇圧回路
KR101145315B1 (ko) * 2009-12-29 2012-05-16 에스케이하이닉스 주식회사 내부전압발생회로
KR101817926B1 (ko) * 2010-03-02 2018-01-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 승압 회로 및 승압 회로를 포함하는 ｒｆｉｄ 태그
US8710908B2 (en) * 2011-01-28 2014-04-29 Taiwan Semiconductor Manufacturing Company, Ltd. Charge pump and method of biasing deep N-well in charge pump
US8415743B2 (en) 2011-05-24 2013-04-09 International Business Machines Corporation ETSOI CMOS with back gates
US8552500B2 (en) 2011-05-24 2013-10-08 International Business Machines Corporation Structure for CMOS ETSOI with multiple threshold voltages and active well bias capability
JP5611934B2 (ja) * 2011-12-26 2014-10-22 日本電信電話株式会社 センサ回路
CN102654989B (zh) * 2012-05-04 2014-06-11 深圳市华星光电技术有限公司 液晶显示器的背光模块驱动方法及其系统
US9041370B2 (en) * 2012-07-09 2015-05-26 Silanna Semiconductor U.S.A., Inc. Charge pump regulator circuit with a variable drive voltage ring oscillator
US9081399B2 (en) 2012-07-09 2015-07-14 Silanna Semiconductor U.S.A., Inc. Charge pump regulator circuit with variable amplitude control
US9633734B1 (en) * 2016-07-14 2017-04-25 Ememory Technology Inc. Driving circuit for non-volatile memory
US10290329B2 (en) 2016-07-14 2019-05-14 Ememory Technology Inc. Charge pump apparatus
JP7103780B2 (ja) * 2017-11-27 2022-07-20 ラピスセミコンダクタ株式会社 半導体装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3170038B2 (ja) * 1992-05-19 2001-05-28 株式会社東芝 不揮発性半導体記憶装置
JP3307453B2 (ja) * 1993-03-18 2002-07-24 ソニー株式会社 昇圧回路
JP3162564B2 (ja) * 1993-08-17 2001-05-08 株式会社東芝 昇圧回路及び昇圧回路を備えた不揮発性半導体記憶装置
JP2718375B2 (ja) * 1994-09-30 1998-02-25 日本電気株式会社 チャージポンプ回路
JP3192344B2 (ja) * 1995-03-15 2001-07-23 株式会社東芝 半導体記憶装置
US5602794A (en) * 1995-09-29 1997-02-11 Intel Corporation Variable stage charge pump
US5856918A (en) * 1995-11-08 1999-01-05 Sony Corporation Internal power supply circuit
JPH09266281A (ja) * 1996-03-28 1997-10-07 Sony Corp 昇圧回路
JP3394133B2 (ja) * 1996-06-12 2003-04-07 沖電気工業株式会社 昇圧回路

Also Published As

Publication number Publication date
EP0947990B1 (de) 2004-03-03
JP3223504B2 (ja) 2001-10-29
CN100350504C (zh) 2007-11-21
EP0947990A2 (de) 1999-10-06
EP1315169A2 (de) 2003-05-28
DE69915153T2 (de) 2004-12-30
EP1315169A3 (de) 2003-11-05
CN1196134C (zh) 2005-04-06
EP1315169B1 (de) 2004-07-28
CN1516197A (zh) 2004-07-28
CN1232268A (zh) 1999-10-20
DE69919045T2 (de) 2005-09-29
JPH11283392A (ja) 1999-10-15
EP0947990A3 (de) 2001-03-21
DE69919045D1 (de) 2004-09-02
US6121821A (en) 2000-09-19
KR100286721B1 (ko) 2001-04-16
KR19990078415A (ko) 1999-10-25

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