DE69511791D1 - Redundanzschema für Speicherschaltungen - Google Patents

Redundanzschema für Speicherschaltungen

Info

Publication number
DE69511791D1
DE69511791D1 DE69511791T DE69511791T DE69511791D1 DE 69511791 D1 DE69511791 D1 DE 69511791D1 DE 69511791 T DE69511791 T DE 69511791T DE 69511791 T DE69511791 T DE 69511791T DE 69511791 D1 DE69511791 D1 DE 69511791D1
Authority
DE
Germany
Prior art keywords
memory circuits
redundancy scheme
redundancy
scheme
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69511791T
Other languages
English (en)
Other versions
DE69511791T2 (de
Inventor
Robert J Proebsting
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of DE69511791D1 publication Critical patent/DE69511791D1/de
Application granted granted Critical
Publication of DE69511791T2 publication Critical patent/DE69511791T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
DE69511791T 1994-05-31 1995-05-24 Redundanzschema für Speicherschaltungen Expired - Fee Related DE69511791T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/252,284 US5495445A (en) 1994-05-31 1994-05-31 Redundancy scheme for memory circuits

Publications (2)

Publication Number Publication Date
DE69511791D1 true DE69511791D1 (de) 1999-10-07
DE69511791T2 DE69511791T2 (de) 2000-04-27

Family

ID=22955370

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69511791T Expired - Fee Related DE69511791T2 (de) 1994-05-31 1995-05-24 Redundanzschema für Speicherschaltungen

Country Status (7)

Country Link
US (2) US5495445A (de)
EP (1) EP0690381B1 (de)
JP (1) JP3167583B2 (de)
KR (1) KR100368565B1 (de)
CN (1) CN1136579C (de)
DE (1) DE69511791T2 (de)
TW (1) TW270259B (de)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3205501B2 (ja) * 1996-03-12 2001-09-04 シャープ株式会社 アクティブマトリクス表示装置およびその修正方法
US5698998A (en) * 1996-04-12 1997-12-16 Hewlett-Packard Co. Fast, low power, differential sense amplifier
US5659259A (en) * 1996-04-12 1997-08-19 Hewlett-Packard Company Circuit and method of sensing small voltage changes on highly capacitively loaded electronic signals
US5953745A (en) * 1996-11-27 1999-09-14 International Business Machines Corporation Redundant memory array
US5917763A (en) * 1997-09-12 1999-06-29 Micron Technology, Inc. Method and apparatus for repairing opens on global column lines
US6005813A (en) 1997-11-12 1999-12-21 Micron Technology, Inc. Device and method for repairing a semiconductor memory
US5982700A (en) * 1998-05-21 1999-11-09 Integrated Device Technology, Inc. Buffer memory arrays having nonlinear columns for providing parallel data access capability and methods of operating same
US6216205B1 (en) 1998-05-21 2001-04-10 Integrated Device Technology, Inc. Methods of controlling memory buffers having tri-port cache arrays therein
US5978307A (en) * 1998-05-21 1999-11-02 Integrated Device Technology, Inc. Integrated circuit memory devices having partitioned multi-port memory arrays therein for increasing data bandwidth and methods of operating same
US5999478A (en) * 1998-05-21 1999-12-07 Integrated Device Technology, Inc. Highly integrated tri-port memory buffers having fast fall-through capability and methods of operating same
KR100282226B1 (ko) * 1998-06-24 2001-02-15 김영환 반도체 메모리의 구제회로
KR100281284B1 (ko) * 1998-06-29 2001-02-01 김영환 컬럼 리던던시 회로
US6134176A (en) * 1998-11-24 2000-10-17 Proebsting; Robert J. Disabling a defective element in an integrated circuit device having redundant elements
TW451209B (en) * 1998-12-22 2001-08-21 Infineon Technologies Ag Integrated memory with redundance
US6115302A (en) * 1999-04-07 2000-09-05 Proebsting; Robert J. Disabling a decoder for a defective element in an integrated circuit device having redundant elements
US6258642B1 (en) 1999-05-20 2001-07-10 Advanced Micro Devices, Inc. Use of functional memory cells as guard cells in a semiconductor memory
US6188596B1 (en) 1999-05-20 2001-02-13 Advanced Micro Devices, Inc. Layout for semiconductor memory including multi-level sensing
US6157584A (en) * 1999-05-20 2000-12-05 Advanced Micro Devices, Inc. Redundancy circuit and method for semiconductor memory
KR100399898B1 (ko) * 1999-05-27 2003-09-29 주식회사 하이닉스반도체 반도체 메모리의 칼럼 구제 회로
KR100322538B1 (ko) * 1999-07-05 2002-03-18 윤종용 래치 셀을 채용하는 리던던시 회로
JP2001036033A (ja) * 1999-07-16 2001-02-09 Mitsubishi Electric Corp 半導体記憶装置
CN100382202C (zh) * 2002-01-23 2008-04-16 旺宏电子股份有限公司 动态地隐藏存储器缺陷的方法及装置
US6879530B2 (en) * 2002-07-18 2005-04-12 Micron Technology, Inc. Apparatus for dynamically repairing a semiconductor memory
EP1422052B1 (de) * 2002-11-20 2009-05-13 Joaquin Devesa Company Methode zur Herstellung von mehrschichtigen Behältern und Behälter dadurch hergestellt
US6985391B2 (en) * 2004-05-07 2006-01-10 Micron Technology, Inc. High speed redundant data sensing method and apparatus
US7088613B2 (en) * 2004-05-14 2006-08-08 Macronix International Co., Ltd. Method for controlling current during read and program operations of programmable diode
US7035152B1 (en) * 2004-10-14 2006-04-25 Micron Technology, Inc. System and method for redundancy memory decoding
US7224626B2 (en) * 2005-04-18 2007-05-29 Infineon Technologies Ag Redundancy circuits for semiconductor memory
US7215586B2 (en) * 2005-06-29 2007-05-08 Micron Technology, Inc. Apparatus and method for repairing a semiconductor memory
US7484138B2 (en) * 2006-06-09 2009-01-27 Taiwan Semiconductor Manufacturing Co., Ltd. Method and system for improving reliability of memory device
US20080229161A1 (en) * 2007-03-16 2008-09-18 Taiwan Semiconductor Manufacturing Co., Ltd. Memory products and manufacturing methods thereof
US8379447B2 (en) * 2010-06-30 2013-02-19 Texas Instruments Incorporated Memory bit redundant vias
CN109656129A (zh) * 2019-03-05 2019-04-19 北京龙鼎源科技股份有限公司 一种输入输出模块冗余方法、装置及系统
US11302415B2 (en) 2019-12-12 2022-04-12 Marvell Asia Pte, Ltd. Row address comparator for a row redundancy control circuit in a memory
US11710531B2 (en) * 2019-12-30 2023-07-25 Micron Technology, Inc. Memory redundancy repair

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58164099A (ja) * 1982-03-25 1983-09-28 Toshiba Corp 半導体メモリ−
US4464754A (en) * 1982-03-26 1984-08-07 Rca Corporation Memory system with redundancy for error avoidance
JPS59161860A (ja) * 1983-03-07 1984-09-12 Hitachi Ltd 半導体メモリ装置
US4577294A (en) * 1983-04-18 1986-03-18 Advanced Micro Devices, Inc. Redundant memory circuit and method of programming and verifying the circuit
US4687951A (en) * 1984-10-29 1987-08-18 Texas Instruments Incorporated Fuse link for varying chip operating parameters
US5265047A (en) * 1992-03-09 1993-11-23 Monolithic System Technology High density SRAM circuit with single-ended memory cells
JP2917722B2 (ja) * 1993-01-07 1999-07-12 日本電気株式会社 電気的書込消去可能な不揮発性半導体記憶装置

Also Published As

Publication number Publication date
JP3167583B2 (ja) 2001-05-21
CN1136579C (zh) 2004-01-28
US5572471A (en) 1996-11-05
TW270259B (de) 1996-02-11
EP0690381A1 (de) 1996-01-03
CN1121247A (zh) 1996-04-24
KR100368565B1 (ko) 2003-03-29
JPH07326200A (ja) 1995-12-12
KR950034277A (ko) 1995-12-28
US5495445A (en) 1996-02-27
DE69511791T2 (de) 2000-04-27
EP0690381B1 (de) 1999-09-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee