DE69714763D1 - Nichtflüchtige speichermatrix mit gleichzeitiger lese- und schreiboperation - Google Patents

Nichtflüchtige speichermatrix mit gleichzeitiger lese- und schreiboperation

Info

Publication number
DE69714763D1
DE69714763D1 DE69714763T DE69714763T DE69714763D1 DE 69714763 D1 DE69714763 D1 DE 69714763D1 DE 69714763 T DE69714763 T DE 69714763T DE 69714763 T DE69714763 T DE 69714763T DE 69714763 D1 DE69714763 D1 DE 69714763D1
Authority
DE
Germany
Prior art keywords
volatile storage
writing operation
storage matrix
simultaneous reading
simultaneous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69714763T
Other languages
English (en)
Other versions
DE69714763T2 (de
Inventor
Buskirk Michael Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69714763D1 publication Critical patent/DE69714763D1/de
Publication of DE69714763T2 publication Critical patent/DE69714763T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/22—Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
DE69714763T 1996-12-20 1997-06-11 Nichtflüchtige speichermatrix mit gleichzeitiger lese- und schreiboperation Expired - Lifetime DE69714763T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/769,009 US5847998A (en) 1996-12-20 1996-12-20 Non-volatile memory array that enables simultaneous read and write operations
PCT/US1997/010082 WO1998028749A1 (en) 1996-12-20 1997-06-11 Non-volatile memory array that enables simultaneous read and write operations

Publications (2)

Publication Number Publication Date
DE69714763D1 true DE69714763D1 (de) 2002-09-19
DE69714763T2 DE69714763T2 (de) 2003-04-24

Family

ID=25084142

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69714763T Expired - Lifetime DE69714763T2 (de) 1996-12-20 1997-06-11 Nichtflüchtige speichermatrix mit gleichzeitiger lese- und schreiboperation

Country Status (5)

Country Link
US (1) US5847998A (de)
EP (1) EP0944906B1 (de)
DE (1) DE69714763T2 (de)
TW (1) TW350957B (de)
WO (1) WO1998028749A1 (de)

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US6654848B1 (en) * 2000-09-15 2003-11-25 Advanced Micro Devices, Inc. Simultaneous execution command modes in a flash memory device
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US6880056B2 (en) * 2002-03-28 2005-04-12 Hewlett-Packard Development, L.P. Memory array and method with simultaneous read/write capability
US7061792B1 (en) * 2002-08-10 2006-06-13 National Semiconductor Corporation Low AC power SRAM architecture
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US6950348B2 (en) * 2003-06-20 2005-09-27 Sandisk Corporation Source controlled operation of non-volatile memories
WO2005017909A1 (ja) * 2003-08-18 2005-02-24 Fujitsu Limited 不揮発性半導体メモリ
US7058754B2 (en) * 2003-12-22 2006-06-06 Silicon Storage Technology, Inc. Nonvolatile memory device capable of simultaneous erase and program of different blocks
US7307884B2 (en) * 2004-06-15 2007-12-11 Sandisk Corporation Concurrent programming of non-volatile memory
US7110304B1 (en) 2004-08-26 2006-09-19 Altera Corporation Dual port memory array using shared write drivers and read sense amplifiers
US7200693B2 (en) 2004-08-27 2007-04-03 Micron Technology, Inc. Memory system and method having unidirectional data buses
US7209405B2 (en) * 2005-02-23 2007-04-24 Micron Technology, Inc. Memory device and method having multiple internal data buses and memory bank interleaving
US20070028027A1 (en) * 2005-07-26 2007-02-01 Micron Technology, Inc. Memory device and method having separate write data and read data buses
US8130528B2 (en) 2008-08-25 2012-03-06 Sandisk 3D Llc Memory system with sectional data lines
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US8279650B2 (en) 2009-04-20 2012-10-02 Sandisk 3D Llc Memory system with data line switching scheme
US8850103B2 (en) 2009-08-28 2014-09-30 Microsoft Corporation Interruptible NAND flash memory
US8400822B2 (en) 2010-03-22 2013-03-19 Qualcomm Incorporated Multi-port non-volatile memory that includes a resistive memory element
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DE102021107044A1 (de) 2021-03-10 2022-09-15 Elmos Semiconductor Se Sicherheitsrelevantes Rechnersystems mit einem Datenspeicher und einem Datenspeicher

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Also Published As

Publication number Publication date
EP0944906A1 (de) 1999-09-29
DE69714763T2 (de) 2003-04-24
EP0944906B1 (de) 2002-08-14
TW350957B (en) 1999-01-21
US5847998A (en) 1998-12-08
WO1998028749A1 (en) 1998-07-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GLOBALFOUNDRIES, INC., GARAND CAYMAN, KY