DE69711735D1 - Gedruckte Schaltungsplatte oder Halbleitervorrichtung mit anisotrop leitenden Platten - Google Patents
Gedruckte Schaltungsplatte oder Halbleitervorrichtung mit anisotrop leitenden PlattenInfo
- Publication number
- DE69711735D1 DE69711735D1 DE69711735T DE69711735T DE69711735D1 DE 69711735 D1 DE69711735 D1 DE 69711735D1 DE 69711735 T DE69711735 T DE 69711735T DE 69711735 T DE69711735 T DE 69711735T DE 69711735 D1 DE69711735 D1 DE 69711735D1
- Authority
- DE
- Germany
- Prior art keywords
- circuit board
- semiconductor device
- printed circuit
- conductive plates
- anisotropically conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0373—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
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- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
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- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
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- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
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Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP00761396A JP3549316B2 (ja) | 1995-03-24 | 1996-01-19 | 配線基板 |
Publications (2)
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DE69711735D1 true DE69711735D1 (de) | 2002-05-16 |
DE69711735T2 DE69711735T2 (de) | 2002-11-21 |
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Application Number | Title | Priority Date | Filing Date |
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DE69711735T Expired - Lifetime DE69711735T2 (de) | 1996-01-19 | 1997-01-17 | Gedruckte Schaltungsplatte oder Halbleitervorrichtung mit anisotrop leitenden Platten |
Country Status (4)
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US (2) | US5886415A (de) |
EP (1) | EP0786808B1 (de) |
KR (1) | KR100274333B1 (de) |
DE (1) | DE69711735T2 (de) |
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-
1997
- 1997-01-15 KR KR1019970000992A patent/KR100274333B1/ko not_active IP Right Cessation
- 1997-01-17 DE DE69711735T patent/DE69711735T2/de not_active Expired - Lifetime
- 1997-01-17 EP EP97300275A patent/EP0786808B1/de not_active Expired - Lifetime
- 1997-01-17 US US08/786,615 patent/US5886415A/en not_active Expired - Lifetime
-
1998
- 1998-10-08 US US09/168,148 patent/US6121688A/en not_active Expired - Lifetime
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---|---|
EP0786808B1 (de) | 2002-04-10 |
KR100274333B1 (ko) | 2001-01-15 |
US6121688A (en) | 2000-09-19 |
EP0786808A1 (de) | 1997-07-30 |
KR970061017A (ko) | 1997-08-12 |
US5886415A (en) | 1999-03-23 |
DE69711735T2 (de) | 2002-11-21 |
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