DE69531085D1 - Verbesserungen in, an oder in Bezug auf Halbleiteranordnungen - Google Patents

Verbesserungen in, an oder in Bezug auf Halbleiteranordnungen

Info

Publication number
DE69531085D1
DE69531085D1 DE69531085T DE69531085T DE69531085D1 DE 69531085 D1 DE69531085 D1 DE 69531085D1 DE 69531085 T DE69531085 T DE 69531085T DE 69531085 T DE69531085 T DE 69531085T DE 69531085 D1 DE69531085 D1 DE 69531085D1
Authority
DE
Germany
Prior art keywords
relation
semiconductor devices
semiconductor
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69531085T
Other languages
English (en)
Other versions
DE69531085T2 (de
Inventor
Ken Numata
Kay L Houston
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69531085D1 publication Critical patent/DE69531085D1/de
Publication of DE69531085T2 publication Critical patent/DE69531085T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
DE69531085T 1994-07-15 1995-07-14 Verbesserungen in, an oder in Bezug auf Halbleiteranordnungen Expired - Lifetime DE69531085T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/275,570 US5625232A (en) 1994-07-15 1994-07-15 Reliability of metal leads in high speed LSI semiconductors using dummy vias
US275570 1994-07-15

Publications (2)

Publication Number Publication Date
DE69531085D1 true DE69531085D1 (de) 2003-07-24
DE69531085T2 DE69531085T2 (de) 2004-05-13

Family

ID=23052884

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69531085T Expired - Lifetime DE69531085T2 (de) 1994-07-15 1995-07-14 Verbesserungen in, an oder in Bezug auf Halbleiteranordnungen

Country Status (4)

Country Link
US (2) US5625232A (de)
EP (1) EP0692824B1 (de)
JP (1) JPH0883797A (de)
DE (1) DE69531085T2 (de)

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US6420725B1 (en) * 1995-06-07 2002-07-16 Micron Technology, Inc. Method and apparatus for forming an integrated circuit electrode having a reduced contact area
US5879955A (en) * 1995-06-07 1999-03-09 Micron Technology, Inc. Method for fabricating an array of ultra-small pores for chalcogenide memory cells
JP2845176B2 (ja) * 1995-08-10 1999-01-13 日本電気株式会社 半導体装置
DE19712233C2 (de) * 1996-03-26 2003-12-11 Lg Philips Lcd Co Flüssigkristallanzeige und Herstellungsverfahren dafür
US5926359A (en) * 1996-04-01 1999-07-20 International Business Machines Corporation Metal-insulator-metal capacitor
JP3519214B2 (ja) * 1996-06-20 2004-04-12 株式会社半導体エネルギー研究所 集積回路およびその作製方法
US6143647A (en) * 1997-07-24 2000-11-07 Intel Corporation Silicon-rich block copolymers to achieve unbalanced vias
US6429120B1 (en) * 2000-01-18 2002-08-06 Micron Technology, Inc. Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals
US5903058A (en) * 1996-07-17 1999-05-11 Micron Technology, Inc. Conductive bumps on die for flip chip application
US6337266B1 (en) * 1996-07-22 2002-01-08 Micron Technology, Inc. Small electrode for chalcogenide memories
US5744865A (en) * 1996-10-22 1998-04-28 Texas Instruments Incorporated Highly thermally conductive interconnect structure for intergrated circuits
US6015977A (en) 1997-01-28 2000-01-18 Micron Technology, Inc. Integrated circuit memory cell having a small active area and method of forming same
US5786238A (en) * 1997-02-13 1998-07-28 Generyal Dynamics Information Systems, Inc. Laminated multilayer substrates
JPH10242147A (ja) * 1997-02-27 1998-09-11 Toshiba Corp 半導体装置およびその製造方法ならびに半導体記憶装置およびその製造方法
US6670265B2 (en) * 1997-05-12 2003-12-30 Advanced Micro Devices, Inc. Low K dielectic etch in high density plasma etcher
US6031287A (en) * 1997-06-18 2000-02-29 Micron Technology, Inc. Contact structure and memory element incorporating the same
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US6294455B1 (en) 1997-08-20 2001-09-25 Micron Technology, Inc. Conductive lines, coaxial lines, integrated circuitry, and methods of forming conductive lines, coaxial lines, and integrated circuitry
US6309956B1 (en) 1997-09-30 2001-10-30 Intel Corporation Fabricating low K dielectric interconnect systems by using dummy structures to enhance process
US6248168B1 (en) 1997-12-15 2001-06-19 Tokyo Electron Limited Spin coating apparatus including aging unit and solvent replacement unit
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US6081032A (en) * 1998-02-13 2000-06-27 Texas Instruments - Acer Incorporated Dual damascene multi-level metallization and interconnection structure
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US6249032B1 (en) * 1998-10-01 2001-06-19 Advanced Micro Devices, Inc. Semiconductor device having patterned metal layer over a polysilicon line and method of fabrication thereof
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US6303047B1 (en) 1999-03-22 2001-10-16 Lsi Logic Corporation Low dielectric constant multiple carbon-containing silicon oxide dielectric material for use in integrated circuit structures, and method of making same
US6265301B1 (en) * 1999-05-12 2001-07-24 Taiwan Semiconductor Manufacturing Company Method of forming metal interconnect structures and metal via structures using photolithographic and electroplating or electro-less plating procedures
US6281583B1 (en) 1999-05-12 2001-08-28 International Business Machines Corporation Planar integrated circuit interconnect
US6770975B2 (en) * 1999-06-09 2004-08-03 Alliedsignal Inc. Integrated circuits with multiple low dielectric-constant inter-metal dielectrics
JP4363716B2 (ja) * 1999-06-25 2009-11-11 株式会社東芝 Ｌｓｉの配線構造の設計方法
US6413854B1 (en) * 1999-08-24 2002-07-02 International Business Machines Corp. Method to build multi level structure
US6756674B1 (en) * 1999-10-22 2004-06-29 Lsi Logic Corporation Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same
US6423628B1 (en) 1999-10-22 2002-07-23 Lsi Logic Corporation Method of forming integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal lines
US6391795B1 (en) 1999-10-22 2002-05-21 Lsi Logic Corporation Low k dielectric composite layer for intergrated circuit structure which provides void-free low k dielectric material between metal lines while mitigating via poisoning
US6316354B1 (en) 1999-10-26 2001-11-13 Lsi Logic Corporation Process for removing resist mask of integrated circuit structure which mitigates damage to underlying low dielectric constant silicon oxide dielectric layer
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US6610592B1 (en) * 2000-04-24 2003-08-26 Taiwan Semiconductor Manufacturing Company Method for integrating low-K materials in semiconductor fabrication
US6506678B1 (en) 2000-05-19 2003-01-14 Lsi Logic Corporation Integrated circuit structures having low k porous aluminum oxide dielectric material separating aluminum lines, and method of making same
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Also Published As

Publication number Publication date
US5675187A (en) 1997-10-07
JPH0883797A (ja) 1996-03-26
EP0692824A2 (de) 1996-01-17
US5625232A (en) 1997-04-29
EP0692824A3 (de) 1997-07-16
DE69531085T2 (de) 2004-05-13
EP0692824B1 (de) 2003-06-18

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