DE69528118D1 - Speichermatrix mit einer vergrabenen Schicht und Löschverfahren - Google Patents

Speichermatrix mit einer vergrabenen Schicht und Löschverfahren

Info

Publication number
DE69528118D1
DE69528118D1 DE69528118T DE69528118T DE69528118D1 DE 69528118 D1 DE69528118 D1 DE 69528118D1 DE 69528118 T DE69528118 T DE 69528118T DE 69528118 T DE69528118 T DE 69528118T DE 69528118 D1 DE69528118 D1 DE 69528118D1
Authority
DE
Germany
Prior art keywords
buried layer
flash eprom
eprom cells
well
channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69528118T
Other languages
English (en)
Other versions
DE69528118T2 (de
Inventor
David K Y Liu
Jian Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Spansion LLC
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69528118D1 publication Critical patent/DE69528118D1/de
Publication of DE69528118T2 publication Critical patent/DE69528118T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
DE69528118T 1994-07-01 1995-06-20 Speichermatrix mit einer vergrabenen Schicht und Löschverfahren Expired - Lifetime DE69528118T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/269,478 US5541875A (en) 1994-07-01 1994-07-01 High energy buried layer implant to provide a low resistance p-well in a flash EPROM array

Publications (2)

Publication Number Publication Date
DE69528118D1 true DE69528118D1 (de) 2002-10-17
DE69528118T2 DE69528118T2 (de) 2003-04-30

Family

ID=23027428

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69528118T Expired - Lifetime DE69528118T2 (de) 1994-07-01 1995-06-20 Speichermatrix mit einer vergrabenen Schicht und Löschverfahren

Country Status (6)

Country Link
US (1) US5541875A (de)
EP (1) EP0690508B1 (de)
JP (2) JPH0851193A (de)
KR (1) KR100366599B1 (de)
AT (1) ATE224102T1 (de)
DE (1) DE69528118T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6330190B1 (en) * 1996-05-30 2001-12-11 Hyundai Electronics America Semiconductor structure for flash memory enabling low operating potentials
KR100486205B1 (ko) * 1997-08-22 2006-04-21 삼성전자주식회사 반도체기억소자및그제조방법
US5973374A (en) * 1997-09-25 1999-10-26 Integrated Silicon Solution, Inc. Flash memory array having well contact structures
US6492675B1 (en) 1998-01-16 2002-12-10 Advanced Micro Devices, Inc. Flash memory array with dual function control lines and asymmetrical source and drain junctions
US6529410B1 (en) * 2000-09-20 2003-03-04 Advanced Micro Devices, Inc. NAND array structure and method with buried layer
JP2003068894A (ja) * 2001-08-29 2003-03-07 Sharp Corp 半導体記憶装置およびその形成方法
US7027316B2 (en) * 2003-12-29 2006-04-11 Micron Technology, Inc. Access circuit and method for allowing external test voltage to be applied to isolated wells
US8288813B2 (en) * 2004-08-13 2012-10-16 Infineon Technologies Ag Integrated memory device having columns having multiple bit lines
JP4854955B2 (ja) * 2004-12-10 2012-01-18 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
CN103887336B (zh) * 2012-12-19 2016-06-15 旺宏电子股份有限公司 半导体结构及其制造方法
US9035386B2 (en) * 2012-12-21 2015-05-19 Macronix International Co., Ltd. Semiconductor structure and method for manufacturing the same
TWI682388B (zh) * 2018-01-17 2020-01-11 旺宏電子股份有限公司 半導體元件
CN109037225B (zh) * 2018-09-19 2023-09-12 长江存储科技有限责任公司 存储器结构
US11416666B1 (en) * 2021-03-04 2022-08-16 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit and method for forming the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4429326A (en) * 1978-11-29 1984-01-31 Hitachi, Ltd. I2 L Memory with nonvolatile storage
DE3483765D1 (de) * 1983-09-28 1991-01-31 Toshiba Kawasaki Kk Elektrisch loeschbare und programmierbare nichtfluechtige halbleiterspeicheranordnung mit zwei gate-elektroden.
JPH073811B2 (ja) * 1985-04-12 1995-01-18 株式会社日立製作所 半導体記憶装置
JPH02295171A (ja) * 1989-05-09 1990-12-06 Fujitsu Ltd 半導体装置及びその製造方法
JPH03105971A (ja) * 1989-09-20 1991-05-02 Hitachi Ltd 半導体集積回路装置
JPH07123145B2 (ja) * 1990-06-27 1995-12-25 株式会社東芝 半導体集積回路
US5243559A (en) * 1990-12-12 1993-09-07 Nippon Steel Corporation Semiconductor memory device
JP3152762B2 (ja) * 1992-10-06 2001-04-03 富士通株式会社 不揮発性半導体記憶装置
JPH06318684A (ja) * 1993-05-10 1994-11-15 Kobe Steel Ltd 不揮発性半導体メモリ装置

Also Published As

Publication number Publication date
JP5185710B2 (ja) 2013-04-17
JP2008270838A (ja) 2008-11-06
JPH0851193A (ja) 1996-02-20
EP0690508B1 (de) 2002-09-11
KR100366599B1 (ko) 2003-04-26
US5541875A (en) 1996-07-30
EP0690508A3 (de) 1997-09-10
DE69528118T2 (de) 2003-04-30
EP0690508A2 (de) 1996-01-03
ATE224102T1 (de) 2002-09-15
KR960006053A (ko) 1996-02-23

Similar Documents

Publication Publication Date Title
DE69528118D1 (de) Speichermatrix mit einer vergrabenen Schicht und Löschverfahren
US4376947A (en) Electrically programmable floating gate semiconductor memory device
TW338193B (en) Non-volatile semiconductor memory
KR960043250A (ko) 반도체 장치
US7057931B2 (en) Flash memory programming using gate induced junction leakage current
EP0948058B1 (de) Speicher mit schwebendem Gate mit durch Band-zu-Band-Tunneleffekt induzierter Einspritzung heisser Elektronen aus dem Substrat
US4467453A (en) Electrically programmable floating gate semiconductor memory device
US20070159880A1 (en) Secondary injection for NROM
TW359041B (en) Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping
KR970018492A (ko) 불휘발성 메모리 셀 및 그 제조방법
JPS57105889A (en) Semiconductor storage device
US4514897A (en) Electrically programmable floating gate semiconductor memory device
EP1103980A3 (de) Nichtflüchtiger Halbleiterspeicher mit Zwei-Bitzellen
CN102460706A (zh) 存储器单元、阵列、以及制造存储器单元的方法
TW265476B (en) A self-aligned buried channel/junction stacked gate flash memory cell
TW200409303A (en) Lateral doped channel
JP2963882B2 (ja) フラッシュメモリセルのプログラム方法
JP2806552B2 (ja) 半導体不揮発性記憶装置
KR890001102A (ko) 펄스로 지울 수 있는 eprom 및 지우는 방법
JPH0352269A (ja) 紫外線消去型半導体不揮発性メモリ
Shichijo et al. Characterization of n-channel and p-channel LPCVD polysilicon MOSFETs
CN100386883C (zh) 非易失性存储单元及其操作方法与非易失性内存
JP2547533B2 (ja) 光起電力装置のエイジング方法
EP0069233A2 (de) Speicheranordnung und Verfahren zu seiner Herstellung
Hijiya et al. Electrically alterable read-only memory cell with graded energy band-gap insulator

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: SPANSION LLC (N.D.GES.D. STAATES DELAWARE), SU, US