DE69518428D1 - Speicher mit stress-schaltung zum erkennen von fehlern - Google Patents

Speicher mit stress-schaltung zum erkennen von fehlern

Info

Publication number
DE69518428D1
DE69518428D1 DE69518428T DE69518428T DE69518428D1 DE 69518428 D1 DE69518428 D1 DE 69518428D1 DE 69518428 T DE69518428 T DE 69518428T DE 69518428 T DE69518428 T DE 69518428T DE 69518428 D1 DE69518428 D1 DE 69518428D1
Authority
DE
Germany
Prior art keywords
memory
detect errors
stress circuit
stress
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69518428T
Other languages
English (en)
Other versions
DE69518428T2 (de
Inventor
Eitan Rosen
Yakov Milstain
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE69518428D1 publication Critical patent/DE69518428D1/de
Publication of DE69518428T2 publication Critical patent/DE69518428T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C29/50016Marginal testing, e.g. race, voltage or current testing of retention
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
DE69518428T 1994-07-19 1995-06-16 Speicher mit stress-schaltung zum erkennen von fehlern Expired - Lifetime DE69518428T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/277,148 US5570317A (en) 1994-07-19 1994-07-19 Memory circuit with stress circuitry for detecting defects
PCT/US1995/007745 WO1996002916A1 (en) 1994-07-19 1995-06-16 Memory with stress circuitry for detecting defects

Publications (2)

Publication Number Publication Date
DE69518428D1 true DE69518428D1 (de) 2000-09-21
DE69518428T2 DE69518428T2 (de) 2001-03-29

Family

ID=23059596

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69518428T Expired - Lifetime DE69518428T2 (de) 1994-07-19 1995-06-16 Speicher mit stress-schaltung zum erkennen von fehlern

Country Status (8)

Country Link
US (1) US5570317A (de)
EP (1) EP0782747B1 (de)
JP (1) JP3701973B2 (de)
CN (1) CN1122280C (de)
AU (1) AU2865195A (de)
BR (1) BR9508297A (de)
DE (1) DE69518428T2 (de)
WO (1) WO1996002916A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6105152A (en) * 1993-04-13 2000-08-15 Micron Technology, Inc. Devices and methods for testing cell margin of memory devices
US6079037A (en) * 1997-08-20 2000-06-20 Micron Technology, Inc. Method and apparatus for detecting intercell defects in a memory device
US6157210A (en) 1997-10-16 2000-12-05 Altera Corporation Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits
FR2772970B1 (fr) * 1997-12-24 2003-09-26 Sgs Thomson Microelectronics Procede de test d'une memoire dynamique
US6697978B1 (en) * 1999-10-25 2004-02-24 Bae Systems Information And Electronic Systems Integration Inc. Method for testing of known good die
US6256241B1 (en) * 2000-03-30 2001-07-03 Intel Corporation Short write test mode for testing static memory cells
US7254692B1 (en) * 2004-03-02 2007-08-07 Advanced Micro Devices, Inc. Testing for operating life of a memory device with address cycling using a gray code sequence
KR100924579B1 (ko) * 2007-06-21 2009-11-02 삼성전자주식회사 리던던시 메모리 셀 억세스 회로, 이를 포함하는 반도체메모리 장치, 및 반도체 메모리 장치의 테스트 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0612619B2 (ja) * 1982-09-22 1994-02-16 株式会社日立製作所 半導体メモリ装置
JPH0682520B2 (ja) * 1987-07-31 1994-10-19 株式会社東芝 半導体メモリ
US5062079A (en) * 1988-09-28 1991-10-29 Kabushiki Kaisha Toshiba MOS type random access memory with interference noise eliminator
JPH0766664B2 (ja) * 1988-11-28 1995-07-19 日本電気株式会社 半導体メモリ回路
JPH03278396A (ja) * 1990-03-27 1991-12-10 Nec Corp 半導体記憶装置
JPH0756759B2 (ja) * 1990-12-27 1995-06-14 株式会社東芝 スタティック型半導体記憶装置
US5166608A (en) * 1991-11-07 1992-11-24 Advanced Micro Devices, Inc. Arrangement for high speed testing of field-effect transistors and memory cells employing the same
US5255230A (en) * 1991-12-31 1993-10-19 Intel Corporation Method and apparatus for testing the continuity of static random access memory cells
JPH06309869A (ja) * 1993-04-28 1994-11-04 Oki Electric Ind Co Ltd 半導体記憶装置

Also Published As

Publication number Publication date
JPH10505701A (ja) 1998-06-02
CN1122280C (zh) 2003-09-24
EP0782747B1 (de) 2000-08-16
AU2865195A (en) 1996-02-16
DE69518428T2 (de) 2001-03-29
JP3701973B2 (ja) 2005-10-05
CN1155938A (zh) 1997-07-30
EP0782747A4 (de) 1998-09-23
EP0782747A1 (de) 1997-07-09
US5570317A (en) 1996-10-29
BR9508297A (pt) 1998-07-14
WO1996002916A1 (en) 1996-02-01

Similar Documents

Publication Publication Date Title
DE69615462T2 (de) Geschirrspülmaschine mit anordnung zum messen von trübungen
DE69528916D1 (de) Synchroner Speicher mit parallelen Ausgangsdatenwegen
DE69410536D1 (de) Solarmodul mit warm-verschweisstem Teil zur Verbesserung der Feuchtigkeitsbeständigkeit
DE69406346D1 (de) Schnittstellenschaltung mit niedrigem Verbrauch
DE3884859D1 (de) Dynamische Speicherschaltung mit einem Abfühlschema.
DE3688267D1 (de) Karte mit elektronischem speicher.
DE69033792T2 (de) Schaltung zum Testen von Drahtpaaren
DE3867964D1 (de) Speicherchip mit pipelinewirkung.
DE69025520D1 (de) Speicher mit verbessertem Bitzeilenausgleich
DE69523690D1 (de) Mikroprozessor mit Registerspeicher
DE3783927D1 (de) Schaltkreis zum detektieren hoher spannungen.
DE3883865D1 (de) Halbleiterspeicheranordnung mit einem Register.
DE68909960D1 (de) Speicherschaltung mit einer Anordnung zum verbesserten seriellen Zugriff.
DE69627724T2 (de) Ferroelektrischer Speicher mit Rücksetzschaltung
DE68909959D1 (de) Schaltung zum Abfühlen des Zustandes von Matrixzellen in MOS-EPROM-Speichern.
DE69518428T2 (de) Speicher mit stress-schaltung zum erkennen von fehlern
DE69512551T2 (de) Integrierter Speicher mit Spaltenspannungserhaltungsschaltung
DE59405111D1 (de) Mikrorechner mit überwachungsschaltung
DE69032776D1 (de) Steuerungsschaltung zum Zugriff auf partiellen Speicher
DE69400402D1 (de) Integrierte Speicherschaltung mit verbesserter Lesezeit
DE68925616D1 (de) Adressenübergangsabfühlschaltung
DE3480960D1 (de) Speichereinrichtung mit registerumtauschfunktion.
KR900700863A (ko) 브릿지 회로에서 동작되는 플로우 탐침을 갖는 회로 장치
DE69415759T2 (de) Ausgangschaltung für Speicherschaltung mit mehreren Bits
DE68918101D1 (de) Speicher mit Seitenmodus.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition