DE69406346D1 - Schnittstellenschaltung mit niedrigem Verbrauch - Google Patents

Schnittstellenschaltung mit niedrigem Verbrauch

Info

Publication number
DE69406346D1
DE69406346D1 DE69406346T DE69406346T DE69406346D1 DE 69406346 D1 DE69406346 D1 DE 69406346D1 DE 69406346 T DE69406346 T DE 69406346T DE 69406346 T DE69406346 T DE 69406346T DE 69406346 D1 DE69406346 D1 DE 69406346D1
Authority
DE
Germany
Prior art keywords
interface circuit
low consumption
consumption
low
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69406346T
Other languages
English (en)
Inventor
Robert Heath Dennard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69406346D1 publication Critical patent/DE69406346D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
  • Manipulation Of Pulses (AREA)
DE69406346T 1993-04-20 1994-04-06 Schnittstellenschaltung mit niedrigem Verbrauch Expired - Lifetime DE69406346D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/049,912 US5378943A (en) 1993-04-20 1993-04-20 Low power interface circuit

Publications (1)

Publication Number Publication Date
DE69406346D1 true DE69406346D1 (de) 1997-11-27

Family

ID=21962416

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69406346T Expired - Lifetime DE69406346D1 (de) 1993-04-20 1994-04-06 Schnittstellenschaltung mit niedrigem Verbrauch

Country Status (4)

Country Link
US (1) US5378943A (de)
EP (1) EP0621694B1 (de)
JP (1) JP2986333B2 (de)
DE (1) DE69406346D1 (de)

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US5495184A (en) * 1995-01-12 1996-02-27 Vlsi Technology, Inc. High-speed low-power CMOS PECL I/O transmitter
US5541534A (en) * 1995-02-13 1996-07-30 International Business Machines Corporation Mixed voltage interface converter
US5568062A (en) * 1995-07-14 1996-10-22 Kaplinsky; Cecil H. Low noise tri-state output buffer
DE19536020C1 (de) * 1995-09-27 1997-02-20 Siemens Ag Bidirektionale Treiberschaltung für PCI-Bussysteme
US5892371A (en) * 1996-02-12 1999-04-06 Advanced Micro Devices, Inc. Gate oxide voltage limiting devices for digital circuits
US5874836A (en) * 1996-09-06 1999-02-23 International Business Machines Corporation High reliability I/O stacked fets
US5926055A (en) * 1996-12-20 1999-07-20 Cirrus Logic, Inc. Five volt output connection for a chip manufactured in a three volt process
US5914617A (en) * 1996-12-23 1999-06-22 Lsi Logic Corporation Output driver for sub-micron CMOS
US5804998A (en) * 1996-12-26 1998-09-08 International Business Machines Corporation Voltage upwardly compliant CMOS off-chip driver
KR100273206B1 (ko) * 1997-01-11 2000-12-15 김영환 문턱전압 변화에 둔감한 레벨쉬프터
DE19713833C1 (de) * 1997-04-03 1998-10-01 Siemens Ag Eingangsverstärker für Eingangssignale mit steilen Flanken, insbesondere High-Low-Flanken
DE19713832C1 (de) * 1997-04-03 1998-11-12 Siemens Ag Eingangsverstärker für Eingangssignale mit steilen Flanken
DE19719448A1 (de) * 1997-05-07 1998-11-12 Siemens Ag Inverterschaltung
JP3000962B2 (ja) * 1997-06-13 2000-01-17 日本電気株式会社 出力回路
US6084430A (en) * 1997-12-31 2000-07-04 Intel Corporation Input buffer for a mixed voltage environment
EP0928068A1 (de) 1997-12-31 1999-07-07 STMicroelectronics S.r.l. TTL-CMOS Eingangspufferstufe mit geringem Leistungsverbrauch
US6018257A (en) * 1998-03-23 2000-01-25 Lsi Logic Corporation Output drive circuit tolerant of higher voltage signals
US6087881A (en) * 1998-07-23 2000-07-11 International Business Machines Corporation Integrated circuit dual level shift predrive circuit
US6054888A (en) * 1998-10-02 2000-04-25 Advanced Micro Devices, Inc. Level shifter with protective limit of voltage across terminals of devices within the level shifter
US6081152A (en) * 1998-10-02 2000-06-27 Advanced Micro Devices, Inc. Output buffer with protective limit of voltage across terminals of devices within the output buffer
US6489819B1 (en) 1998-10-27 2002-12-03 Mitsubishi Denki Kabushiki Kaisha Clock synchronous semiconductor memory device allowing testing by low speed tester
JP3556533B2 (ja) * 1999-07-27 2004-08-18 シャープ株式会社 レベルシフタ回路
US6388469B1 (en) * 1999-08-13 2002-05-14 Cypress Semiconductor Corp. Multiple power supply output driver
US6252450B1 (en) * 1999-09-09 2001-06-26 Stmicroelectronics, Inc. Circuit and method for writing to a memory disk
US6417696B1 (en) 1999-12-20 2002-07-09 Cypress Semiconductor Corp. Interface circuit for mixed voltage I/O buffer to provide gate oxide protection
US6255867B1 (en) * 2000-02-23 2001-07-03 Pericom Semiconductor Corp. CMOS output buffer with feedback control on sources of pre-driver stage
US6335637B1 (en) 2000-04-03 2002-01-01 International Business Machines Corporation Two-supply protection circuit
US6262599B1 (en) 2000-04-06 2001-07-17 International Business Machines Corporation Level shifting CMOS I/O buffer
JP3617425B2 (ja) 2000-07-28 2005-02-02 株式会社デンソー 半導体集積回路装置の入力インターフェイス回路
US6504666B1 (en) 2000-08-30 2003-01-07 Stmicroelectronics, Inc. Write head driver circuit and method for writing to a memory disk
US6512649B1 (en) 2000-08-30 2003-01-28 Stmicroelectronics, Inc. Method for differentially writing to a memory disk
US6570401B2 (en) 2001-01-10 2003-05-27 International Business Machines Corporation Dual rail power supply sequence tolerant off-chip driver
FI20010404A0 (fi) * 2001-02-28 2001-02-28 Nokia Mobile Phones Ltd Logiikkatason siirtopiiri
US6970316B2 (en) * 2001-11-09 2005-11-29 Stmicroelectronics, Inc. Write head driver circuit and method for writing to a memory disk
CN100380811C (zh) * 2002-12-13 2008-04-09 株式会社半导体能源研究所 半导体器件和使用该半导体器件的显示器件
JP4025203B2 (ja) * 2003-01-08 2007-12-19 株式会社リコー レベルシフト回路
US6900662B2 (en) * 2003-05-16 2005-05-31 International Business Machines Corporation Level translator circuit for power supply disablement
US6861873B2 (en) * 2003-05-16 2005-03-01 International Business Machines Corporation Level translator circuit for power supply disablement
US7301370B1 (en) * 2003-05-22 2007-11-27 Cypress Semiconductor Corporation High-speed differential logic to CMOS translator architecture with low data-dependent jitter and duty cycle distortion
US7119578B2 (en) 2003-11-24 2006-10-10 International Business Machines Corp. Single supply level converter
US7088149B2 (en) * 2003-11-29 2006-08-08 Texas Instruments Incorporated Enhancing SNR and throughput performance of integrated circuits
TWI229507B (en) * 2004-03-19 2005-03-11 Via Tech Inc Apparatus for transferring various voltage levels to digital ouput voltage levels
JP2006019927A (ja) * 2004-06-30 2006-01-19 Fujitsu Ltd ｋＴＣ雑音を低減したＣＭＯＳイメージセンサ、同イメージセンサの用いるリセットトランジスタ制御回路、および同制御回路に用いる電圧切替回路
US7705642B2 (en) * 2007-02-08 2010-04-27 Mosaid Technologies Incorporated Simplified bias circuitry for differential buffer stage with symmetric loads
US7626440B1 (en) * 2007-07-04 2009-12-01 Altera Corporation High speed level shift
JP2007306632A (ja) * 2007-08-24 2007-11-22 Ricoh Co Ltd レベルシフト回路
US7969191B2 (en) * 2008-02-06 2011-06-28 Synopsys, Inc. Low-swing CMOS input circuit
US7863962B2 (en) * 2008-04-17 2011-01-04 National Semiconductor Corporation High voltage CMOS output buffer constructed from low voltage CMOS transistors
DE102009039368A1 (de) * 2008-11-10 2010-05-12 Robert Bosch Gmbh Ausgangsschaltung für eine Transceiverschaltung für ein Bussystem und Transceiverschaltung für ein Bussystem
US8217703B2 (en) * 2010-06-30 2012-07-10 Analog Devices, Inc. Low power fast level shifter
US9166591B1 (en) 2012-02-03 2015-10-20 Altera Corporation High speed IO buffer
US8816720B2 (en) * 2012-04-17 2014-08-26 Oracle International Corporation Single power supply logic level shifter circuit
US9806611B2 (en) 2012-06-29 2017-10-31 Taiwan Semiconductor Manufacturing Company, Ltd. Voltage generating circuits based on a power-on control signal
US9628080B2 (en) 2012-06-29 2017-04-18 Taiwan Semiconductor Manufacturing Company, Ltd. Voltage generating circuits based on a power-on control signal

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Publication number Priority date Publication date Assignee Title
US4501978A (en) * 1982-11-24 1985-02-26 Rca Corporation Level shift interface circuit
JPH0738583B2 (ja) * 1985-01-26 1995-04-26 株式会社東芝 半導体集積回路
GB2192105A (en) * 1986-06-25 1987-12-31 Philips Nv Cmos-input circuit
US4825106A (en) * 1987-04-08 1989-04-25 Ncr Corporation MOS no-leak circuit
US4859870A (en) * 1987-10-14 1989-08-22 Lsi Logic Incorporated Two-mode driver circuit
JPH0777343B2 (ja) * 1988-01-14 1995-08-16 日本電気株式会社 出力バッファ回路
KR910005609B1 (ko) * 1988-07-19 1991-07-31 삼성전자 주식회사 복수전압 ic용 입력신호 로직 판별회로
US5087841A (en) * 1990-04-09 1992-02-11 National Semiconductor Corporation TTL to CMOS translating circuits without static current
US5151620A (en) * 1991-03-25 1992-09-29 Industrial Technology Research Institute CMOS input buffer with low power consumption
US5160855A (en) * 1991-06-28 1992-11-03 Digital Equipment Corporation Floating-well CMOS output driver
US5223751A (en) * 1991-10-29 1993-06-29 Vlsi Technology, Inc. Logic level shifter for 3 volt cmos to 5 volt cmos or ttl
JP3071911B2 (ja) * 1991-11-29 2000-07-31 株式会社東芝 Ｃｍｏｓ型入力回路
JPH06152341A (ja) * 1992-10-30 1994-05-31 Nec Corp バッファリング回路

Also Published As

Publication number Publication date
EP0621694A3 (de) 1995-04-12
EP0621694A2 (de) 1994-10-26
JPH06326595A (ja) 1994-11-25
JP2986333B2 (ja) 1999-12-06
US5378943A (en) 1995-01-03
EP0621694B1 (de) 1997-10-22

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Legal Events

Date Code Title Description
8332 No legal effect for de
8370 Indication of lapse of patent is to be deleted
8332 No legal effect for de