FI20010404A0 - Logiikkatason siirtopiiri - Google Patents

Logiikkatason siirtopiiri

Info

Publication number
FI20010404A0
FI20010404A0 FI20010404A FI20010404A FI20010404A0 FI 20010404 A0 FI20010404 A0 FI 20010404A0 FI 20010404 A FI20010404 A FI 20010404A FI 20010404 A FI20010404 A FI 20010404A FI 20010404 A0 FI20010404 A0 FI 20010404A0
Authority
FI
Finland
Prior art keywords
switching circuit
logic level
level switching
logic
circuit
Prior art date
Application number
FI20010404A
Other languages
English (en)
Swedish (sv)
Inventor
Vesa-Matti Salminen
Original Assignee
Nokia Mobile Phones Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Mobile Phones Ltd filed Critical Nokia Mobile Phones Ltd
Priority to FI20010404A priority Critical patent/FI20010404A0/fi
Publication of FI20010404A0 publication Critical patent/FI20010404A0/fi
Priority to EP02396014A priority patent/EP1237278A1/en
Priority to US10/074,079 priority patent/US20020118040A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
FI20010404A 2001-02-28 2001-02-28 Logiikkatason siirtopiiri FI20010404A0 (fi)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FI20010404A FI20010404A0 (fi) 2001-02-28 2001-02-28 Logiikkatason siirtopiiri
EP02396014A EP1237278A1 (en) 2001-02-28 2002-02-07 Logic level shifting circuit
US10/074,079 US20020118040A1 (en) 2001-02-28 2002-02-12 Logic level shifting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20010404A FI20010404A0 (fi) 2001-02-28 2001-02-28 Logiikkatason siirtopiiri

Publications (1)

Publication Number Publication Date
FI20010404A0 true FI20010404A0 (fi) 2001-02-28

Family

ID=8560572

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20010404A FI20010404A0 (fi) 2001-02-28 2001-02-28 Logiikkatason siirtopiiri

Country Status (3)

Country Link
US (1) US20020118040A1 (fi)
EP (1) EP1237278A1 (fi)
FI (1) FI20010404A0 (fi)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112904122A (zh) * 2021-01-22 2021-06-04 维沃移动通信有限公司 插入检测电路及电子设备

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3730963B2 (ja) * 2003-01-21 2006-01-05 沖電気工業株式会社 半導体集積回路
WO2006103624A1 (en) * 2005-03-31 2006-10-05 Nxp B.V. Electronic device
KR20110011988A (ko) * 2009-07-29 2011-02-09 삼성전자주식회사 레벨 시프터 및 이를 이용한 표시 장치
DE102011084985A1 (de) * 2010-11-12 2012-05-16 Samsung Electronics Co., Ltd. Pegelschieber sowie System-auf-Chip und Multimedia-Bauelement mit selbigem
WO2021263277A1 (en) * 2020-06-24 2021-12-30 Microchip Technology Incorporated Recognizing transistor-transistor logic levels (ttl) at an input circuit with increased immunity to static current draw
DE112021007228T5 (de) 2021-03-08 2024-01-11 Microchip Technology Incorporated Selektiv kreuzgekoppelte wechselrichter und zugehörige vorrichtungen, systeme und verfahren
CN114389598A (zh) * 2022-03-23 2022-04-22 武汉市聚芯微电子有限责任公司 一种转换装置、接口电路及芯片

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5087841A (en) * 1990-04-09 1992-02-11 National Semiconductor Corporation TTL to CMOS translating circuits without static current
US5304867A (en) * 1991-12-12 1994-04-19 At&T Bell Laboratories CMOS input buffer with high speed and low power
US5378943A (en) * 1993-04-20 1995-01-03 International Business Machines Corporation Low power interface circuit
JP3205185B2 (ja) * 1994-08-16 2001-09-04 株式会社 沖マイクロデザイン レベル変換回路
US5955893A (en) * 1996-12-16 1999-09-21 Macronix International Co., Ltd. Power saving buffer circuit buffer bias voltages
DE19719448A1 (de) * 1997-05-07 1998-11-12 Siemens Ag Inverterschaltung

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112904122A (zh) * 2021-01-22 2021-06-04 维沃移动通信有限公司 插入检测电路及电子设备

Also Published As

Publication number Publication date
EP1237278A1 (en) 2002-09-04
US20020118040A1 (en) 2002-08-29

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