DE69429225T2 - Ruhestromprüfbarer RAM - Google Patents
Ruhestromprüfbarer RAMInfo
- Publication number
- DE69429225T2 DE69429225T2 DE69429225T DE69429225T DE69429225T2 DE 69429225 T2 DE69429225 T2 DE 69429225T2 DE 69429225 T DE69429225 T DE 69429225T DE 69429225 T DE69429225 T DE 69429225T DE 69429225 T2 DE69429225 T2 DE 69429225T2
- Authority
- DE
- Germany
- Prior art keywords
- cells
- memory
- circuit
- test
- columns
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000012360 testing method Methods 0.000 claims abstract description 81
- 230000015654 memory Effects 0.000 claims abstract description 64
- 230000005689 Fowler Nordheim tunneling Effects 0.000 claims description 3
- 230000002950 deficient Effects 0.000 claims description 3
- 230000007547 defect Effects 0.000 abstract description 10
- 238000013500 data storage Methods 0.000 description 12
- 238000000034 method Methods 0.000 description 12
- 239000003990 capacitor Substances 0.000 description 10
- 238000010998 test method Methods 0.000 description 9
- 238000005259 measurement Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 238000012544 monitoring process Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 238000011990 functional testing Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000036962 time dependent Effects 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 230000001174 ascending effect Effects 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
- 238000001444 catalytic combustion detection Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 208000024891 symptom Diseases 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
- 238000012956 testing procedure Methods 0.000 description 1
- 230000035899 viability Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50016—Marginal testing, e.g. race, voltage or current testing of retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/30—Accessing single arrays
- G11C29/34—Accessing multiple bits simultaneously
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP93202555 | 1993-09-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69429225D1 DE69429225D1 (de) | 2002-01-10 |
| DE69429225T2 true DE69429225T2 (de) | 2002-08-14 |
Family
ID=8214072
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69429225T Expired - Lifetime DE69429225T2 (de) | 1993-09-01 | 1994-08-31 | Ruhestromprüfbarer RAM |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US5491665A (enExample) |
| JP (1) | JP3690827B2 (enExample) |
| KR (1) | KR100339321B1 (enExample) |
| DE (1) | DE69429225T2 (enExample) |
| MY (1) | MY131610A (enExample) |
| SG (1) | SG48339A1 (enExample) |
| TW (1) | TW260788B (enExample) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07159496A (ja) * | 1993-10-12 | 1995-06-23 | At & T Global Inf Solutions Internatl Inc | 集積回路の検査のための装置及びその方法 |
| EP0691612A1 (en) * | 1994-07-07 | 1996-01-10 | International Business Machines Corporation | A test circuit of embedded arrays in mixed logic and memory chips |
| KR0142638B1 (ko) * | 1994-12-27 | 1998-08-17 | 김주용 | 플래쉬 메모리 장치 |
| JP2783243B2 (ja) * | 1996-02-06 | 1998-08-06 | 日本電気株式会社 | Ｃｍｏｓ集積回路の故障検出方法及び装置 |
| JPH09292438A (ja) * | 1996-04-30 | 1997-11-11 | Toshiba Corp | Ｃｍｏｓ集積回路装置、その検査方法及び検査装置 |
| US5745405A (en) * | 1996-08-26 | 1998-04-28 | Taiwan Semiconductor Manufacturing Company, Ltd | Process leakage evaluation and measurement method |
| US6551857B2 (en) * | 1997-04-04 | 2003-04-22 | Elm Technology Corporation | Three dimensional structure integrated circuits |
| US5835429A (en) * | 1997-05-09 | 1998-11-10 | Lsi Logic Corporation | Data retention weak write circuit and method of using same |
| JPH11260924A (ja) * | 1998-03-10 | 1999-09-24 | Mitsubishi Electric Corp | 半導体集積回路装置のテスト方法 |
| ITMI981564A1 (it) * | 1998-07-09 | 2000-01-09 | St Microelectronics Srl | Memoria non volatile in grado di eseguire un programma autonomamente |
| US6141272A (en) * | 1999-09-02 | 2000-10-31 | Micron Technology, Inc. | Method and apparatus for programmable control signal generation for a semiconductor device |
| JP2001283598A (ja) * | 2000-03-29 | 2001-10-12 | Nec Kansai Ltd | Ｓｒａｍペレットにおける冗長回路切り替えのための検査方法 |
| US6208572B1 (en) * | 2000-06-12 | 2001-03-27 | International Business Machines Corporation | Semiconductor memory device having resistive bitline contact testing |
| US6549483B2 (en) * | 2001-03-30 | 2003-04-15 | Atmos Corporation | RAM having dynamically switchable access modes |
| US6681350B2 (en) * | 2001-05-05 | 2004-01-20 | Cadence Design Systems, Inc. | Method and apparatus for testing memory cells for data retention faults |
| US7053647B2 (en) * | 2004-05-07 | 2006-05-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of detecting potential bridging effects between conducting lines in an integrated circuit |
| US7216270B1 (en) | 2004-05-14 | 2007-05-08 | National Semiconductor Corporation | System and method for providing testing and failure analysis of integrated circuit memory devices |
| DE102004040750B4 (de) * | 2004-08-23 | 2008-03-27 | Qimonda Ag | Speicherzellenanordnung mit Speicherzellen vom CBRAM-Typ und Verfahren zum Programmieren derselben |
| US7855924B2 (en) * | 2006-05-19 | 2010-12-21 | Arm Limited | Data processing memory circuit having pull-down circuit with on/off configuration |
| US20080198674A1 (en) * | 2007-02-21 | 2008-08-21 | Jan Keller | Method of testing an integrated circuit, method of determining defect resistivity changing cells, testing device, and computer program adapted to perform a method for testing an integrated circuit |
| KR20090002849A (ko) * | 2007-07-04 | 2009-01-09 | 삼성전자주식회사 | 비트라인 누설 전류를 검출하는 메모리 장치 |
| US8526252B2 (en) * | 2009-03-17 | 2013-09-03 | Seagate Technology Llc | Quiescent testing of non-volatile memory array |
| US10437557B2 (en) * | 2018-01-31 | 2019-10-08 | Micron Technology, Inc. | Determination of a match between data values stored by several arrays |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2812004B2 (ja) * | 1991-06-27 | 1998-10-15 | 日本電気株式会社 | スタティック型ランダムアクセスメモリ装置 |
| KR940006676B1 (ko) * | 1991-10-14 | 1994-07-25 | 삼성전자 주식회사 | 시험회로를 내장한 기억용 반도체 집적회로 |
-
1994
- 1994-03-30 TW TW083102779A patent/TW260788B/zh not_active IP Right Cessation
- 1994-08-26 MY MYPI94002242A patent/MY131610A/en unknown
- 1994-08-30 JP JP20524894A patent/JP3690827B2/ja not_active Expired - Fee Related
- 1994-08-31 KR KR1019940022236A patent/KR100339321B1/ko not_active Expired - Fee Related
- 1994-08-31 US US08/299,043 patent/US5491665A/en not_active Expired - Lifetime
- 1994-08-31 DE DE69429225T patent/DE69429225T2/de not_active Expired - Lifetime
- 1994-08-31 SG SG1996009007A patent/SG48339A1/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| MY131610A (en) | 2007-08-30 |
| US5491665A (en) | 1996-02-13 |
| KR100339321B1 (ko) | 2002-11-23 |
| TW260788B (enExample) | 1995-10-21 |
| DE69429225D1 (de) | 2002-01-10 |
| JPH0785700A (ja) | 1995-03-31 |
| SG48339A1 (en) | 1998-04-17 |
| KR950009742A (ko) | 1995-04-24 |
| JP3690827B2 (ja) | 2005-08-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8328 | Change in the person/name/address of the agent |
Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN |
|
| 8327 | Change in the person/name/address of the patent owner |
Owner name: NXP B.V., EINDHOVEN, NL |