DE69422349T2 - Dynamische Direktzugriffspeicher-Anordnung für schnellen sequentiellen Zugriff, mit Leseverstärkern, die unabhängig vom Zeilen-Adresspuffer sind und als Cache-Speicher dienen - Google Patents

Dynamische Direktzugriffspeicher-Anordnung für schnellen sequentiellen Zugriff, mit Leseverstärkern, die unabhängig vom Zeilen-Adresspuffer sind und als Cache-Speicher dienen

Info

Publication number
DE69422349T2
DE69422349T2 DE69422349T DE69422349T DE69422349T2 DE 69422349 T2 DE69422349 T2 DE 69422349T2 DE 69422349 T DE69422349 T DE 69422349T DE 69422349 T DE69422349 T DE 69422349T DE 69422349 T2 DE69422349 T2 DE 69422349T2
Authority
DE
Germany
Prior art keywords
serve
independent
dynamic random
row address
sense amplifiers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69422349T
Other languages
English (en)
Other versions
DE69422349D1 (de
Inventor
Sachiko Kamisaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Memory Japan Ltd
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69422349D1 publication Critical patent/DE69422349D1/de
Publication of DE69422349T2 publication Critical patent/DE69422349T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4082—Address Buffers; level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
DE69422349T 1993-08-18 1994-08-18 Dynamische Direktzugriffspeicher-Anordnung für schnellen sequentiellen Zugriff, mit Leseverstärkern, die unabhängig vom Zeilen-Adresspuffer sind und als Cache-Speicher dienen Expired - Lifetime DE69422349T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5225185A JP2894170B2 (ja) 1993-08-18 1993-08-18 メモリ装置

Publications (2)

Publication Number Publication Date
DE69422349D1 DE69422349D1 (de) 2000-02-03
DE69422349T2 true DE69422349T2 (de) 2000-08-24

Family

ID=16825300

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69422349T Expired - Lifetime DE69422349T2 (de) 1993-08-18 1994-08-18 Dynamische Direktzugriffspeicher-Anordnung für schnellen sequentiellen Zugriff, mit Leseverstärkern, die unabhängig vom Zeilen-Adresspuffer sind und als Cache-Speicher dienen

Country Status (5)

Country Link
US (1) US5528552A (de)
EP (1) EP0639835B1 (de)
JP (1) JP2894170B2 (de)
KR (1) KR0168464B1 (de)
DE (1) DE69422349T2 (de)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69324508T2 (de) * 1992-01-22 1999-12-23 Enhanced Memory Systems Inc DRAM mit integrierten Registern
JP3176228B2 (ja) * 1994-08-23 2001-06-11 シャープ株式会社 半導体記憶装置
JP2630277B2 (ja) * 1994-10-24 1997-07-16 日本電気株式会社 半導体記憶装置
US5787267A (en) * 1995-06-07 1998-07-28 Monolithic System Technology, Inc. Caching method and circuit for a memory system with circuit module architecture
JP3252666B2 (ja) * 1995-08-14 2002-02-04 日本電気株式会社 半導体記憶装置
US5625790A (en) * 1995-09-14 1997-04-29 Micron Technology, Inc. Method and apparatus for reducing the access time of a memory device by decoding a row address during a precharge period of the memory device
US5654932A (en) * 1995-10-04 1997-08-05 Cirrus Logic, Inc. Memory devices with selectable access type and methods using the same
JP3169814B2 (ja) * 1995-10-13 2001-05-28 日本電気株式会社 半導体記憶装置
KR0172345B1 (ko) * 1995-11-27 1999-03-30 김광호 반도체 메모리 장치의 하이퍼 페이지 모드의 데이터 출력신호 제어회로
US5636174A (en) * 1996-01-11 1997-06-03 Cirrus Logic, Inc. Fast cycle time-low latency dynamic random access memories and systems and methods using the same
JP3531891B2 (ja) * 1996-01-26 2004-05-31 シャープ株式会社 半導体記憶装置
JP3184085B2 (ja) * 1996-03-01 2001-07-09 株式会社東芝 半導体記憶装置
US6094398A (en) * 1996-09-30 2000-07-25 Siemens Aktiengesellschaft DRAM including an address space divided into individual blocks having memory cells activated by row address signals
CN1158663C (zh) * 1996-09-30 2004-07-21 西门子公司 动态随机存储器
US6167486A (en) 1996-11-18 2000-12-26 Nec Electronics, Inc. Parallel access virtual channel memory system with cacheable channels
US5825710A (en) * 1997-02-26 1998-10-20 Powerchip Semiconductor Corp. Synchronous semiconductor memory device
US5881016A (en) * 1997-06-13 1999-03-09 Cirrus Logic, Inc. Method and apparatus for optimizing power consumption and memory bandwidth in a video controller using SGRAM and SDRAM power reduction modes
KR100300035B1 (ko) * 1998-02-07 2001-09-06 김영환 전하재활용센스앰프
KR100273293B1 (ko) * 1998-05-13 2001-01-15 김영환 리던던트 워드라인의 리프레쉬 구조
JP3786521B2 (ja) 1998-07-01 2006-06-14 株式会社日立製作所 半導体集積回路及びデータ処理システム
US6072746A (en) 1998-08-14 2000-06-06 International Business Machines Corporation Self-timed address decoder for register file and compare circuit of a multi-port CAM
US6708254B2 (en) 1999-11-10 2004-03-16 Nec Electronics America, Inc. Parallel access virtual channel memory system
JP4400999B2 (ja) * 2000-06-29 2010-01-20 株式会社ルネサステクノロジ 半導体記憶装置
US20020147884A1 (en) * 2001-04-05 2002-10-10 Michael Peters Method and circuit for increasing the memory access speed of an enhanced synchronous SDRAM
KR100401508B1 (ko) * 2001-05-25 2003-10-17 주식회사 하이닉스반도체 램버스 디램의 뱅크 제어회로
JP4544808B2 (ja) * 2002-04-09 2010-09-15 富士通セミコンダクター株式会社 半導体記憶装置の制御方法、および半導体記憶装置
JP2004171678A (ja) * 2002-11-20 2004-06-17 Sony Corp 情報記憶装置、情報記憶方法、及び情報記憶プログラム
WO2005004164A1 (ja) * 2003-06-30 2005-01-13 Fujitsu Limited 半導体記憶装置
US7215595B2 (en) * 2003-11-26 2007-05-08 Infineon Technologies Ag Memory device and method using a sense amplifier as a cache
KR100665408B1 (ko) * 2004-11-08 2007-01-04 주식회사 하이닉스반도체 반도체 메모리 장치의 차동 증폭기 제어회로
JP4299848B2 (ja) * 2006-08-09 2009-07-22 エルピーダメモリ株式会社 半導体記憶装置
KR20120005826A (ko) * 2010-07-09 2012-01-17 주식회사 하이닉스반도체 반도체 메모리 장치 및 이의 동작 방법
US9190147B2 (en) * 2013-02-06 2015-11-17 Kabushiki Kaisha Toshiba Resistance changing memory with a first driver closer than a second driver
KR102161278B1 (ko) * 2013-08-07 2020-09-29 에스케이하이닉스 주식회사 액티브 제어 장치 및 이를 포함하는 반도체 장치
US9135982B2 (en) * 2013-12-18 2015-09-15 Intel Corporation Techniques for accessing a dynamic random access memory array
DE102019128331A1 (de) 2019-08-29 2021-03-04 Taiwan Semiconductor Manufacturing Co., Ltd. Gemeinsam genutzter decodiererschaltkreis und verfahren
CN112447218A (zh) * 2019-08-29 2021-03-05 台湾积体电路制造股份有限公司 存储器电路和方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4480320A (en) * 1982-06-01 1984-10-30 General Instrument Corp. Compact ROM with reduced access time
JPH0736269B2 (ja) * 1985-08-30 1995-04-19 株式会社日立製作所 半導体記憶装置
US5127739A (en) * 1987-04-27 1992-07-07 Texas Instruments Incorporated CMOS sense amplifier with bit line isolation
JP2714944B2 (ja) * 1987-08-05 1998-02-16 三菱電機株式会社 半導体記憶装置
JPH0697560B2 (ja) * 1987-11-19 1994-11-30 三菱電機株式会社 半導体記憶装置
JPH0453084A (ja) * 1990-06-20 1992-02-20 Nec Ic Microcomput Syst Ltd 半導体記憶装置
JP2962080B2 (ja) * 1991-12-27 1999-10-12 日本電気株式会社 ランダムアクセスメモリ
JPH06267275A (ja) * 1993-03-10 1994-09-22 Fujitsu Ltd センスアンプ制御回路及びセンスアンプ制御方法

Also Published As

Publication number Publication date
KR0168464B1 (ko) 1999-02-01
JP2894170B2 (ja) 1999-05-24
JPH0757457A (ja) 1995-03-03
KR950006608A (ko) 1995-03-21
DE69422349D1 (de) 2000-02-03
EP0639835A2 (de) 1995-02-22
EP0639835B1 (de) 1999-12-29
US5528552A (en) 1996-06-18
EP0639835A3 (de) 1996-11-06

Similar Documents

Publication Publication Date Title
DE69422349D1 (de) Dynamische Direktzugriffspeicher-Anordnung für schnellen sequentiellen Zugriff, mit Leseverstärkern, die unabhängig vom Zeilen-Adresspuffer sind und als Cache-Speicher dienen
DE69323708D1 (de) Zweistufige dynamische Lesenverstärker für Speichermatrix
NL1000847A1 (nl) Progammeerbaar dynamisch willekeurig-toegankelijk geheugen (DRAM).
KR960015576A (ko) 기존의 다이나믹 랜덤 액세스 메모리(dram) 장치에 대해 증가된 데이타 대역폭 및 어드레싱 범위를 제공하고 및/또는 더 소형의 dram 장치에 대해 등가의 대역폭 및 어드레싱 범위를 제공하는 방법 및 그 dram 장치
DE69521095D1 (de) Dynamischer Speicher mit geteilten Leseverstärkern
EP0960421A4 (de) Ladungs- und vorladungsbitleitungsstruktur eines sram-speichers
EP1004119A4 (de) Dynamisches direktzugriffspeichersystem mit gleichzeitigem zugriff sowie auffrischungsbetrieb und verfahren zu seiner verwendung
DE69229988T2 (de) Kombinierte DRAM- und SRAM-Speichermatrize
EP0637033A3 (de) Dynamische Direktzugriffspeicheranordnung mit Zeileauswahlschaltung von niedriger Leistung.
TW338106B (en) Semiconductor memory testing apparatus
WO1987002819A3 (en) Architecture for a fast frame store using dynamic rams
KR930013964A (ko) 프로그램 가능한 메모리 타이밍
ITMI931088A1 (it) Dispositivo di memoria dinamica ad accesso casuale adatto per abbreviare il tempo richiesto per testare la richiesta di auto-rinfresco
DE69425026D1 (de) Dynamischer Speicher mit wahlfreiem Zugriff mit Cache- und Etikettenspeicher
ES2114989T3 (es) Soporte para guardar objetos.
ATE526666T1 (de) Speicheranordnung mit einem befehl für verzögertes schreiben
AU2001283568A1 (en) Method and system for hiding refreshes in a dynamic random access memory
AU2003234695A1 (en) Destructive-read random access memory system buffered with destructive-read memory cache
FR2705821B1 (fr) Mémoire dynamique.
KR870011618A (ko) 고속으로 데이타의 소거가 가능한 다이나믹 ram
DE69625038T2 (de) Dynamischer Direktzugriffsspeicher
DE69210449T2 (de) Dynamische Speichereinrichtung mit wahlfreiem Zugriff, mit Bitleitungen, die zwischen den Leseverstärkerschaltungen teilweise gemeinsam benutzt werden
EP0590591A3 (de) Statischer RAM-Speicher für Gattermatrixvorrichtungen.
DE69620528D1 (de) Dynamischer Direktzugriffspeicher
DE69112668T2 (de) Dynamische Direktzugriffsspeicheranordnung mit statischem Spaltenoperationsmodus ohne Informationsbitvernichtung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC CORP., TOKIO/TOKYO, JP

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8327 Change in the person/name/address of the patent owner

Owner name: ELPIDA MEMORY, INC., TOKYO, JP