DE69425026D1 - Dynamischer Speicher mit wahlfreiem Zugriff mit Cache- und Etikettenspeicher - Google Patents
Dynamischer Speicher mit wahlfreiem Zugriff mit Cache- und EtikettenspeicherInfo
- Publication number
- DE69425026D1 DE69425026D1 DE69425026T DE69425026T DE69425026D1 DE 69425026 D1 DE69425026 D1 DE 69425026D1 DE 69425026 T DE69425026 T DE 69425026T DE 69425026 T DE69425026 T DE 69425026T DE 69425026 D1 DE69425026 D1 DE 69425026D1
- Authority
- DE
- Germany
- Prior art keywords
- cache
- random access
- access memory
- dynamic random
- label storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21602793A JP3305056B2 (ja) | 1993-08-31 | 1993-08-31 | ダイナミックram |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69425026D1 true DE69425026D1 (de) | 2000-08-03 |
DE69425026T2 DE69425026T2 (de) | 2001-03-22 |
Family
ID=16682154
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69425026T Expired - Fee Related DE69425026T2 (de) | 1993-08-31 | 1994-08-26 | Dynamischer Speicher mit wahlfreiem Zugriff mit Cache- und Etikettenspeicher |
Country Status (5)
Country | Link |
---|---|
US (1) | US5577223A (de) |
EP (1) | EP0640922B1 (de) |
JP (1) | JP3305056B2 (de) |
KR (1) | KR100248878B1 (de) |
DE (1) | DE69425026T2 (de) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5787267A (en) * | 1995-06-07 | 1998-07-28 | Monolithic System Technology, Inc. | Caching method and circuit for a memory system with circuit module architecture |
JP2885162B2 (ja) * | 1996-01-17 | 1999-04-19 | 日本電気株式会社 | キャッシュメモリ |
US5905680A (en) * | 1996-04-30 | 1999-05-18 | Texas Instruments Incorporated | Self-timed comparison circuits and systems |
US6104658A (en) * | 1996-08-08 | 2000-08-15 | Neomagic Corporation | Distributed DRAM refreshing |
US6023745A (en) * | 1996-08-08 | 2000-02-08 | Neomagic Corporation | Scoreboarding for DRAM access within a multi-array DRAM device using simultaneous activate and read/write accesses |
US6044433A (en) * | 1996-08-09 | 2000-03-28 | Micron Technology, Inc. | DRAM cache |
US5860092A (en) * | 1997-02-14 | 1999-01-12 | Lsi Logic Corporation | Apparatus and method for addressing a cache memory in a computer system utilizing cache tag memory with integrated adder and pre-decode circuit |
US5835932A (en) * | 1997-03-13 | 1998-11-10 | Silicon Aquarius, Inc. | Methods and systems for maintaining data locality in a multiple memory bank system having DRAM with integral SRAM |
US6862654B1 (en) * | 2000-08-17 | 2005-03-01 | Micron Technology, Inc. | Method and system for using dynamic random access memory as cache memory |
US6535959B1 (en) * | 2000-09-05 | 2003-03-18 | Conexant Systems, Inc. | Circuit and method for reducing power consumption in an instruction cache |
US6697909B1 (en) | 2000-09-12 | 2004-02-24 | International Business Machines Corporation | Method and apparatus for performing data access and refresh operations in different sub-arrays of a DRAM cache memory |
US6779076B1 (en) * | 2000-10-05 | 2004-08-17 | Micron Technology, Inc. | Method and system for using dynamic random access memory as cache memory |
DE10055001A1 (de) * | 2000-11-07 | 2002-05-16 | Infineon Technologies Ag | Speicheranordnung mit einem zentralen Anschlussfeld |
DE10129315A1 (de) * | 2001-03-28 | 2003-01-02 | Infineon Technologies Ag | Dynamischer Halbleiterspeicher mit Refresh |
US7085186B2 (en) | 2001-04-05 | 2006-08-01 | Purple Mountain Server Llc | Method for hiding a refresh in a pseudo-static memory |
US6707752B2 (en) | 2001-06-22 | 2004-03-16 | Intel Corporation | Tag design for cache access with redundant-form address |
US6954822B2 (en) | 2002-08-02 | 2005-10-11 | Intel Corporation | Techniques to map cache data to memory arrays |
US7054999B2 (en) | 2002-08-02 | 2006-05-30 | Intel Corporation | High speed DRAM cache architecture |
JP2004103081A (ja) | 2002-09-06 | 2004-04-02 | Renesas Technology Corp | 半導体記憶装置 |
KR100635439B1 (ko) * | 2005-04-19 | 2006-10-18 | 통일공업 주식회사 | 덕트 및 이의 제조방법 |
US9396118B2 (en) | 2011-12-28 | 2016-07-19 | Intel Corporation | Efficient dynamic randomizing address remapping for PCM caching to improve endurance and anti-attack |
US9779025B2 (en) | 2014-06-02 | 2017-10-03 | Micron Technology, Inc. | Cache architecture for comparing data |
KR102491651B1 (ko) | 2015-12-14 | 2023-01-26 | 삼성전자주식회사 | 비휘발성 메모리 모듈, 그것을 포함하는 컴퓨팅 시스템, 및 그것의 동작 방법 |
US10019367B2 (en) | 2015-12-14 | 2018-07-10 | Samsung Electronics Co., Ltd. | Memory module, computing system having the same, and method for testing tag error thereof |
US10672444B1 (en) * | 2018-12-13 | 2020-06-02 | Micron Technology, Inc. | Decoder unit |
JP2020149759A (ja) * | 2019-03-15 | 2020-09-17 | キオクシア株式会社 | 半導体記憶装置 |
WO2020190841A1 (en) | 2019-03-18 | 2020-09-24 | Rambus Inc. | System application of dram component with cache mode |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4241425A (en) * | 1979-02-09 | 1980-12-23 | Bell Telephone Laboratories, Incorporated | Organization for dynamic random access memory |
US5226147A (en) * | 1987-11-06 | 1993-07-06 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device for simple cache system |
JPH01146187A (ja) * | 1987-12-02 | 1989-06-08 | Mitsubishi Electric Corp | キヤッシュメモリ内蔵半導体記憶装置 |
US5214610A (en) * | 1989-09-22 | 1993-05-25 | Texas Instruments Incorporated | Memory with selective address transition detection for cache operation |
JPH04109488A (ja) * | 1990-08-29 | 1992-04-10 | Mitsubishi Electric Corp | ダイナミック型半導体記憶装置 |
EP0552667B1 (de) * | 1992-01-22 | 1999-04-21 | Enhanced Memory Systems, Inc. | DRAM mit integrierten Registern |
JPH05274879A (ja) * | 1992-03-26 | 1993-10-22 | Nec Corp | 半導体装置 |
JP3199862B2 (ja) * | 1992-08-12 | 2001-08-20 | 日本テキサス・インスツルメンツ株式会社 | 半導体記憶装置 |
-
1993
- 1993-08-31 JP JP21602793A patent/JP3305056B2/ja not_active Expired - Fee Related
-
1994
- 1994-08-26 EP EP94113363A patent/EP0640922B1/de not_active Expired - Lifetime
- 1994-08-26 DE DE69425026T patent/DE69425026T2/de not_active Expired - Fee Related
- 1994-08-29 KR KR1019940021443A patent/KR100248878B1/ko not_active IP Right Cessation
- 1994-08-29 US US08/297,450 patent/US5577223A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5577223A (en) | 1996-11-19 |
JP3305056B2 (ja) | 2002-07-22 |
KR100248878B1 (ko) | 2000-03-15 |
DE69425026T2 (de) | 2001-03-22 |
KR950006864A (ko) | 1995-03-21 |
JPH0764864A (ja) | 1995-03-10 |
EP0640922A1 (de) | 1995-03-01 |
EP0640922B1 (de) | 2000-06-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |