DE69222793T2 - Halbleiterspeicheranordnung - Google Patents
HalbleiterspeicheranordnungInfo
- Publication number
- DE69222793T2 DE69222793T2 DE69222793T DE69222793T DE69222793T2 DE 69222793 T2 DE69222793 T2 DE 69222793T2 DE 69222793 T DE69222793 T DE 69222793T DE 69222793 T DE69222793 T DE 69222793T DE 69222793 T2 DE69222793 T2 DE 69222793T2
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/565—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using capacitive charge storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7483091 | 1991-03-14 | ||
JP4048312A JP2567177B2 (ja) | 1991-03-14 | 1992-03-05 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69222793D1 DE69222793D1 (de) | 1997-11-27 |
DE69222793T2 true DE69222793T2 (de) | 1998-03-12 |
Family
ID=26388557
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69222793T Expired - Fee Related DE69222793T2 (de) | 1991-03-14 | 1992-03-12 | Halbleiterspeicheranordnung |
Country Status (3)
Country | Link |
---|---|
US (1) | US5317540A (de) |
EP (1) | EP0503633B1 (de) |
DE (1) | DE69222793T2 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3464803B2 (ja) * | 1991-11-27 | 2003-11-10 | 株式会社東芝 | 半導体メモリセル |
JPH0628869A (ja) * | 1992-05-12 | 1994-02-04 | Takayama:Kk | メモリデバイス |
WO1994003901A1 (en) | 1992-08-10 | 1994-02-17 | Monolithic System Technology, Inc. | Fault-tolerant, high-speed bus system and bus interface for wafer-scale integration |
JP2823466B2 (ja) * | 1993-01-28 | 1998-11-11 | 株式会社東芝 | 半導体記憶装置 |
US5953264A (en) * | 1993-03-22 | 1999-09-14 | Matsushita Electric Industrial Co., Ltd. | Redundant memory cell selecting circuit having fuses coupled to memory cell group address and memory cell block address |
JP3272888B2 (ja) * | 1993-12-28 | 2002-04-08 | 株式会社東芝 | 半導体記憶装置 |
JPH07312084A (ja) * | 1994-05-18 | 1995-11-28 | Toshiba Corp | キャッシュメモリ内蔵メモリ装置 |
US5771268A (en) * | 1996-12-10 | 1998-06-23 | International Business Machines Corporation | High speed rotator with array method |
US5936874A (en) * | 1997-06-19 | 1999-08-10 | Micron Technology, Inc. | High density semiconductor memory and method of making |
JPH11144453A (ja) * | 1997-11-05 | 1999-05-28 | Texas Instr Japan Ltd | 半導体記憶装置 |
KR100265610B1 (ko) * | 1997-12-31 | 2000-10-02 | 김영환 | 데이터 전송속도를 증가시킨 더블 데이터 레이트 싱크로너스 디램 |
US6385122B1 (en) * | 2001-01-31 | 2002-05-07 | Virage Logic Corp. | Row and column accessible memory with a built-in multiplex |
JP6615302B1 (ja) * | 2018-11-06 | 2019-12-04 | 三菱電機株式会社 | 電子制御装置 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3763480A (en) * | 1971-10-12 | 1973-10-02 | Rca Corp | Digital and analog data handling devices |
DE2634089B2 (de) * | 1975-08-11 | 1978-01-05 | Schaltungsanordnung zum erfassen schwacher signale | |
US4225945A (en) * | 1976-01-12 | 1980-09-30 | Texas Instruments Incorporated | Random access MOS memory cell using double level polysilicon |
JPS5848294A (ja) * | 1981-09-16 | 1983-03-22 | Mitsubishi Electric Corp | Mosダイナミツクメモリ |
JPS60209996A (ja) * | 1984-03-31 | 1985-10-22 | Toshiba Corp | 半導体記憶装置 |
JPH0793009B2 (ja) * | 1984-12-13 | 1995-10-09 | 株式会社東芝 | 半導体記憶装置 |
US4648073A (en) * | 1984-12-31 | 1987-03-03 | International Business Machines Corporation | Sequential shared access lines memory cells |
JPS63149900A (ja) * | 1986-12-15 | 1988-06-22 | Toshiba Corp | 半導体メモリ |
US4980863A (en) * | 1987-03-31 | 1990-12-25 | Kabushiki Kaisha Toshiba | Semiconductor memory device having switching circuit for coupling together two pairs of bit lines |
US4943944A (en) * | 1987-11-25 | 1990-07-24 | Kabushiki Kaisha Toshiba | Semiconductor memory using dynamic ram cells |
JPH01204298A (ja) * | 1988-02-08 | 1989-08-16 | Fujitsu Ltd | 半導体記憶回路 |
JP2682021B2 (ja) * | 1988-06-29 | 1997-11-26 | 富士通株式会社 | 半導体メモリ装置 |
US5091761A (en) * | 1988-08-22 | 1992-02-25 | Hitachi, Ltd. | Semiconductor device having an arrangement of IGFETs and capacitors stacked thereover |
JP2633645B2 (ja) * | 1988-09-13 | 1997-07-23 | 株式会社東芝 | 半導体メモリ装置 |
US5172198A (en) * | 1989-02-22 | 1992-12-15 | Kabushiki Kaisha Toshiba | MOS type semiconductor device |
DE58908918D1 (de) * | 1989-03-16 | 1995-03-02 | Siemens Ag | Integrierter Halbleiterspeicher vom Typ DRAM und Verfahren zu seinem Testen. |
JPH02301097A (ja) * | 1989-05-15 | 1990-12-13 | Toshiba Corp | ダイナミック型ランダムアクセスメモリ |
JPH0762955B2 (ja) * | 1989-05-15 | 1995-07-05 | 株式会社東芝 | ダイナミック型ランダムアクセスメモリ |
DE4015472C2 (de) * | 1989-05-16 | 1993-12-02 | Mitsubishi Electric Corp | Speicherzelle und Verfahren zum Herstellen eines dynamischen RAM |
JPH07122989B2 (ja) * | 1990-06-27 | 1995-12-25 | 株式会社東芝 | 半導体記憶装置 |
-
1992
- 1992-03-12 DE DE69222793T patent/DE69222793T2/de not_active Expired - Fee Related
- 1992-03-12 US US07/850,318 patent/US5317540A/en not_active Expired - Lifetime
- 1992-03-12 EP EP92104296A patent/EP0503633B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0503633A2 (de) | 1992-09-16 |
EP0503633B1 (de) | 1997-10-22 |
EP0503633A3 (de) | 1994-02-02 |
DE69222793D1 (de) | 1997-11-27 |
US5317540A (en) | 1994-05-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |