DE69012611D1 - Verfahren zum Herstellen bipolarer vertikaler Transistoren und von Hochspannungs-CMOS-Transistoren in einer einzigen integrierten Schaltung. - Google Patents
Verfahren zum Herstellen bipolarer vertikaler Transistoren und von Hochspannungs-CMOS-Transistoren in einer einzigen integrierten Schaltung.Info
- Publication number
- DE69012611D1 DE69012611D1 DE69012611T DE69012611T DE69012611D1 DE 69012611 D1 DE69012611 D1 DE 69012611D1 DE 69012611 T DE69012611 T DE 69012611T DE 69012611 T DE69012611 T DE 69012611T DE 69012611 D1 DE69012611 D1 DE 69012611D1
- Authority
- DE
- Germany
- Prior art keywords
- transistors
- integrated circuit
- high voltage
- single integrated
- voltage cmos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/325,164 US4918026A (en) | 1989-03-17 | 1989-03-17 | Process for forming vertical bipolar transistors and high voltage CMOS in a single integrated circuit chip |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69012611D1 true DE69012611D1 (de) | 1994-10-27 |
DE69012611T2 DE69012611T2 (de) | 1995-01-19 |
Family
ID=23266713
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69012611T Expired - Fee Related DE69012611T2 (de) | 1989-03-17 | 1990-02-09 | Verfahren zum Herstellen bipolarer vertikaler Transistoren und von Hochspannungs-CMOS-Transistoren in einer einzigen integrierten Schaltung. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4918026A (de) |
EP (1) | EP0388000B1 (de) |
JP (1) | JPH03201474A (de) |
KR (1) | KR930009030B1 (de) |
DE (1) | DE69012611T2 (de) |
Families Citing this family (61)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5011784A (en) * | 1988-01-21 | 1991-04-30 | Exar Corporation | Method of making a complementary BiCMOS process with isolated vertical PNP transistors |
US5318917A (en) * | 1988-11-04 | 1994-06-07 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating semiconductor device |
USRE37424E1 (en) * | 1989-06-14 | 2001-10-30 | Stmicroelectronics S.R.L. | Mixed technology integrated device comprising complementary LDMOS power transistors, CMOS and vertical PNP integrated structures having an enhanced ability to withstand a relatively high supply voltage |
IT1235843B (it) * | 1989-06-14 | 1992-11-03 | Sgs Thomson Microelectronics | Dispositivo integrato contenente strutture di potenza formate con transistori ldmos complementari, strutture cmos e pnp verticali con aumentata capacita' di supportare un'alta tensione di alimentazione. |
US5198880A (en) * | 1989-06-22 | 1993-03-30 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit and method of making the same |
FR2649830B1 (fr) * | 1989-07-13 | 1994-05-27 | Sgs Thomson Microelectronics | Structure de circuit integre cmos protege contre les decharges electrostatiques |
US4966858A (en) * | 1989-11-02 | 1990-10-30 | Motorola, Inc. | Method of fabricating a lateral semiconductor structure including field plates for self-alignment |
EP0460251B1 (de) * | 1990-06-05 | 1998-11-18 | Siemens Aktiengesellschaft | Herstellverfahren für einen Leistungs-MISFET |
US5001073A (en) * | 1990-07-16 | 1991-03-19 | Sprague Electric Company | Method for making bipolar/CMOS IC with isolated vertical PNP |
US5429959A (en) * | 1990-11-23 | 1995-07-04 | Texas Instruments Incorporated | Process for simultaneously fabricating a bipolar transistor and a field-effect transistor |
US5306652A (en) * | 1991-12-30 | 1994-04-26 | Texas Instruments Incorporated | Lateral double diffused insulated gate field effect transistor fabrication process |
WO1993016494A1 (en) * | 1992-01-31 | 1993-08-19 | Analog Devices, Inc. | Complementary bipolar polysilicon emitter devices |
US5322804A (en) * | 1992-05-12 | 1994-06-21 | Harris Corporation | Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps |
EP0598168B1 (de) * | 1992-11-18 | 1997-05-28 | STMicroelectronics S.r.l. | Herstellung von direkte Kontakten in hoher Dichte MOS/CMOS Verfahren |
US5366916A (en) * | 1993-02-04 | 1994-11-22 | Delco Electronics Corporation | Method of making a high voltage implanted channel device for VLSI and ULSI processes |
US6043538A (en) * | 1993-09-30 | 2000-03-28 | Intel Corporation | Device structure for high voltage tolerant transistor on a 3.3 volt process |
KR100331127B1 (ko) * | 1994-02-15 | 2002-10-18 | 내셔널 세미콘덕터 코포레이션 | 표준cmos공정용고전압cmos트랜지스터 |
US5889315A (en) * | 1994-08-18 | 1999-03-30 | National Semiconductor Corporation | Semiconductor structure having two levels of buried regions |
US5538908A (en) * | 1995-04-27 | 1996-07-23 | Lg Semicon Co., Ltd. | Method for manufacturing a BiCMOS semiconductor device |
US5589790A (en) * | 1995-06-30 | 1996-12-31 | Intel Corporation | Input structure for receiving high voltage signals on a low voltage integrated circuit device |
JPH10189762A (ja) * | 1996-12-20 | 1998-07-21 | Nec Corp | 半導体装置およびその製造方法 |
US6117736A (en) * | 1997-01-30 | 2000-09-12 | Lsi Logic Corporation | Method of fabricating insulated-gate field-effect transistors having different gate capacitances |
SE509780C2 (sv) * | 1997-07-04 | 1999-03-08 | Ericsson Telefon Ab L M | Bipolär effekttransistor och framställningsförfarande |
JP3450176B2 (ja) * | 1998-03-09 | 2003-09-22 | 日本電気株式会社 | 高速バスドライバ及び高速バス |
US6127213A (en) * | 1999-04-14 | 2000-10-03 | United Microelectronics Corp. | Method for simultaneously forming low voltage and high voltage devices |
JP4128700B2 (ja) * | 1999-09-08 | 2008-07-30 | ローム株式会社 | 誘導性負荷駆動回路 |
US7927939B2 (en) * | 2000-01-05 | 2011-04-19 | Agere Systems Inc. | Method of manufacturing a laterally diffused metal oxide semiconductor device |
TW512533B (en) * | 2000-04-26 | 2002-12-01 | Sanyo Electric Co | Semiconductor device and its manufacturing process |
JP3831598B2 (ja) * | 2000-10-19 | 2006-10-11 | 三洋電機株式会社 | 半導体装置とその製造方法 |
JP2003016954A (ja) * | 2001-04-25 | 2003-01-17 | Sony Corp | 電子放出装置及びその製造方法、冷陰極電界電子放出素子及びその製造方法、並びに、冷陰極電界電子放出表示装置及びその製造方法 |
DE10161382A1 (de) * | 2001-12-14 | 2003-06-18 | Philips Intellectual Property | Komparatorschaltung zum Vergleich zweier elektrischer Spannungen |
JP2003234423A (ja) * | 2002-02-07 | 2003-08-22 | Sony Corp | 半導体装置及びその製造方法 |
US7019377B2 (en) * | 2002-12-17 | 2006-03-28 | Micrel, Inc. | Integrated circuit including high voltage devices and low voltage devices |
US6949424B2 (en) * | 2003-08-28 | 2005-09-27 | Texas Instruments Incorporated | Single poly-emitter PNP using DWELL diffusion in a BiCMOS technology |
JP4707947B2 (ja) * | 2003-11-14 | 2011-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US8253196B2 (en) | 2004-01-29 | 2012-08-28 | Enpirion, Inc. | Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same |
US8253197B2 (en) * | 2004-01-29 | 2012-08-28 | Enpirion, Inc. | Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same |
US8212317B2 (en) * | 2004-01-29 | 2012-07-03 | Enpirion, Inc. | Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same |
US8212316B2 (en) * | 2004-01-29 | 2012-07-03 | Enpirion, Inc. | Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same |
US7230302B2 (en) * | 2004-01-29 | 2007-06-12 | Enpirion, Inc. | Laterally diffused metal oxide semiconductor device and method of forming the same |
US8212315B2 (en) * | 2004-01-29 | 2012-07-03 | Enpirion, Inc. | Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same |
US8253195B2 (en) * | 2004-01-29 | 2012-08-28 | Enpirion, Inc. | Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same |
US7229886B2 (en) * | 2004-08-23 | 2007-06-12 | Enpirion, Inc. | Method of forming an integrated circuit incorporating higher voltage devices and low voltage devices therein |
US7335948B2 (en) * | 2004-08-23 | 2008-02-26 | Enpirion, Inc. | Integrated circuit incorporating higher voltage devices and low voltage devices therein |
US7190026B2 (en) * | 2004-08-23 | 2007-03-13 | Enpirion, Inc. | Integrated circuit employable with a power converter |
US7186606B2 (en) * | 2004-08-23 | 2007-03-06 | Enpirion, Inc. | Method of forming an integrated circuit employable with a power converter |
US7214985B2 (en) * | 2004-08-23 | 2007-05-08 | Enpirion, Inc. | Integrated circuit incorporating higher voltage devices and low voltage devices therein |
US7232733B2 (en) * | 2004-08-23 | 2007-06-19 | Enpirion, Inc. | Method of forming an integrated circuit incorporating higher voltage devices and low voltage devices therein |
US7195981B2 (en) * | 2004-08-23 | 2007-03-27 | Enpirion, Inc. | Method of forming an integrated circuit employable with a power converter |
DE102007034800A1 (de) * | 2007-03-26 | 2008-10-02 | X-Fab Dresden Gmbh & Co. Kg | Maskensparende Herstellung komplementärer lateraler Hochvolttransistoren mit RESURF-Struktur |
US8169081B1 (en) | 2007-12-27 | 2012-05-01 | Volterra Semiconductor Corporation | Conductive routings in integrated circuits using under bump metallization |
JP4645861B2 (ja) * | 2008-07-03 | 2011-03-09 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
CN101630683B (zh) | 2008-07-15 | 2011-03-23 | 中芯国际集成电路制造(上海)有限公司 | 集成静电放电器件 |
EP2394298B1 (de) * | 2009-02-06 | 2013-04-03 | Nxp B.V. | Integrierter schaltkreis (ic) und verfahren zur herstellung eines ic |
CN101692424A (zh) * | 2009-10-13 | 2010-04-07 | 上海宏力半导体制造有限公司 | 垂直双极晶体管及其制造方法 |
US9214457B2 (en) | 2011-09-20 | 2015-12-15 | Alpha & Omega Semiconductor Incorporated | Method of integrating high voltage devices |
CN103855134A (zh) | 2012-11-30 | 2014-06-11 | 英力股份有限公司 | 包括耦合至解耦合器件的半导体器件的装置 |
US9536938B1 (en) | 2013-11-27 | 2017-01-03 | Altera Corporation | Semiconductor device including a resistor metallic layer and method of forming the same |
US10020739B2 (en) | 2014-03-27 | 2018-07-10 | Altera Corporation | Integrated current replicator and method of operating the same |
US9673192B1 (en) | 2013-11-27 | 2017-06-06 | Altera Corporation | Semiconductor device including a resistor metallic layer and method of forming the same |
US10103627B2 (en) | 2015-02-26 | 2018-10-16 | Altera Corporation | Packaged integrated circuit including a switch-mode regulator and method of forming the same |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3576475A (en) * | 1968-08-29 | 1971-04-27 | Texas Instruments Inc | Field effect transistors for integrated circuits and methods of manufacture |
US4047217A (en) * | 1976-04-12 | 1977-09-06 | Fairchild Camera And Instrument Corporation | High-gain, high-voltage transistor for linear integrated circuits |
DE2940954A1 (de) * | 1979-10-09 | 1981-04-23 | Nixdorf Computer Ag, 4790 Paderborn | Verfahren zur herstellung von hochspannungs-mos-transistoren enthaltenden mos-integrierten schaltkreisen sowie schaltungsanordnung zum schalten von leistungsstromkreisen unter verwendung derartiger hochspannungs-mos-transistoren |
DE3175429D1 (en) * | 1981-11-28 | 1986-11-06 | Itt Ind Gmbh Deutsche | Process for producing a monolithic integrated circuit having at least one pair of complementary field-effect transistors and at least one bipolar transistor |
EP0093786B1 (de) * | 1982-05-06 | 1986-08-06 | Deutsche ITT Industries GmbH | Verfahren zum Herstellen einer planaren monolithisch integrierten Festkörperschaltung mit mindestens einem Isolierschicht-Feldeffekttransistor und mit mindestens einem Bipolartransistor |
JPH0618255B2 (ja) * | 1984-04-04 | 1994-03-09 | 株式会社東芝 | 半導体装置 |
FR2571178B1 (fr) * | 1984-09-28 | 1986-11-21 | Thomson Csf | Structure de circuit integre comportant des transistors cmos a tenue en tension elevee, et son procede de fabrication |
EP0204979B1 (de) * | 1985-06-03 | 1989-03-29 | Siemens Aktiengesellschaft | Verfahren zum gleichzeitigen Herstellen von bipolaren und komplementären MOS-Transistoren auf einem gemeinsamen Siliziumsubstrat |
US4752589A (en) * | 1985-12-17 | 1988-06-21 | Siemens Aktiengesellschaft | Process for the production of bipolar transistors and complementary MOS transistors on a common silicon substrate |
US4764482A (en) * | 1986-11-21 | 1988-08-16 | General Electric Company | Method of fabricating an integrated circuit containing bipolar and MOS transistors |
JPS63269558A (ja) * | 1987-04-27 | 1988-11-07 | Toshiba Corp | 半導体装置 |
KR900001062B1 (ko) * | 1987-09-15 | 1990-02-26 | 강진구 | 반도체 바이 씨 모오스 장치의 제조방법 |
-
1989
- 1989-03-17 US US07/325,164 patent/US4918026A/en not_active Expired - Lifetime
-
1990
- 1990-02-09 EP EP90301382A patent/EP0388000B1/de not_active Expired - Lifetime
- 1990-02-09 DE DE69012611T patent/DE69012611T2/de not_active Expired - Fee Related
- 1990-03-16 JP JP2064445A patent/JPH03201474A/ja active Pending
- 1990-03-17 KR KR1019900003675A patent/KR930009030B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPH03201474A (ja) | 1991-09-03 |
KR900015317A (ko) | 1990-10-26 |
US4918026A (en) | 1990-04-17 |
EP0388000B1 (de) | 1994-09-21 |
EP0388000A3 (de) | 1991-03-27 |
KR930009030B1 (ko) | 1993-09-18 |
EP0388000A2 (de) | 1990-09-19 |
DE69012611T2 (de) | 1995-01-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: DELPHI TECHNOLOGIES, INC., TROY, MICH., US |
|
8339 | Ceased/non-payment of the annual fee |