DE69012611D1 - Verfahren zum Herstellen bipolarer vertikaler Transistoren und von Hochspannungs-CMOS-Transistoren in einer einzigen integrierten Schaltung. - Google Patents

Verfahren zum Herstellen bipolarer vertikaler Transistoren und von Hochspannungs-CMOS-Transistoren in einer einzigen integrierten Schaltung.

Info

Publication number
DE69012611D1
DE69012611D1 DE69012611T DE69012611T DE69012611D1 DE 69012611 D1 DE69012611 D1 DE 69012611D1 DE 69012611 T DE69012611 T DE 69012611T DE 69012611 T DE69012611 T DE 69012611T DE 69012611 D1 DE69012611 D1 DE 69012611D1
Authority
DE
Germany
Prior art keywords
transistors
integrated circuit
high voltage
single integrated
voltage cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69012611T
Other languages
English (en)
Other versions
DE69012611T2 (de
Inventor
Walter Kirk Kosiak
Jonathan Douglas Mann
Paul Russell Rowlands
Douglas Robert Schnabel
Jack Duana Parrish
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Delphi Technologies Inc
Original Assignee
Delco Electronics LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Delco Electronics LLC filed Critical Delco Electronics LLC
Publication of DE69012611D1 publication Critical patent/DE69012611D1/de
Application granted granted Critical
Publication of DE69012611T2 publication Critical patent/DE69012611T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248Combination of bipolar and field-effect technology
    • H01L21/8249Bipolar and MOS technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
DE69012611T 1989-03-17 1990-02-09 Verfahren zum Herstellen bipolarer vertikaler Transistoren und von Hochspannungs-CMOS-Transistoren in einer einzigen integrierten Schaltung. Expired - Fee Related DE69012611T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/325,164 US4918026A (en) 1989-03-17 1989-03-17 Process for forming vertical bipolar transistors and high voltage CMOS in a single integrated circuit chip

Publications (2)

Publication Number Publication Date
DE69012611D1 true DE69012611D1 (de) 1994-10-27
DE69012611T2 DE69012611T2 (de) 1995-01-19

Family

ID=23266713

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69012611T Expired - Fee Related DE69012611T2 (de) 1989-03-17 1990-02-09 Verfahren zum Herstellen bipolarer vertikaler Transistoren und von Hochspannungs-CMOS-Transistoren in einer einzigen integrierten Schaltung.

Country Status (5)

Country Link
US (1) US4918026A (de)
EP (1) EP0388000B1 (de)
JP (1) JPH03201474A (de)
KR (1) KR930009030B1 (de)
DE (1) DE69012611T2 (de)

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FR2649830B1 (fr) * 1989-07-13 1994-05-27 Sgs Thomson Microelectronics Structure de circuit integre cmos protege contre les decharges electrostatiques
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US7927939B2 (en) * 2000-01-05 2011-04-19 Agere Systems Inc. Method of manufacturing a laterally diffused metal oxide semiconductor device
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DE10161382A1 (de) * 2001-12-14 2003-06-18 Philips Intellectual Property Komparatorschaltung zum Vergleich zweier elektrischer Spannungen
JP2003234423A (ja) * 2002-02-07 2003-08-22 Sony Corp 半導体装置及びその製造方法
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US8253197B2 (en) * 2004-01-29 2012-08-28 Enpirion, Inc. Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same
US8212317B2 (en) * 2004-01-29 2012-07-03 Enpirion, Inc. Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same
US8212316B2 (en) * 2004-01-29 2012-07-03 Enpirion, Inc. Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same
US7230302B2 (en) * 2004-01-29 2007-06-12 Enpirion, Inc. Laterally diffused metal oxide semiconductor device and method of forming the same
US8212315B2 (en) * 2004-01-29 2012-07-03 Enpirion, Inc. Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same
US8253195B2 (en) * 2004-01-29 2012-08-28 Enpirion, Inc. Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same
US7229886B2 (en) * 2004-08-23 2007-06-12 Enpirion, Inc. Method of forming an integrated circuit incorporating higher voltage devices and low voltage devices therein
US7335948B2 (en) * 2004-08-23 2008-02-26 Enpirion, Inc. Integrated circuit incorporating higher voltage devices and low voltage devices therein
US7190026B2 (en) * 2004-08-23 2007-03-13 Enpirion, Inc. Integrated circuit employable with a power converter
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Also Published As

Publication number Publication date
JPH03201474A (ja) 1991-09-03
KR900015317A (ko) 1990-10-26
US4918026A (en) 1990-04-17
EP0388000B1 (de) 1994-09-21
EP0388000A3 (de) 1991-03-27
KR930009030B1 (ko) 1993-09-18
EP0388000A2 (de) 1990-09-19
DE69012611T2 (de) 1995-01-19

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8327 Change in the person/name/address of the patent owner

Owner name: DELPHI TECHNOLOGIES, INC., TROY, MICH., US

8339 Ceased/non-payment of the annual fee