DE68917953D1 - Dekodierer- und Treiberschaltung für Halbleiterspeicher. - Google Patents

Dekodierer- und Treiberschaltung für Halbleiterspeicher.

Info

Publication number
DE68917953D1
DE68917953D1 DE68917953T DE68917953T DE68917953D1 DE 68917953 D1 DE68917953 D1 DE 68917953D1 DE 68917953 T DE68917953 T DE 68917953T DE 68917953 T DE68917953 T DE 68917953T DE 68917953 D1 DE68917953 D1 DE 68917953D1
Authority
DE
Germany
Prior art keywords
decoder
driver circuit
semiconductor memories
memories
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68917953T
Other languages
English (en)
Other versions
DE68917953T2 (de
Inventor
Barbara Alane Chappell
Terry Ivan Chappell
Stanley Everett Schuster
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE68917953D1 publication Critical patent/DE68917953D1/de
Application granted granted Critical
Publication of DE68917953T2 publication Critical patent/DE68917953T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
DE68917953T 1988-02-29 1989-02-02 Dekodierer- und Treiberschaltung für Halbleiterspeicher. Expired - Lifetime DE68917953T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/161,813 US4843261A (en) 1988-02-29 1988-02-29 Complementary output, high-density CMOS decoder/driver circuit for semiconductor memories

Publications (2)

Publication Number Publication Date
DE68917953D1 true DE68917953D1 (de) 1994-10-13
DE68917953T2 DE68917953T2 (de) 1995-03-30

Family

ID=22582857

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68917953T Expired - Lifetime DE68917953T2 (de) 1988-02-29 1989-02-02 Dekodierer- und Treiberschaltung für Halbleiterspeicher.

Country Status (5)

Country Link
US (1) US4843261A (de)
EP (1) EP0330852B1 (de)
JP (1) JPH01229490A (de)
CA (1) CA1271559A (de)
DE (1) DE68917953T2 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4999815A (en) * 1990-02-13 1991-03-12 International Business Machines Corporation Low power addressing systems
US5159215A (en) * 1990-02-26 1992-10-27 Nec Corporation Decoder circuit
JP3024687B2 (ja) * 1990-06-05 2000-03-21 三菱電機株式会社 半導体記憶装置
US5075571A (en) * 1991-01-02 1991-12-24 International Business Machines Corp. PMOS wordline boost cricuit for DRAM
US5175446A (en) * 1991-02-14 1992-12-29 Thomson, S.A. Demultiplexer including a three-state gate
US5241511A (en) * 1991-08-28 1993-08-31 Motorola, Inc. BiCMOS memory word line driver
US5182727A (en) * 1991-10-09 1993-01-26 Mitsubishi Semiconductor America, Inc. Array layout structure for implementing large high-density address decoders for gate array memories
JP2994120B2 (ja) * 1991-11-21 1999-12-27 株式会社東芝 半導体記憶装置
KR0113252Y1 (ko) * 1991-12-24 1998-04-14 문정환 워드라인 전압 공급회로
US5534797A (en) * 1994-12-23 1996-07-09 At&T Corp. Compact and fast row driver/decoder for semiconductor memory
US5572150A (en) * 1995-04-10 1996-11-05 International Business Machines Corporation Low power pre-discharged ratio logic
JPH0945082A (ja) * 1995-07-26 1997-02-14 Nec Corp 半導体メモリ
US5719818A (en) * 1996-04-18 1998-02-17 Waferscale Integration Inc. Row decoder having triple transistor word line drivers
US5808500A (en) * 1996-06-28 1998-09-15 Cypress Semiconductor Corporation Block architecture semiconductor memory array utilizing non-inverting pass gate local wordline driver
US5995016A (en) * 1996-12-17 1999-11-30 Rambus Inc. Method and apparatus for N choose M device selection
US5764589A (en) * 1997-03-28 1998-06-09 International Business Machines Corporation Array row and column decoder apparatus and method
US6542612B1 (en) 1997-10-03 2003-04-01 Alan W. Needham Companding amplifier with sidechannel gain control
US6055203A (en) * 1997-11-19 2000-04-25 Waferscale Integration Row decoder
KR100297139B1 (ko) * 1998-04-20 2001-10-29 가네꼬 히사시 반도체 집적회로
FR2779849B1 (fr) * 1998-06-15 2000-07-28 Schlumberger Ind Sa Dispositif a circuit integre securise au moyen de lignes complementaires de bus
JP2000243089A (ja) * 1999-02-19 2000-09-08 Fujitsu Ltd デコーダ回路及びデコード方法
US6785186B2 (en) * 2002-08-21 2004-08-31 Micron Technology, Inc. Design of an high speed xdecoder driving a large wordline load consuming less switching current for use in high speed syncflash memory
US6859071B2 (en) * 2002-12-10 2005-02-22 International Business Machines Corporation Pseudofooter circuit for dynamic CMOS (Complementary metal-oxide-semiconductor) logic
US6967501B1 (en) * 2003-12-18 2005-11-22 Integrated Device Technology, Inc. Impedance-matched output driver circuits having enhanced predriver control
US7257045B2 (en) * 2005-11-28 2007-08-14 Advanced Micro Devices, Inc. Uni-stage delay speculative address decoder
US7639545B2 (en) * 2007-10-01 2009-12-29 Advanced Micro Devices, Inc. Memory word line driver featuring reduced power consumption
US8385150B2 (en) * 2011-03-04 2013-02-26 Oracle International Corporation Delay efficient gater repeater
US10074493B2 (en) * 2016-11-21 2018-09-11 Aeroflex Colorado Springs Inc. Radiation-hardened break before make circuit
US10630293B2 (en) * 2017-03-31 2020-04-21 Adanced Micro Devices, Inc. High speed transmitter

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4156938A (en) * 1975-12-29 1979-05-29 Mostek Corporation MOSFET Memory chip with single decoder and bi-level interconnect lines
US4194130A (en) * 1977-11-21 1980-03-18 Motorola, Inc. Digital predecoding system
JPS5833633B2 (ja) * 1978-08-25 1983-07-21 シャープ株式会社 Ｍｏｓトランジスタ・デコ−ダ
US4308526A (en) * 1980-09-15 1981-12-29 Motorola Inc. Binary to one of N decoder having a true and a complement output
US4471240A (en) * 1982-08-19 1984-09-11 Motorola, Inc. Power-saving decoder for memories
JPS5990291A (ja) * 1982-11-16 1984-05-24 Nec Corp メモリ
JPS59117774A (ja) * 1982-12-24 1984-07-07 Hitachi Ltd デコ−ダ回路
US4514829A (en) * 1982-12-30 1985-04-30 International Business Machines Corporation Word line decoder and driver circuits for high density semiconductor memory
JPS6059588A (ja) * 1983-09-12 1985-04-05 Hitachi Ltd 半導体記憶装置
US4618784A (en) * 1985-01-28 1986-10-21 International Business Machines Corporation High-performance, high-density CMOS decoder/driver circuit
JPH069116B2 (ja) * 1985-05-24 1994-02-02 日立超エル・エス・アイエンジニアリング株式会社 半導体集積回路装置

Also Published As

Publication number Publication date
CA1271559A (en) 1990-07-10
US4843261A (en) 1989-06-27
DE68917953T2 (de) 1995-03-30
EP0330852A2 (de) 1989-09-06
JPH01229490A (ja) 1989-09-13
EP0330852B1 (de) 1994-09-07
EP0330852A3 (de) 1991-03-27

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Legal Events

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