DE602006005153D1 - Selektive, langsam programmierbare konvergenz in einer flash-speichervorrichtung - Google Patents

Selektive, langsam programmierbare konvergenz in einer flash-speichervorrichtung

Info

Publication number
DE602006005153D1
DE602006005153D1 DE602006005153T DE602006005153T DE602006005153D1 DE 602006005153 D1 DE602006005153 D1 DE 602006005153D1 DE 602006005153 T DE602006005153 T DE 602006005153T DE 602006005153 T DE602006005153 T DE 602006005153T DE 602006005153 D1 DE602006005153 D1 DE 602006005153D1
Authority
DE
Germany
Prior art keywords
voltage
threshold
sub
cell
verify
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006005153T
Other languages
English (en)
Inventor
Michele Incarnati
Giovanni Santin
Tommaso Vali
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority claimed from PCT/US2006/023217 external-priority patent/WO2006138413A1/en
Publication of DE602006005153D1 publication Critical patent/DE602006005153D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
DE602006005153T 2005-06-15 2006-06-13 Selektive, langsam programmierbare konvergenz in einer flash-speichervorrichtung Active DE602006005153D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
IT000310A ITRM20050310A1 (it) 2005-06-15 2005-06-15 Convergenza a programmazione selettiva lenta in un dispositivo di memoria flash.
US11/414,982 US7324383B2 (en) 2005-06-15 2006-05-01 Selective slow programming convergence in a flash memory device
PCT/US2006/023217 WO2006138413A1 (en) 2005-06-15 2006-06-13 Selective slow programming convergence in a flash memory device

Publications (1)

Publication Number Publication Date
DE602006005153D1 true DE602006005153D1 (de) 2009-03-26

Family

ID=37573200

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006005153T Active DE602006005153D1 (de) 2005-06-15 2006-06-13 Selektive, langsam programmierbare konvergenz in einer flash-speichervorrichtung

Country Status (7)

Country Link
US (1) US7324383B2 (de)
JP (1) JP2009509276A (de)
CN (1) CN101199025B (de)
AT (1) ATE422701T1 (de)
DE (1) DE602006005153D1 (de)
IT (1) ITRM20050310A1 (de)
TW (1) TWI320181B (de)

Families Citing this family (110)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006138413A1 (en) * 2005-06-15 2006-12-28 Micron Technology, Inc. Selective slow programming convergence in a flash memory device
US7949845B2 (en) 2005-08-03 2011-05-24 Sandisk Corporation Indexing of file data in reprogrammable non-volatile memories that directly store data files
KR101317625B1 (ko) * 2005-12-29 2013-10-10 샌디스크 테크놀로지스, 인코포레이티드 비휘발성 메모리에서 향상된 프로그램-검증 작동을 위한방법 및 장치
WO2007132452A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Reducing programming error in memory devices
WO2007132456A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Memory device with adaptive capacity
WO2007132457A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
WO2007132453A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Distortion estimation and cancellation in memory devices
US8060806B2 (en) 2006-08-27 2011-11-15 Anobit Technologies Ltd. Estimation of non-linear distortion in memory devices
CN101601094B (zh) 2006-10-30 2013-03-27 苹果公司 使用多个门限读取存储单元的方法
WO2008053472A2 (en) 2006-10-30 2008-05-08 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US7924648B2 (en) 2006-11-28 2011-04-12 Anobit Technologies Ltd. Memory power and performance management
US8116117B2 (en) * 2006-11-29 2012-02-14 Samsung Electronics Co., Ltd. Method of driving multi-level variable resistive memory device and multi-level variable resistive memory device
KR100801082B1 (ko) * 2006-11-29 2008-02-05 삼성전자주식회사 멀티 레벨 가변 저항 메모리 장치의 구동 방법 및 멀티레벨 가변 저항 메모리 장치
US8151163B2 (en) 2006-12-03 2012-04-03 Anobit Technologies Ltd. Automatic defect management in memory devices
US7900102B2 (en) 2006-12-17 2011-03-01 Anobit Technologies Ltd. High-speed programming of memory devices
US7751240B2 (en) 2007-01-24 2010-07-06 Anobit Technologies Ltd. Memory device with negative thresholds
US8151166B2 (en) 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
US8369141B2 (en) 2007-03-12 2013-02-05 Apple Inc. Adaptive estimation of memory cell read thresholds
ITRM20070167A1 (it) * 2007-03-27 2008-09-29 Micron Technology Inc Non-volatile multilevel memory cell programming
US8001320B2 (en) 2007-04-22 2011-08-16 Anobit Technologies Ltd. Command interface for memory devices
US7656709B2 (en) 2007-05-03 2010-02-02 Micron Technology, Inc. NAND step up voltage switching method
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
US8429493B2 (en) 2007-05-12 2013-04-23 Apple Inc. Memory device with internal signap processing unit
US7925936B1 (en) 2007-07-13 2011-04-12 Anobit Technologies Ltd. Memory device with non-uniform programming levels
KR100908560B1 (ko) * 2007-08-06 2009-07-21 주식회사 하이닉스반도체 플래시 메모리 소자의 프로그램 방법
US8259497B2 (en) 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US7773413B2 (en) 2007-10-08 2010-08-10 Anobit Technologies Ltd. Reliable data storage in analog memory cells in the presence of temperature variations
US8068360B2 (en) 2007-10-19 2011-11-29 Anobit Technologies Ltd. Reading analog memory cells using built-in multi-threshold commands
US8000141B1 (en) 2007-10-19 2011-08-16 Anobit Technologies Ltd. Compensation for voltage drifts in analog memory cells
US8527819B2 (en) 2007-10-19 2013-09-03 Apple Inc. Data storage in analog memory cell arrays having erase failures
KR101509836B1 (ko) 2007-11-13 2015-04-06 애플 인크. 멀티 유닛 메모리 디바이스에서의 메모리 유닛의 최적화된 선택
US7633798B2 (en) * 2007-11-21 2009-12-15 Micron Technology, Inc. M+N bit programming and M+L bit read for M bit memory cells
US8225181B2 (en) 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8085586B2 (en) 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US7924587B2 (en) 2008-02-21 2011-04-12 Anobit Technologies Ltd. Programming of analog memory cells using a single programming pulse per state transition
US7864573B2 (en) 2008-02-24 2011-01-04 Anobit Technologies Ltd. Programming analog memory cells for reduced variance after retention
KR101448851B1 (ko) 2008-02-26 2014-10-13 삼성전자주식회사 비휘발성 메모리 장치에서의 프로그래밍 방법
ITRM20080114A1 (it) 2008-02-29 2009-09-01 Micron Technology Inc Compensazione della perdita di carica durante la programmazione di un dispositivo di memoria.
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US8059457B2 (en) 2008-03-18 2011-11-15 Anobit Technologies Ltd. Memory device with multiple-accuracy read commands
KR101412974B1 (ko) * 2008-05-28 2014-06-30 삼성전자주식회사 메모리 장치 및 메모리 프로그래밍 방법
US7924613B1 (en) 2008-08-05 2011-04-12 Anobit Technologies Ltd. Data storage in analog memory cells with protection against programming interruption
US7995388B1 (en) 2008-08-05 2011-08-09 Anobit Technologies Ltd. Data storage using modified voltages
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8000135B1 (en) 2008-09-14 2011-08-16 Anobit Technologies Ltd. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US7839687B2 (en) * 2008-10-16 2010-11-23 Sandisk Corporation Multi-pass programming for memory using word line coupling
US8713330B1 (en) 2008-10-30 2014-04-29 Apple Inc. Data scrambling in memory devices
US7852671B2 (en) 2008-10-30 2010-12-14 Micron Technology, Inc. Data path for multi-level cell memory, methods for storing and methods for utilizing a memory array
US8208304B2 (en) 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8064252B2 (en) 2008-11-21 2011-11-22 Micron Technology, Inc. Multi-pass programming in a memory device
US8397131B1 (en) 2008-12-31 2013-03-12 Apple Inc. Efficient readout schemes for analog memory cell devices
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8223551B2 (en) 2009-02-19 2012-07-17 Micron Technology, Inc. Soft landing for desired program threshold voltage
US8228701B2 (en) 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8482975B2 (en) * 2009-09-14 2013-07-09 Micron Technology, Inc. Memory kink checking
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8243521B2 (en) * 2009-12-04 2012-08-14 Micron Technology, Inc. Method for kink compensation in a memory
US8139419B2 (en) 2009-12-08 2012-03-20 Micron Technology, Inc. Programming methods and memories
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8677203B1 (en) 2010-01-11 2014-03-18 Apple Inc. Redundant data storage schemes for multi-die memory systems
US8767487B2 (en) * 2010-03-02 2014-07-01 Micron Technology, Inc. Drain select gate voltage management
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8472256B2 (en) 2010-05-12 2013-06-25 Micron Technology, Inc. Non-volatile memory programming
KR20110131648A (ko) * 2010-05-31 2011-12-07 삼성전자주식회사 비휘발성 메모리 장치, 그것을 포함한 메모리 시스템 및 메모리 카드 및 그것의 프로그램 방법
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8767459B1 (en) 2010-07-31 2014-07-01 Apple Inc. Data storage in analog memory cells across word lines using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
US8385132B2 (en) * 2010-12-22 2013-02-26 Sandisk Technologies Inc. Alternate bit line bias during programming to reduce channel to floating gate coupling in memory
US8917553B2 (en) 2011-03-25 2014-12-23 Micron Technology, Inc. Non-volatile memory programming
JP2011204356A (ja) * 2011-07-19 2011-10-13 Toshiba Corp 不揮発性半導体記憶装置
US8743622B2 (en) 2012-01-13 2014-06-03 Micron Technology, Inc. Memory devices and programming methods that program a memory cell with a data value, read the data value from the memory cell and reprogram the memory cell with the read data value
KR102016036B1 (ko) * 2012-08-30 2019-08-29 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이의 동작 방법
US9082510B2 (en) * 2012-09-14 2015-07-14 Freescale Semiconductor, Inc. Non-volatile memory (NVM) with adaptive write operations
US8953386B2 (en) 2012-10-25 2015-02-10 Sandisk Technologies Inc. Dynamic bit line bias for programming non-volatile memory
KR20140076128A (ko) * 2012-12-12 2014-06-20 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 동작 방법과, 이를 포함하는 데이터 처리 시스템
US9767894B2 (en) 2014-06-09 2017-09-19 Micron Technology, Inc. Programming memories with stepped programming pulses
US9396791B2 (en) 2014-07-18 2016-07-19 Micron Technology, Inc. Programming memories with multi-level pass signal
US10074439B2 (en) * 2015-06-04 2018-09-11 SK Hynix Inc. Modeling method of threshold voltage distributions
KR20170073980A (ko) * 2015-12-21 2017-06-29 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그것의 동작 방법
CN106935263A (zh) * 2015-12-29 2017-07-07 北京兆易创新科技股份有限公司 一种存储单元的编程方法
JP6503395B2 (ja) * 2016-10-12 2019-04-17 イーメモリー テクノロジー インコーポレイテッド 静電放電回路
KR20190019427A (ko) * 2017-08-17 2019-02-27 에스케이하이닉스 주식회사 메모리 장치 및 그 동작 방법
US10623192B2 (en) * 2017-08-25 2020-04-14 Synopsys, Inc. Gate oxide breakdown in OTP memory cells for physical unclonable function (PUF) security
CN111312318B (zh) * 2018-12-12 2022-03-01 北京兆易创新科技股份有限公司 一种非易失存储器控制方法以及装置
CN109863557A (zh) 2019-01-23 2019-06-07 长江存储科技有限责任公司 用于对存储器系统进行编程的方法
CN110619916A (zh) * 2019-08-12 2019-12-27 长江存储科技有限责任公司 存储器编程方法、装置、电子设备及可读存储介质
KR20210074028A (ko) * 2019-12-11 2021-06-21 에스케이하이닉스 주식회사 메모리 장치 및 그 동작 방법
US11017856B1 (en) * 2020-02-18 2021-05-25 Applied Materials, Inc. Soft reset for multi-level programming of memory cells in non-Von Neumann architectures
US11127458B1 (en) 2020-04-28 2021-09-21 Applied Materials, Inc. Non-uniform state spacing in multi-state memory element for low-power operation
US11488677B2 (en) 2020-12-10 2022-11-01 Micron Technology, Inc. Distributed compaction of logical states to reduce program time
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69932703T2 (de) 1999-04-21 2007-09-06 Stmicroelectronics S.R.L., Agrate Brianza Verfahren zur Differenzierung von Programmier- und Löschspannung in nichtflüchtigem Speicher und Herstellungsverfahren hierfür
US6914827B2 (en) 1999-07-28 2005-07-05 Samsung Electronics Co., Ltd. Flash memory device capable of preventing an over-erase of flash memory cells and erase method thereof
JP3631463B2 (ja) * 2001-12-27 2005-03-23 株式会社東芝 不揮発性半導体記憶装置
KR100395771B1 (ko) 2001-06-16 2003-08-21 삼성전자주식회사 불휘발성 반도체 메모리 장치 및 그것의 프로그램 방법
JP3867624B2 (ja) 2002-06-06 2007-01-10 セイコーエプソン株式会社 不揮発性半導体記憶装置およびその駆動方法
JP3889699B2 (ja) * 2002-11-29 2007-03-07 株式会社東芝 不揮発性半導体記憶装置及びそのデータ書き込み方法
US6888758B1 (en) 2004-01-21 2005-05-03 Sandisk Corporation Programming non-volatile memory
US7068539B2 (en) * 2004-01-27 2006-06-27 Sandisk Corporation Charge packet metering for coarse/fine programming of non-volatile memory

Also Published As

Publication number Publication date
US7324383B2 (en) 2008-01-29
US20060285392A1 (en) 2006-12-21
TWI320181B (en) 2010-02-01
ITRM20050310A1 (it) 2006-12-16
ATE422701T1 (de) 2009-02-15
TW200709209A (en) 2007-03-01
JP2009509276A (ja) 2009-03-05
CN101199025A (zh) 2008-06-11
CN101199025B (zh) 2012-02-29

Similar Documents

Publication Publication Date Title
DE602006005153D1 (de) Selektive, langsam programmierbare konvergenz in einer flash-speichervorrichtung
WO2009111158A3 (en) Charge loss compensation during programming of a memory device
TW200733358A (en) Memory cell comprising switchable semiconductor memory element with trimmable resistance
WO2006107796A3 (en) Faster programming of higher level states in multi-level cell flash memory
WO2005057585A3 (en) Nand memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
TW200615949A (en) Variable programming of non-volatile memory
TW200705447A (en) Use of data latches in multi-phase programming of non-volatile memories
TW201612911A (en) Memory device
TW200612433A (en) Programming inhibit for non-volatile memory
WO2009009076A3 (en) Error correction for memory
WO2007076512A3 (en) Methods and device for improved program-verify operations in non-volatile memories
WO2008157037A3 (en) Coarse and fine programming in a solid state memory
WO2012171989A3 (en) Non-volatile memory element
WO2014074408A3 (en) 3d nand stacked non-volatile storage programming to conductive state
TW200737211A (en) An programmable non-volatile memory device of lowing program margin needed for user program operation and method for testing the same
ATE421121T1 (de) Verfahren zum archivieren von daten
WO2012178199A3 (en) Memory array architecture with two-terminal memory cells
WO2009139567A3 (en) Memory device and memory programming method
JP2010518538A5 (de)
TW200631023A (en) Page buffer and multi-state nonvolatile memory device including the same
JP2008541325A5 (de)
WO2011066034A3 (en) Resetting phase change memory bits
TW200721175A (en) Method of writing to non-volatile semiconductor memory device storing information depending on variation in level of threshold voltage
WO2007059402A3 (en) Flash memory sensing scheme
TW201614660A (en) Nonvolatile memory having memory array with differential cells

Legal Events

Date Code Title Description
8364 No opposition during term of opposition