DE602006000579D1 - CBRAM-Schaltung - Google Patents

CBRAM-Schaltung

Info

Publication number
DE602006000579D1
DE602006000579D1 DE602006000579T DE602006000579T DE602006000579D1 DE 602006000579 D1 DE602006000579 D1 DE 602006000579D1 DE 602006000579 T DE602006000579 T DE 602006000579T DE 602006000579 T DE602006000579 T DE 602006000579T DE 602006000579 D1 DE602006000579 D1 DE 602006000579D1
Authority
DE
Germany
Prior art keywords
cbram
circuit
cbram circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006000579T
Other languages
English (en)
Other versions
DE602006000579T2 (de
Inventor
Corvin Liaw
Ralf Symanczyk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Original Assignee
Qimonda AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qimonda AG filed Critical Qimonda AG
Publication of DE602006000579D1 publication Critical patent/DE602006000579D1/de
Application granted granted Critical
Publication of DE602006000579T2 publication Critical patent/DE602006000579T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009—RRAM elements whose operation depends upon chemical change
    • G11C13/0011—RRAM elements whose operation depends upon chemical change comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0033—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0064—Verifying circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3431—Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/009—Write using potential difference applied between cell electrodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor
DE602006000579T 2005-05-20 2006-04-11 Verfahren für den Betrieb eines PMC-Speichers und CBRAM-Schaltung Active DE602006000579T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US133716 2005-05-20
US11/133,716 US8531863B2 (en) 2005-05-20 2005-05-20 Method for operating an integrated circuit having a resistivity changing memory cell

Publications (2)

Publication Number Publication Date
DE602006000579D1 true DE602006000579D1 (de) 2008-04-10
DE602006000579T2 DE602006000579T2 (de) 2009-03-19

Family

ID=36930208

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006000579T Active DE602006000579T2 (de) 2005-05-20 2006-04-11 Verfahren für den Betrieb eines PMC-Speichers und CBRAM-Schaltung

Country Status (5)

Country Link
US (1) US8531863B2 (de)
EP (1) EP1727151B1 (de)
JP (1) JP4516049B2 (de)
KR (1) KR100849264B1 (de)
DE (1) DE602006000579T2 (de)

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KR100843144B1 (ko) * 2006-12-20 2008-07-02 삼성전자주식회사 저항체를 이용한 비휘발성 메모리 장치 및 그 구동 방법
US7474579B2 (en) * 2006-12-20 2009-01-06 Spansion Llc Use of periodic refresh in medium retention memory arrays
JP5159224B2 (ja) * 2007-09-21 2013-03-06 株式会社東芝 抵抗変化メモリ装置
US20090196088A1 (en) * 2008-02-01 2009-08-06 Rok Dittrich Resistance control in conductive bridging memories
JP5272596B2 (ja) * 2008-09-09 2013-08-28 日本電気株式会社 記憶装置およびその制御方法
US8331128B1 (en) * 2008-12-02 2012-12-11 Adesto Technologies Corporation Reconfigurable memory arrays having programmable impedance elements and corresponding methods
JP4720912B2 (ja) * 2009-01-22 2011-07-13 ソニー株式会社 抵抗変化型メモリデバイス
US8270199B2 (en) * 2009-04-03 2012-09-18 Sandisk 3D Llc Cross point non-volatile memory cell
US8391051B2 (en) * 2009-04-10 2013-03-05 Panasonic Corporation Method of programming nonvolatile memory element
US8593853B2 (en) 2010-03-30 2013-11-26 Panasonic Corporation Nonvolatile storage device and method for writing into the same
JP5149358B2 (ja) * 2010-09-24 2013-02-20 シャープ株式会社 半導体記憶装置
US8913444B1 (en) * 2011-03-01 2014-12-16 Adesto Technologies Corporation Read operations and circuits for memory devices having programmable elements, including programmable resistance elements
US9099175B1 (en) 2011-03-01 2015-08-04 Adesto Technologies Corporation Memory devices and methods for read and write operation to memory elements having dynamic change in property
US8854873B1 (en) 2011-05-05 2014-10-07 Adesto Technologies Corporation Memory devices, architectures and methods for memory elements having dynamic change in property
JP5634367B2 (ja) * 2011-09-26 2014-12-03 株式会社東芝 半導体記憶装置
US8995173B1 (en) 2011-09-29 2015-03-31 Adesto Technologies Corporation Memory cells, devices and method with dynamic storage elements and programmable impedance shadow elements
US8976568B1 (en) 2012-01-20 2015-03-10 Adesto Technologies Corporation Circuits and methods for programming variable impedance elements
JP5763004B2 (ja) 2012-03-26 2015-08-12 株式会社東芝 不揮発性半導体記憶装置
US9305643B2 (en) * 2012-03-27 2016-04-05 Adesto Technologies Corporation Solid electrolyte based memory devices and methods having adaptable read threshold levels
US8730752B1 (en) 2012-04-02 2014-05-20 Adesto Technologies Corporation Circuits and methods for placing programmable impedance memory elements in high impedance states
US9135978B2 (en) 2012-07-11 2015-09-15 Micron Technology, Inc. Memory programming methods and memory systems
CN103578532B (zh) * 2012-08-01 2016-08-10 旺宏电子股份有限公司 存储装置的操作方法与存储器阵列及其操作方法
JP2014038675A (ja) * 2012-08-15 2014-02-27 Sony Corp 記憶装置および駆動方法
US9007808B1 (en) * 2012-09-27 2015-04-14 Adesto Technologies Corporation Safeguarding data through an SMT process
KR102055375B1 (ko) * 2013-01-14 2020-01-22 삼성전자 주식회사 저항체를 이용한 비휘발성 메모리 장치 및 이를 포함하는 메모리 시스템
US9058869B2 (en) 2013-02-07 2015-06-16 Seagate Technology Llc Applying a bias signal to memory cells to reverse a resistance shift of the memory cells
US9293196B2 (en) 2013-03-15 2016-03-22 Micron Technology, Inc. Memory cells, memory systems, and memory programming methods
US9613693B1 (en) 2015-10-29 2017-04-04 Adesto Technologies Corporation Methods for setting a resistance of programmable resistance memory cells and devices including the same
WO2017171823A1 (en) * 2016-03-31 2017-10-05 Intel Corporation Multilayer selector device with low holding voltage
US10984861B1 (en) 2017-07-12 2021-04-20 Adesto Technologies Corporation Reference circuits and methods for resistive memories
US10964385B1 (en) * 2019-11-14 2021-03-30 Micron Technology, Inc. Restoring memory cell threshold voltages
KR102226206B1 (ko) 2020-02-06 2021-03-11 포항공과대학교 산학협력단 이중 pn 접합을 포함하는 메모리 소자 및 그 구동방법

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DE4014151A1 (de) 1990-05-02 1991-11-07 Detecon Gmbh Verfahren zur verlaengerung der benutzungsdauer von informationstraegern mit eeprom
JPH08306192A (ja) 1995-05-10 1996-11-22 Matsushita Electric Ind Co Ltd 不揮発性メモリ書き込み装置
US5687112A (en) * 1996-04-19 1997-11-11 Energy Conversion Devices, Inc. Multibit single cell memory element having tapered contact
US6646902B2 (en) 2001-08-30 2003-11-11 Micron Technology, Inc. Method of retaining memory state in a programmable conductor RAM
US6891749B2 (en) 2002-02-20 2005-05-10 Micron Technology, Inc. Resistance variable ‘on ’ memory
US7010644B2 (en) 2002-08-29 2006-03-07 Micron Technology, Inc. Software refreshed memory device and method
KR100492900B1 (ko) * 2002-11-19 2005-06-02 주식회사 하이닉스반도체 전압 팔로워를 구비한 프로그램 가능한 금속화 셀 메모리장치및 그 구동 방법
JP4285082B2 (ja) * 2003-05-27 2009-06-24 ソニー株式会社 記憶装置
US6961277B2 (en) 2003-07-08 2005-11-01 Micron Technology, Inc. Method of refreshing a PCRAM memory device
DE102004019860B4 (de) * 2004-04-23 2006-03-02 Infineon Technologies Ag Verfahren und Vorrichtung zur Programmierung von CBRAM-Speicherzellen
US7224598B2 (en) 2004-09-02 2007-05-29 Hewlett-Packard Development Company, L.P. Programming of programmable resistive memory devices

Also Published As

Publication number Publication date
EP1727151B1 (de) 2008-02-27
KR20060120437A (ko) 2006-11-27
US8531863B2 (en) 2013-09-10
US20060265548A1 (en) 2006-11-23
EP1727151A1 (de) 2006-11-29
DE602006000579T2 (de) 2009-03-19
JP4516049B2 (ja) 2010-08-04
JP2006331626A (ja) 2006-12-07
KR100849264B1 (ko) 2008-07-29

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