DE60122970D1 - Frequenzsynthesizer mit gebrochenem Teilverhältnis und Verfahren zur Phasenfehlerunterdrückung dafür - Google Patents

Frequenzsynthesizer mit gebrochenem Teilverhältnis und Verfahren zur Phasenfehlerunterdrückung dafür

Info

Publication number
DE60122970D1
DE60122970D1 DE60122970T DE60122970T DE60122970D1 DE 60122970 D1 DE60122970 D1 DE 60122970D1 DE 60122970 T DE60122970 T DE 60122970T DE 60122970 T DE60122970 T DE 60122970T DE 60122970 D1 DE60122970 D1 DE 60122970D1
Authority
DE
Germany
Prior art keywords
broken
phase error
frequency synthesizer
method therefor
suppression method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60122970T
Other languages
English (en)
Other versions
DE60122970T2 (de
Inventor
Morihito Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE60122970D1 publication Critical patent/DE60122970D1/de
Application granted granted Critical
Publication of DE60122970T2 publication Critical patent/DE60122970T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
DE60122970T 2000-06-15 2001-05-09 Frequenzsynthesizer mit gebrochenem Teilverhältnis und Verfahren zur Phasenfehlerunterdrückung dafür Expired - Lifetime DE60122970T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000179470 2000-06-15
JP2000179470A JP4198303B2 (ja) 2000-06-15 2000-06-15 Ｆｒａｃｔｉｏｎａｌ−ＮＰＬＬ周波数シンセサイザの位相誤差除去方法及びＦｒａｃｔｉｏｎａｌ−ＮＰＬＬ周波数シンセサイザ

Publications (2)

Publication Number Publication Date
DE60122970D1 true DE60122970D1 (de) 2006-10-26
DE60122970T2 DE60122970T2 (de) 2006-12-21

Family

ID=18680744

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60122970T Expired - Lifetime DE60122970T2 (de) 2000-06-15 2001-05-09 Frequenzsynthesizer mit gebrochenem Teilverhältnis und Verfahren zur Phasenfehlerunterdrückung dafür

Country Status (4)

Country Link
US (1) US6515525B2 (de)
EP (1) EP1164701B1 (de)
JP (1) JP4198303B2 (de)
DE (1) DE60122970T2 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3605023B2 (ja) * 2000-10-05 2004-12-22 山形日本電気株式会社 クロック生成回路
JP2002217723A (ja) * 2001-01-23 2002-08-02 Mitsubishi Electric Corp 小数点分周方式ｐｌｌ周波数シンセサイザ
US6774679B2 (en) * 2001-05-30 2004-08-10 Thine Electronics Inc. Semiconductor integrated circuit
US7327820B2 (en) * 2003-11-05 2008-02-05 Massachusetts Institute Of Technology Method and apparatus for reducing quantization noise in fractional-N frequency synthesizers
US7038507B2 (en) * 2003-11-14 2006-05-02 Teledyne Technologies Incorporated Frequency synthesizer having PLL with an analog phase detector
JP4431015B2 (ja) 2004-09-09 2010-03-10 株式会社ルネサステクノロジ 位相同期ループ回路
KR100684053B1 (ko) 2005-02-14 2007-02-16 삼성전자주식회사 시그마 델타 변조 장치, 이를 이용한 주파수 합성기 및 분수 분주 주파수 합성 방법
US7282973B1 (en) * 2005-12-07 2007-10-16 Altera Corporation Enhanced DLL phase output scheme
JP4805706B2 (ja) * 2006-03-24 2011-11-02 日本電波工業株式会社 恒温型の水晶発振器
US7514970B2 (en) * 2006-08-23 2009-04-07 Giga-Tronics, Inc. Decimal frequency synthesizer
US7656236B2 (en) * 2007-05-15 2010-02-02 Teledyne Wireless, Llc Noise canceling technique for frequency synthesizer
GB0804337D0 (en) 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Dual phase detector phase-locked loop
US8179045B2 (en) * 2008-04-22 2012-05-15 Teledyne Wireless, Llc Slow wave structure having offset projections comprised of a metal-dielectric composite stack
US7848266B2 (en) 2008-07-25 2010-12-07 Analog Devices, Inc. Frequency synthesizers for wireless communication systems
TWI431944B (zh) * 2009-04-10 2014-03-21 Hittite Microwave Corp 具有降低分數式切換雜訊之分數式ｎ頻率合成器
JP4500362B2 (ja) * 2009-07-21 2010-07-14 株式会社ルネサステクノロジ 位相同期ループ回路
JP6029747B2 (ja) * 2012-05-11 2016-11-24 ヨーロピアン スペース エージェンシー 周波数調節可能なデジタル信号の生成方法及び装置、並びにこれらを用いた周波数シンセサイザー
JP6077290B2 (ja) * 2012-12-06 2017-02-08 ルネサスエレクトロニクス株式会社 半導体装置、無線通信端末及び半導体装置の制御方法
US9202660B2 (en) 2013-03-13 2015-12-01 Teledyne Wireless, Llc Asymmetrical slow wave structures to eliminate backward wave oscillations in wideband traveling wave tubes
KR102076326B1 (ko) 2013-05-09 2020-02-12 삼성전자주식회사 위상 로테이팅 위상동기회로 및 그것의 동작 제어방법
US9225348B2 (en) 2014-01-10 2015-12-29 International Business Machines Corporation Prediction based digital control for fractional-N PLLs
US11095295B2 (en) 2018-06-26 2021-08-17 Silicon Laboratories Inc. Spur cancellation for spur measurement
US10819353B1 (en) * 2019-10-04 2020-10-27 Silicon Laboratories Inc. Spur cancellation in a PLL system with an automatically updated target spur frequency
US11038521B1 (en) 2020-02-28 2021-06-15 Silicon Laboratories Inc. Spur and quantization noise cancellation for PLLS with non-linear phase detection
US11316522B2 (en) 2020-06-15 2022-04-26 Silicon Laboratories Inc. Correction for period error in a reference clock signal
RU2765273C1 (ru) * 2021-07-01 2022-01-27 Акционерное общество "Концерн "Созвездие" Цифровой формирователь частотно-модулированных сигналов с низким уровнем искажений

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU4953979A (en) * 1978-08-16 1980-02-21 Sony Corporation Receiver tuning with frequency synthesizer
US4965531A (en) * 1989-11-22 1990-10-23 Carleton University Frequency synthesizers having dividing ratio controlled by sigma-delta modulator
US5180993A (en) * 1990-01-15 1993-01-19 Telefonaktiebolaget L M Ericsson Method and arrangement for frequency synthesis
JPH05243994A (ja) * 1991-09-17 1993-09-21 Kenwood Corp フラクショナルｎシンセサイザのスプリアスキャンセル回路
US5576666A (en) * 1993-11-12 1996-11-19 Nippondenso Technical Center Usa, Inc. Fractional-N frequency synthesizer with temperature compensation
JPH07302938A (ja) * 1994-04-28 1995-11-14 Sony Corp 圧電セラミックトランス及びその製造方法
JP3319677B2 (ja) * 1995-08-08 2002-09-03 三菱電機株式会社 周波数シンセサイザ
DE69624952T2 (de) * 1996-01-09 2003-08-28 Sanyo Electric Co., Ltd. Einstellbarer Frequenzteiler
JP3653892B2 (ja) * 1996-11-21 2005-06-02 富士通株式会社 フラクショナルｎ周波数シンセサイザ
JP3102373B2 (ja) * 1997-03-12 2000-10-23 日本電気株式会社 周波数シンセサイザ
US5834987A (en) * 1997-07-30 1998-11-10 Ercisson Inc. Frequency synthesizer systems and methods for three-point modulation with a DC response
US6236275B1 (en) * 1997-10-24 2001-05-22 Ericsson Inc. Digital frequency synthesis by sequential fraction approximations
JPH11225072A (ja) 1998-02-05 1999-08-17 Fujitsu Ltd スプリアス抑制装置、スプリアス抑制方法およびフラクショナルｎシンセサイザ

Also Published As

Publication number Publication date
EP1164701B1 (de) 2006-09-13
US6515525B2 (en) 2003-02-04
US20010052804A1 (en) 2001-12-20
JP4198303B2 (ja) 2008-12-17
DE60122970T2 (de) 2006-12-21
JP2001358584A (ja) 2001-12-26
EP1164701A2 (de) 2001-12-19
EP1164701A3 (de) 2004-04-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE