DE60125299D1 - Frequenzsynthesizer und Verfahren zur Frequenzsynthese mit geringem Rauschen - Google Patents
Frequenzsynthesizer und Verfahren zur Frequenzsynthese mit geringem RauschenInfo
- Publication number
- DE60125299D1 DE60125299D1 DE60125299T DE60125299T DE60125299D1 DE 60125299 D1 DE60125299 D1 DE 60125299D1 DE 60125299 T DE60125299 T DE 60125299T DE 60125299 T DE60125299 T DE 60125299T DE 60125299 D1 DE60125299 D1 DE 60125299D1
- Authority
- DE
- Germany
- Prior art keywords
- frequency
- low noise
- synthesis
- synthesizer
- frequency synthesizer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000015572 biosynthetic process Effects 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 238000003786 synthesis reaction Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
- H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
- H03L7/1978—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider using a cycle or pulse removing circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0012459 | 2000-09-29 | ||
FR0012459 | 2000-09-29 | ||
FR0017042A FR2818833A1 (fr) | 2000-12-26 | 2000-12-26 | Synthetiseur de frequences et procede de synthese de frequences a faible bruit |
FR0017042 | 2000-12-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60125299D1 true DE60125299D1 (de) | 2007-02-01 |
DE60125299T2 DE60125299T2 (de) | 2007-10-04 |
Family
ID=26212643
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60125299T Expired - Lifetime DE60125299T2 (de) | 2000-09-29 | 2001-09-25 | Frequenzsynthesizer und Verfahren zur Frequenzsynthese mit geringem Rauschen |
Country Status (4)
Country | Link |
---|---|
US (1) | US6703901B2 (de) |
EP (1) | EP1193878B1 (de) |
JP (1) | JP4900753B2 (de) |
DE (1) | DE60125299T2 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100398048B1 (ko) * | 2001-12-11 | 2003-09-19 | 한국전자통신연구원 | 델타 시그마 나누기의 구조 |
KR100498463B1 (ko) * | 2002-11-22 | 2005-07-01 | 삼성전자주식회사 | 프랙셔널-n 주파수 합성기 및 이를 구성하는 시그마-델타변조기 |
US7181180B1 (en) | 2003-05-15 | 2007-02-20 | Marvell International Ltd. | Sigma delta modulated phase lock loop with phase interpolation |
US7480343B2 (en) * | 2003-07-16 | 2009-01-20 | Ericsson Technology Licensing Ab | Transceiver architecture with reduced VCO-pulling sensitivity |
US7417510B2 (en) * | 2006-09-28 | 2008-08-26 | Silicon Laboratories Inc. | Direct digital interpolative synthesis |
TWI351820B (en) * | 2007-03-27 | 2011-11-01 | Mstar Semiconductor Inc | Clock generator, method for generating clock signa |
US20080258942A1 (en) * | 2007-04-23 | 2008-10-23 | Infineon Technologies Ag | Sigma-delta multiplier, phase-locked loop with extended tuning range and methods for generating rf signals |
US7764134B2 (en) * | 2007-06-14 | 2010-07-27 | Silicon Laboratories Inc. | Fractional divider |
CN101098142B (zh) * | 2007-06-14 | 2011-05-04 | 复旦大学 | 多边带正交频分复用超宽带系统射频收发机的频率综合器 |
TWI345881B (en) * | 2007-12-03 | 2011-07-21 | Ind Tech Res Inst | Spread spectrum clock generating appartus |
CN101471909B (zh) * | 2007-12-26 | 2010-12-15 | 中国科学院微电子研究所 | 用于ofdm uwb的六频带频率综合器 |
US8248175B2 (en) | 2010-12-30 | 2012-08-21 | Silicon Laboratories Inc. | Oscillator with external voltage control and interpolative divider in the output path |
JP5799536B2 (ja) | 2011-03-17 | 2015-10-28 | 株式会社リコー | フラクショナルpll回路 |
CN102497208A (zh) * | 2011-12-23 | 2012-06-13 | 无锡华测电子系统有限公司 | 一种宽频带的x波段直接式频率综合器及信号产生方法 |
JP6121240B2 (ja) * | 2013-05-23 | 2017-04-26 | 日本無線株式会社 | シグマデルタ変調器 |
US20200076488A1 (en) | 2018-08-30 | 2020-03-05 | Skyworks Solutions, Inc. | Beamforming communication systems with sensor aided beam management |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1560233A (en) * | 1977-02-02 | 1980-01-30 | Marconi Co Ltd | Frequency synthesisers |
US5038117A (en) * | 1990-01-23 | 1991-08-06 | Hewlett-Packard Company | Multiple-modulator fractional-N divider |
US5055802A (en) * | 1990-04-30 | 1991-10-08 | Motorola, Inc. | Multiaccumulator sigma-delta fractional-n synthesis |
JP3425976B2 (ja) | 1991-10-17 | 2003-07-14 | 真作 森 | 周波数変換回路 |
FR2714552B1 (fr) | 1993-12-28 | 1996-01-26 | Thomson Csf | Synthétiseur de fréquences à boucle unique et ensemble électronique comportant un tel synthétiseur. |
US5808493A (en) * | 1995-08-03 | 1998-09-15 | Anritsu Corporation | Rational frequency division device and frequency synthesizer using the same |
EP0766403B1 (de) * | 1995-09-28 | 2003-12-10 | Sanyo Electric Co. Ltd | Einstellbarer Frequenzteiler |
JP3281817B2 (ja) * | 1995-09-28 | 2002-05-13 | 三洋電機株式会社 | 可変分周装置 |
JPH09307439A (ja) * | 1996-05-09 | 1997-11-28 | Matsushita Electric Ind Co Ltd | 周波数シンセサイザ |
JPH10126263A (ja) * | 1996-10-17 | 1998-05-15 | Matsushita Electric Ind Co Ltd | 周波数シンセサイザ装置 |
US6008703A (en) * | 1997-01-31 | 1999-12-28 | Massachusetts Institute Of Technology | Digital compensation for wideband modulation of a phase locked loop frequency synthesizer |
US5903194A (en) * | 1997-08-05 | 1999-05-11 | Rockwell Science Center, Inc. | Digital phase modulation of frequency synthesizer using modulated fractional division |
US6047029A (en) * | 1997-09-16 | 2000-04-04 | Telefonaktiebolaget Lm Ericsson | Post-filtered delta sigma for controlling a phase locked loop modulator |
US5867068A (en) * | 1997-10-27 | 1999-02-02 | Motorola, Inc. | Frequency synthesizer using double resolution fractional frequency division |
US6219397B1 (en) * | 1998-03-20 | 2001-04-17 | Samsung Electronics Co., Ltd. | Low phase noise CMOS fractional-N frequency synthesizer for wireless communications |
-
2001
- 2001-09-25 DE DE60125299T patent/DE60125299T2/de not_active Expired - Lifetime
- 2001-09-25 EP EP01203620A patent/EP1193878B1/de not_active Expired - Lifetime
- 2001-09-27 US US09/965,455 patent/US6703901B2/en not_active Expired - Lifetime
- 2001-09-28 JP JP2001303401A patent/JP4900753B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US6703901B2 (en) | 2004-03-09 |
JP2002185320A (ja) | 2002-06-28 |
US20020113658A1 (en) | 2002-08-22 |
EP1193878A1 (de) | 2002-04-03 |
EP1193878B1 (de) | 2006-12-20 |
JP4900753B2 (ja) | 2012-03-21 |
DE60125299T2 (de) | 2007-10-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8381 | Inventor (new situation) |
Inventor name: JOVENIN, FABRICE, 75008 PARIS, FR Inventor name: BRUNEL, DOMINIQUE, 75008 PARIS, FR Inventor name: WANG, Z., 75008 PARIS, FR |
|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NXP B.V., EINDHOVEN, NL |
|
8328 | Change in the person/name/address of the agent |
Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN |