DE60333968D1 - Verfahren und Einrichtung zur Frequenzmodulation - Google Patents

Verfahren und Einrichtung zur Frequenzmodulation

Info

Publication number
DE60333968D1
DE60333968D1 DE60333968T DE60333968T DE60333968D1 DE 60333968 D1 DE60333968 D1 DE 60333968D1 DE 60333968 T DE60333968 T DE 60333968T DE 60333968 T DE60333968 T DE 60333968T DE 60333968 D1 DE60333968 D1 DE 60333968D1
Authority
DE
Germany
Prior art keywords
frequency modulation
modulation
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60333968T
Other languages
English (en)
Inventor
Hisashi Adachi
Makoto Sakakura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Application granted granted Critical
Publication of DE60333968D1 publication Critical patent/DE60333968D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0966—Modifications of modulator for regulating the mean frequency using a phase locked loop modulating the reference clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0925—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop applying frequency modulation at the divider in the feedback loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
    • H03C3/0933—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop using fractional frequency division in the feedback loop of the phase locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0941—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation at more than one point in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/095—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation to the loop in front of the voltage controlled oscillator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0958—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation by varying the characteristics of the voltage controlled oscillator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/12—Modulator circuits; Transmitter circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3022—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
    • H03M7/3037—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with weighted feedforward summation, i.e. with feedforward paths from more than one filter stage to the quantiser input
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
    • H03M7/304—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
DE60333968T 2002-03-12 2003-03-10 Verfahren und Einrichtung zur Frequenzmodulation Expired - Lifetime DE60333968D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002066884A JP4041323B2 (ja) 2002-03-12 2002-03-12 周波数変調装置、周波数変調方法、および、無線回路装置

Publications (1)

Publication Number Publication Date
DE60333968D1 true DE60333968D1 (de) 2010-10-14

Family

ID=27764490

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60333968T Expired - Lifetime DE60333968D1 (de) 2002-03-12 2003-03-10 Verfahren und Einrichtung zur Frequenzmodulation

Country Status (5)

Country Link
US (3) US7075383B2 (de)
EP (1) EP1345375B1 (de)
JP (1) JP4041323B2 (de)
CN (1) CN1260891C (de)
DE (1) DE60333968D1 (de)

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US7430265B2 (en) * 2002-06-27 2008-09-30 Infineon Technologies Ag Circuit arrangement provided with a phase-locked loop and transmitter-receiver with said circuit arrangement
US7024171B2 (en) * 2003-02-25 2006-04-04 Icom America, Incorporated Fractional-N frequency synthesizer with cascaded sigma-delta converters
US7064617B2 (en) 2003-05-02 2006-06-20 Silicon Laboratories Inc. Method and apparatus for temperature compensation
US7436227B2 (en) 2003-05-02 2008-10-14 Silicon Laboratories Inc. Dual loop architecture useful for a programmable clock source and clock multiplier applications
US7130327B2 (en) * 2003-06-27 2006-10-31 Northrop Grumman Corporation Digital frequency synthesis
DE10330822A1 (de) * 2003-07-08 2005-02-10 Infineon Technologies Ag Zwei-Punkt-Modulator-Anordnung sowie deren Verwendung in einer Sende- und in einer Empfangsanordnung
DE102004006995B4 (de) * 2004-02-12 2007-05-31 Infineon Technologies Ag Digitaler Phasenregelkreis für Sub-µ-Technologien
US7706495B2 (en) 2004-03-12 2010-04-27 Panasonic Corporation Two-point frequency modulation apparatus
JP4410128B2 (ja) * 2004-03-12 2010-02-03 パナソニック株式会社 周波数変調装置及びポーラ変調送信装置
US7425915B1 (en) * 2004-05-20 2008-09-16 University Of Rochester Frequency modulation based flash ADC
US20050266805A1 (en) * 2004-05-28 2005-12-01 Jensen Henrik T Digital delta sigma modulator and applications thereof
US7068110B2 (en) * 2004-06-28 2006-06-27 Silicon Laboratories Inc. Phase error cancellation
KR101156877B1 (ko) * 2004-07-01 2012-06-20 텔레폰악티에볼라겟엘엠에릭슨(펍) 시그마-델타 변조기를 포함하는 장치 및 시그마-델타변조기에서 양자화된 신호를 발생시키는 방법
JP2006173819A (ja) * 2004-12-14 2006-06-29 Sharp Corp スイッチングアンプ
TWI392221B (zh) 2005-05-24 2013-04-01 Axiom Microdevices Inc 在使用時鐘除法的通訊系統中調變相位或頻率的方法
US7948327B1 (en) 2005-06-30 2011-05-24 Cypress Semiconductor Corporation Simplified phase lock loop control model system and method
US8174326B1 (en) 2005-06-30 2012-05-08 Cypress Semiconductor Corporation Phase lock loop control error selection system and method
US7701297B1 (en) 2005-06-30 2010-04-20 Cypress Semiconductor Corporation Spread spectrum frequency synthesizer with improved frequency shape by adjusting the length of a standard curve used for spread spectrum modulation
US7741918B1 (en) 2005-06-30 2010-06-22 Cypress Semiconductor Corporation System and method for an enhanced noise shaping for spread spectrum modulation
US7932787B1 (en) 2005-06-30 2011-04-26 Cypress Semiconductor Corporation Phase lock loop control system and method
US8072277B1 (en) 2005-06-30 2011-12-06 Cypress Semiconductor Corporation Spread spectrum frequency synthesizer
US7912109B1 (en) 2005-06-30 2011-03-22 Cypress Semiconductor Corporation Spread spectrum frequency synthesizer with first order accumulation for frequency profile generation
US7813411B1 (en) 2005-06-30 2010-10-12 Cypress Semiconductor Corporation Spread spectrum frequency synthesizer with high order accumulation for frequency profile generation
US7961059B1 (en) 2005-06-30 2011-06-14 Cypress Semiconductor Corporation Phase lock loop control system and method with non-consecutive feedback divide values
US7405629B2 (en) * 2005-06-30 2008-07-29 Cypress Semiconductor Corp. Frequency modulator, circuit, and method that uses multiple vector accumulation to achieve fractional-N frequency synthesis
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Also Published As

Publication number Publication date
US7224238B2 (en) 2007-05-29
US20030174026A1 (en) 2003-09-18
JP2003273651A (ja) 2003-09-26
JP4041323B2 (ja) 2008-01-30
CN1260891C (zh) 2006-06-21
US20070200645A1 (en) 2007-08-30
EP1345375A2 (de) 2003-09-17
EP1345375A3 (de) 2006-10-25
EP1345375B1 (de) 2010-09-01
US20050213697A1 (en) 2005-09-29
US7075383B2 (en) 2006-07-11
US7876170B2 (en) 2011-01-25
CN1444338A (zh) 2003-09-24

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